sirfsoc_wdt.c 5.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Watchdog driver for CSR SiRFprimaII and SiRFatlasVI
  4. *
  5. * Copyright (c) 2013 Cambridge Silicon Radio Limited, a CSR plc group company.
  6. */
  7. #include <linux/module.h>
  8. #include <linux/watchdog.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/moduleparam.h>
  11. #include <linux/of.h>
  12. #include <linux/io.h>
  13. #include <linux/uaccess.h>
  14. #define CLOCK_FREQ 1000000
  15. #define SIRFSOC_TIMER_COUNTER_LO 0x0000
  16. #define SIRFSOC_TIMER_MATCH_0 0x0008
  17. #define SIRFSOC_TIMER_INT_EN 0x0024
  18. #define SIRFSOC_TIMER_WATCHDOG_EN 0x0028
  19. #define SIRFSOC_TIMER_LATCH 0x0030
  20. #define SIRFSOC_TIMER_LATCHED_LO 0x0034
  21. #define SIRFSOC_TIMER_WDT_INDEX 5
  22. #define SIRFSOC_WDT_MIN_TIMEOUT 30 /* 30 secs */
  23. #define SIRFSOC_WDT_MAX_TIMEOUT (10 * 60) /* 10 mins */
  24. #define SIRFSOC_WDT_DEFAULT_TIMEOUT 30 /* 30 secs */
  25. static unsigned int timeout;
  26. static bool nowayout = WATCHDOG_NOWAYOUT;
  27. module_param(timeout, uint, 0);
  28. module_param(nowayout, bool, 0);
  29. MODULE_PARM_DESC(timeout, "Default watchdog timeout (in seconds)");
  30. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  31. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  32. static void __iomem *sirfsoc_wdt_base(struct watchdog_device *wdd)
  33. {
  34. return (void __iomem __force *)watchdog_get_drvdata(wdd);
  35. }
  36. static unsigned int sirfsoc_wdt_gettimeleft(struct watchdog_device *wdd)
  37. {
  38. u32 counter, match;
  39. void __iomem *wdt_base;
  40. int time_left;
  41. wdt_base = sirfsoc_wdt_base(wdd);
  42. counter = readl(wdt_base + SIRFSOC_TIMER_COUNTER_LO);
  43. match = readl(wdt_base +
  44. SIRFSOC_TIMER_MATCH_0 + (SIRFSOC_TIMER_WDT_INDEX << 2));
  45. time_left = match - counter;
  46. return time_left / CLOCK_FREQ;
  47. }
  48. static int sirfsoc_wdt_updatetimeout(struct watchdog_device *wdd)
  49. {
  50. u32 counter, timeout_ticks;
  51. void __iomem *wdt_base;
  52. timeout_ticks = wdd->timeout * CLOCK_FREQ;
  53. wdt_base = sirfsoc_wdt_base(wdd);
  54. /* Enable the latch before reading the LATCH_LO register */
  55. writel(1, wdt_base + SIRFSOC_TIMER_LATCH);
  56. /* Set the TO value */
  57. counter = readl(wdt_base + SIRFSOC_TIMER_LATCHED_LO);
  58. counter += timeout_ticks;
  59. writel(counter, wdt_base +
  60. SIRFSOC_TIMER_MATCH_0 + (SIRFSOC_TIMER_WDT_INDEX << 2));
  61. return 0;
  62. }
  63. static int sirfsoc_wdt_enable(struct watchdog_device *wdd)
  64. {
  65. void __iomem *wdt_base = sirfsoc_wdt_base(wdd);
  66. sirfsoc_wdt_updatetimeout(wdd);
  67. /*
  68. * NOTE: If interrupt is not enabled
  69. * then WD-Reset doesn't get generated at all.
  70. */
  71. writel(readl(wdt_base + SIRFSOC_TIMER_INT_EN)
  72. | (1 << SIRFSOC_TIMER_WDT_INDEX),
  73. wdt_base + SIRFSOC_TIMER_INT_EN);
  74. writel(1, wdt_base + SIRFSOC_TIMER_WATCHDOG_EN);
  75. return 0;
  76. }
  77. static int sirfsoc_wdt_disable(struct watchdog_device *wdd)
  78. {
  79. void __iomem *wdt_base = sirfsoc_wdt_base(wdd);
  80. writel(0, wdt_base + SIRFSOC_TIMER_WATCHDOG_EN);
  81. writel(readl(wdt_base + SIRFSOC_TIMER_INT_EN)
  82. & (~(1 << SIRFSOC_TIMER_WDT_INDEX)),
  83. wdt_base + SIRFSOC_TIMER_INT_EN);
  84. return 0;
  85. }
  86. static int sirfsoc_wdt_settimeout(struct watchdog_device *wdd, unsigned int to)
  87. {
  88. wdd->timeout = to;
  89. sirfsoc_wdt_updatetimeout(wdd);
  90. return 0;
  91. }
  92. #define OPTIONS (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE)
  93. static const struct watchdog_info sirfsoc_wdt_ident = {
  94. .options = OPTIONS,
  95. .firmware_version = 0,
  96. .identity = "SiRFSOC Watchdog",
  97. };
  98. static const struct watchdog_ops sirfsoc_wdt_ops = {
  99. .owner = THIS_MODULE,
  100. .start = sirfsoc_wdt_enable,
  101. .stop = sirfsoc_wdt_disable,
  102. .get_timeleft = sirfsoc_wdt_gettimeleft,
  103. .ping = sirfsoc_wdt_updatetimeout,
  104. .set_timeout = sirfsoc_wdt_settimeout,
  105. };
  106. static struct watchdog_device sirfsoc_wdd = {
  107. .info = &sirfsoc_wdt_ident,
  108. .ops = &sirfsoc_wdt_ops,
  109. .timeout = SIRFSOC_WDT_DEFAULT_TIMEOUT,
  110. .min_timeout = SIRFSOC_WDT_MIN_TIMEOUT,
  111. .max_timeout = SIRFSOC_WDT_MAX_TIMEOUT,
  112. };
  113. static int sirfsoc_wdt_probe(struct platform_device *pdev)
  114. {
  115. struct device *dev = &pdev->dev;
  116. int ret;
  117. void __iomem *base;
  118. base = devm_platform_ioremap_resource(pdev, 0);
  119. if (IS_ERR(base))
  120. return PTR_ERR(base);
  121. watchdog_set_drvdata(&sirfsoc_wdd, (__force void *)base);
  122. watchdog_init_timeout(&sirfsoc_wdd, timeout, dev);
  123. watchdog_set_nowayout(&sirfsoc_wdd, nowayout);
  124. sirfsoc_wdd.parent = dev;
  125. watchdog_stop_on_reboot(&sirfsoc_wdd);
  126. watchdog_stop_on_unregister(&sirfsoc_wdd);
  127. ret = devm_watchdog_register_device(dev, &sirfsoc_wdd);
  128. if (ret)
  129. return ret;
  130. platform_set_drvdata(pdev, &sirfsoc_wdd);
  131. return 0;
  132. }
  133. #ifdef CONFIG_PM_SLEEP
  134. static int sirfsoc_wdt_suspend(struct device *dev)
  135. {
  136. return 0;
  137. }
  138. static int sirfsoc_wdt_resume(struct device *dev)
  139. {
  140. struct watchdog_device *wdd = dev_get_drvdata(dev);
  141. /*
  142. * NOTE: Since timer controller registers settings are saved
  143. * and restored back by the timer-prima2.c, so we need not
  144. * update WD settings except refreshing timeout.
  145. */
  146. sirfsoc_wdt_updatetimeout(wdd);
  147. return 0;
  148. }
  149. #endif
  150. static SIMPLE_DEV_PM_OPS(sirfsoc_wdt_pm_ops,
  151. sirfsoc_wdt_suspend, sirfsoc_wdt_resume);
  152. static const struct of_device_id sirfsoc_wdt_of_match[] = {
  153. { .compatible = "sirf,prima2-tick"},
  154. {},
  155. };
  156. MODULE_DEVICE_TABLE(of, sirfsoc_wdt_of_match);
  157. static struct platform_driver sirfsoc_wdt_driver = {
  158. .driver = {
  159. .name = "sirfsoc-wdt",
  160. .pm = &sirfsoc_wdt_pm_ops,
  161. .of_match_table = sirfsoc_wdt_of_match,
  162. },
  163. .probe = sirfsoc_wdt_probe,
  164. };
  165. module_platform_driver(sirfsoc_wdt_driver);
  166. MODULE_DESCRIPTION("SiRF SoC watchdog driver");
  167. MODULE_AUTHOR("Xianglong Du <Xianglong.Du@csr.com>");
  168. MODULE_LICENSE("GPL v2");
  169. MODULE_ALIAS("platform:sirfsoc-wdt");