sch311x_wdt.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * sch311x_wdt.c - Driver for the SCH311x Super-I/O chips
  4. * integrated watchdog.
  5. *
  6. * (c) Copyright 2008 Wim Van Sebroeck <wim@iguana.be>.
  7. *
  8. * Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
  9. * provide warranty for any of this software. This material is
  10. * provided "AS-IS" and at no charge.
  11. */
  12. /*
  13. * Includes, defines, variables, module parameters, ...
  14. */
  15. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  16. /* Includes */
  17. #include <linux/module.h> /* For module specific items */
  18. #include <linux/moduleparam.h> /* For new moduleparam's */
  19. #include <linux/types.h> /* For standard types (like size_t) */
  20. #include <linux/errno.h> /* For the -ENODEV/... values */
  21. #include <linux/kernel.h> /* For printk/... */
  22. #include <linux/miscdevice.h> /* For struct miscdevice */
  23. #include <linux/watchdog.h> /* For the watchdog specific items */
  24. #include <linux/init.h> /* For __init/__exit/... */
  25. #include <linux/fs.h> /* For file operations */
  26. #include <linux/platform_device.h> /* For platform_driver framework */
  27. #include <linux/ioport.h> /* For io-port access */
  28. #include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */
  29. #include <linux/uaccess.h> /* For copy_to_user/put_user/... */
  30. #include <linux/io.h> /* For inb/outb/... */
  31. /* Module and version information */
  32. #define DRV_NAME "sch311x_wdt"
  33. /* Runtime registers */
  34. #define GP60 0x47
  35. #define WDT_TIME_OUT 0x65
  36. #define WDT_VAL 0x66
  37. #define WDT_CFG 0x67
  38. #define WDT_CTRL 0x68
  39. /* internal variables */
  40. static unsigned long sch311x_wdt_is_open;
  41. static char sch311x_wdt_expect_close;
  42. static struct platform_device *sch311x_wdt_pdev;
  43. static int sch311x_ioports[] = { 0x2e, 0x4e, 0x162e, 0x164e, 0x00 };
  44. static struct { /* The devices private data */
  45. /* the Runtime Register base address */
  46. unsigned short runtime_reg;
  47. /* The card's boot status */
  48. int boot_status;
  49. /* the lock for io operations */
  50. spinlock_t io_lock;
  51. } sch311x_wdt_data;
  52. /* Module load parameters */
  53. static unsigned short force_id;
  54. module_param(force_id, ushort, 0);
  55. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  56. #define WATCHDOG_TIMEOUT 60 /* 60 sec default timeout */
  57. static int timeout = WATCHDOG_TIMEOUT; /* in seconds */
  58. module_param(timeout, int, 0);
  59. MODULE_PARM_DESC(timeout,
  60. "Watchdog timeout in seconds. 1<= timeout <=15300, default="
  61. __MODULE_STRING(WATCHDOG_TIMEOUT) ".");
  62. static bool nowayout = WATCHDOG_NOWAYOUT;
  63. module_param(nowayout, bool, 0);
  64. MODULE_PARM_DESC(nowayout,
  65. "Watchdog cannot be stopped once started (default="
  66. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  67. /*
  68. * Super-IO functions
  69. */
  70. static inline void sch311x_sio_enter(int sio_config_port)
  71. {
  72. outb(0x55, sio_config_port);
  73. }
  74. static inline void sch311x_sio_exit(int sio_config_port)
  75. {
  76. outb(0xaa, sio_config_port);
  77. }
  78. static inline int sch311x_sio_inb(int sio_config_port, int reg)
  79. {
  80. outb(reg, sio_config_port);
  81. return inb(sio_config_port + 1);
  82. }
  83. static inline void sch311x_sio_outb(int sio_config_port, int reg, int val)
  84. {
  85. outb(reg, sio_config_port);
  86. outb(val, sio_config_port + 1);
  87. }
  88. /*
  89. * Watchdog Operations
  90. */
  91. static void sch311x_wdt_set_timeout(int t)
  92. {
  93. unsigned char timeout_unit = 0x80;
  94. /* When new timeout is bigger then 255 seconds, we will use minutes */
  95. if (t > 255) {
  96. timeout_unit = 0;
  97. t /= 60;
  98. }
  99. /* -- Watchdog Timeout --
  100. * Bit 0-6 (Reserved)
  101. * Bit 7 WDT Time-out Value Units Select
  102. * (0 = Minutes, 1 = Seconds)
  103. */
  104. outb(timeout_unit, sch311x_wdt_data.runtime_reg + WDT_TIME_OUT);
  105. /* -- Watchdog Timer Time-out Value --
  106. * Bit 0-7 Binary coded units (0=Disabled, 1..255)
  107. */
  108. outb(t, sch311x_wdt_data.runtime_reg + WDT_VAL);
  109. }
  110. static void sch311x_wdt_start(void)
  111. {
  112. unsigned char t;
  113. spin_lock(&sch311x_wdt_data.io_lock);
  114. /* set watchdog's timeout */
  115. sch311x_wdt_set_timeout(timeout);
  116. /* enable the watchdog */
  117. /* -- General Purpose I/O Bit 6.0 --
  118. * Bit 0, In/Out: 0 = Output, 1 = Input
  119. * Bit 1, Polarity: 0 = No Invert, 1 = Invert
  120. * Bit 2-3, Function select: 00 = GPI/O, 01 = LED1, 11 = WDT,
  121. * 10 = Either Edge Triggered Intr.4
  122. * Bit 4-6 (Reserved)
  123. * Bit 7, Output Type: 0 = Push Pull Bit, 1 = Open Drain
  124. */
  125. t = inb(sch311x_wdt_data.runtime_reg + GP60);
  126. outb((t & ~0x0d) | 0x0c, sch311x_wdt_data.runtime_reg + GP60);
  127. spin_unlock(&sch311x_wdt_data.io_lock);
  128. }
  129. static void sch311x_wdt_stop(void)
  130. {
  131. unsigned char t;
  132. spin_lock(&sch311x_wdt_data.io_lock);
  133. /* stop the watchdog */
  134. t = inb(sch311x_wdt_data.runtime_reg + GP60);
  135. outb((t & ~0x0d) | 0x01, sch311x_wdt_data.runtime_reg + GP60);
  136. /* disable timeout by setting it to 0 */
  137. sch311x_wdt_set_timeout(0);
  138. spin_unlock(&sch311x_wdt_data.io_lock);
  139. }
  140. static void sch311x_wdt_keepalive(void)
  141. {
  142. spin_lock(&sch311x_wdt_data.io_lock);
  143. sch311x_wdt_set_timeout(timeout);
  144. spin_unlock(&sch311x_wdt_data.io_lock);
  145. }
  146. static int sch311x_wdt_set_heartbeat(int t)
  147. {
  148. if (t < 1 || t > (255*60))
  149. return -EINVAL;
  150. /* When new timeout is bigger then 255 seconds,
  151. * we will round up to minutes (with a max of 255) */
  152. if (t > 255)
  153. t = (((t - 1) / 60) + 1) * 60;
  154. timeout = t;
  155. return 0;
  156. }
  157. static void sch311x_wdt_get_status(int *status)
  158. {
  159. unsigned char new_status;
  160. *status = 0;
  161. spin_lock(&sch311x_wdt_data.io_lock);
  162. /* -- Watchdog timer control --
  163. * Bit 0 Status Bit: 0 = Timer counting, 1 = Timeout occurred
  164. * Bit 1 Reserved
  165. * Bit 2 Force Timeout: 1 = Forces WD timeout event (self-cleaning)
  166. * Bit 3 P20 Force Timeout enabled:
  167. * 0 = P20 activity does not generate the WD timeout event
  168. * 1 = P20 Allows rising edge of P20, from the keyboard
  169. * controller, to force the WD timeout event.
  170. * Bit 4-7 Reserved
  171. */
  172. new_status = inb(sch311x_wdt_data.runtime_reg + WDT_CTRL);
  173. if (new_status & 0x01)
  174. *status |= WDIOF_CARDRESET;
  175. spin_unlock(&sch311x_wdt_data.io_lock);
  176. }
  177. /*
  178. * /dev/watchdog handling
  179. */
  180. static ssize_t sch311x_wdt_write(struct file *file, const char __user *buf,
  181. size_t count, loff_t *ppos)
  182. {
  183. if (count) {
  184. if (!nowayout) {
  185. size_t i;
  186. sch311x_wdt_expect_close = 0;
  187. for (i = 0; i != count; i++) {
  188. char c;
  189. if (get_user(c, buf + i))
  190. return -EFAULT;
  191. if (c == 'V')
  192. sch311x_wdt_expect_close = 42;
  193. }
  194. }
  195. sch311x_wdt_keepalive();
  196. }
  197. return count;
  198. }
  199. static long sch311x_wdt_ioctl(struct file *file, unsigned int cmd,
  200. unsigned long arg)
  201. {
  202. int status;
  203. int new_timeout;
  204. void __user *argp = (void __user *)arg;
  205. int __user *p = argp;
  206. static const struct watchdog_info ident = {
  207. .options = WDIOF_KEEPALIVEPING |
  208. WDIOF_SETTIMEOUT |
  209. WDIOF_MAGICCLOSE,
  210. .firmware_version = 1,
  211. .identity = DRV_NAME,
  212. };
  213. switch (cmd) {
  214. case WDIOC_GETSUPPORT:
  215. if (copy_to_user(argp, &ident, sizeof(ident)))
  216. return -EFAULT;
  217. break;
  218. case WDIOC_GETSTATUS:
  219. {
  220. sch311x_wdt_get_status(&status);
  221. return put_user(status, p);
  222. }
  223. case WDIOC_GETBOOTSTATUS:
  224. return put_user(sch311x_wdt_data.boot_status, p);
  225. case WDIOC_SETOPTIONS:
  226. {
  227. int options, retval = -EINVAL;
  228. if (get_user(options, p))
  229. return -EFAULT;
  230. if (options & WDIOS_DISABLECARD) {
  231. sch311x_wdt_stop();
  232. retval = 0;
  233. }
  234. if (options & WDIOS_ENABLECARD) {
  235. sch311x_wdt_start();
  236. retval = 0;
  237. }
  238. return retval;
  239. }
  240. case WDIOC_KEEPALIVE:
  241. sch311x_wdt_keepalive();
  242. break;
  243. case WDIOC_SETTIMEOUT:
  244. if (get_user(new_timeout, p))
  245. return -EFAULT;
  246. if (sch311x_wdt_set_heartbeat(new_timeout))
  247. return -EINVAL;
  248. sch311x_wdt_keepalive();
  249. fallthrough;
  250. case WDIOC_GETTIMEOUT:
  251. return put_user(timeout, p);
  252. default:
  253. return -ENOTTY;
  254. }
  255. return 0;
  256. }
  257. static int sch311x_wdt_open(struct inode *inode, struct file *file)
  258. {
  259. if (test_and_set_bit(0, &sch311x_wdt_is_open))
  260. return -EBUSY;
  261. /*
  262. * Activate
  263. */
  264. sch311x_wdt_start();
  265. return stream_open(inode, file);
  266. }
  267. static int sch311x_wdt_close(struct inode *inode, struct file *file)
  268. {
  269. if (sch311x_wdt_expect_close == 42) {
  270. sch311x_wdt_stop();
  271. } else {
  272. pr_crit("Unexpected close, not stopping watchdog!\n");
  273. sch311x_wdt_keepalive();
  274. }
  275. clear_bit(0, &sch311x_wdt_is_open);
  276. sch311x_wdt_expect_close = 0;
  277. return 0;
  278. }
  279. /*
  280. * Kernel Interfaces
  281. */
  282. static const struct file_operations sch311x_wdt_fops = {
  283. .owner = THIS_MODULE,
  284. .llseek = no_llseek,
  285. .write = sch311x_wdt_write,
  286. .unlocked_ioctl = sch311x_wdt_ioctl,
  287. .compat_ioctl = compat_ptr_ioctl,
  288. .open = sch311x_wdt_open,
  289. .release = sch311x_wdt_close,
  290. };
  291. static struct miscdevice sch311x_wdt_miscdev = {
  292. .minor = WATCHDOG_MINOR,
  293. .name = "watchdog",
  294. .fops = &sch311x_wdt_fops,
  295. };
  296. /*
  297. * Init & exit routines
  298. */
  299. static int sch311x_wdt_probe(struct platform_device *pdev)
  300. {
  301. struct device *dev = &pdev->dev;
  302. int err;
  303. spin_lock_init(&sch311x_wdt_data.io_lock);
  304. if (!request_region(sch311x_wdt_data.runtime_reg + GP60, 1, DRV_NAME)) {
  305. dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n",
  306. sch311x_wdt_data.runtime_reg + GP60,
  307. sch311x_wdt_data.runtime_reg + GP60);
  308. err = -EBUSY;
  309. goto exit;
  310. }
  311. if (!request_region(sch311x_wdt_data.runtime_reg + WDT_TIME_OUT, 4,
  312. DRV_NAME)) {
  313. dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n",
  314. sch311x_wdt_data.runtime_reg + WDT_TIME_OUT,
  315. sch311x_wdt_data.runtime_reg + WDT_CTRL);
  316. err = -EBUSY;
  317. goto exit_release_region;
  318. }
  319. /* Make sure that the watchdog is not running */
  320. sch311x_wdt_stop();
  321. /* Disable keyboard and mouse interaction and interrupt */
  322. /* -- Watchdog timer configuration --
  323. * Bit 0 Reserved
  324. * Bit 1 Keyboard enable: 0* = No Reset, 1 = Reset WDT upon KBD Intr.
  325. * Bit 2 Mouse enable: 0* = No Reset, 1 = Reset WDT upon Mouse Intr
  326. * Bit 3 Reserved
  327. * Bit 4-7 WDT Interrupt Mapping: (0000* = Disabled,
  328. * 0001=IRQ1, 0010=(Invalid), 0011=IRQ3 to 1111=IRQ15)
  329. */
  330. outb(0, sch311x_wdt_data.runtime_reg + WDT_CFG);
  331. /* Check that the heartbeat value is within it's range ;
  332. * if not reset to the default */
  333. if (sch311x_wdt_set_heartbeat(timeout)) {
  334. sch311x_wdt_set_heartbeat(WATCHDOG_TIMEOUT);
  335. dev_info(dev, "timeout value must be 1<=x<=15300, using %d\n",
  336. timeout);
  337. }
  338. /* Get status at boot */
  339. sch311x_wdt_get_status(&sch311x_wdt_data.boot_status);
  340. sch311x_wdt_miscdev.parent = dev;
  341. err = misc_register(&sch311x_wdt_miscdev);
  342. if (err != 0) {
  343. dev_err(dev, "cannot register miscdev on minor=%d (err=%d)\n",
  344. WATCHDOG_MINOR, err);
  345. goto exit_release_region2;
  346. }
  347. dev_info(dev,
  348. "SMSC SCH311x WDT initialized. timeout=%d sec (nowayout=%d)\n",
  349. timeout, nowayout);
  350. return 0;
  351. exit_release_region2:
  352. release_region(sch311x_wdt_data.runtime_reg + WDT_TIME_OUT, 4);
  353. exit_release_region:
  354. release_region(sch311x_wdt_data.runtime_reg + GP60, 1);
  355. sch311x_wdt_data.runtime_reg = 0;
  356. exit:
  357. return err;
  358. }
  359. static int sch311x_wdt_remove(struct platform_device *pdev)
  360. {
  361. /* Stop the timer before we leave */
  362. if (!nowayout)
  363. sch311x_wdt_stop();
  364. /* Deregister */
  365. misc_deregister(&sch311x_wdt_miscdev);
  366. release_region(sch311x_wdt_data.runtime_reg + WDT_TIME_OUT, 4);
  367. release_region(sch311x_wdt_data.runtime_reg + GP60, 1);
  368. sch311x_wdt_data.runtime_reg = 0;
  369. return 0;
  370. }
  371. static void sch311x_wdt_shutdown(struct platform_device *dev)
  372. {
  373. /* Turn the WDT off if we have a soft shutdown */
  374. sch311x_wdt_stop();
  375. }
  376. static struct platform_driver sch311x_wdt_driver = {
  377. .probe = sch311x_wdt_probe,
  378. .remove = sch311x_wdt_remove,
  379. .shutdown = sch311x_wdt_shutdown,
  380. .driver = {
  381. .name = DRV_NAME,
  382. },
  383. };
  384. static int __init sch311x_detect(int sio_config_port, unsigned short *addr)
  385. {
  386. int err = 0, reg;
  387. unsigned short base_addr;
  388. unsigned char dev_id;
  389. sch311x_sio_enter(sio_config_port);
  390. /* Check device ID. We currently know about:
  391. * SCH3112 (0x7c), SCH3114 (0x7d), and SCH3116 (0x7f). */
  392. reg = force_id ? force_id : sch311x_sio_inb(sio_config_port, 0x20);
  393. if (!(reg == 0x7c || reg == 0x7d || reg == 0x7f)) {
  394. err = -ENODEV;
  395. goto exit;
  396. }
  397. dev_id = reg == 0x7c ? 2 : reg == 0x7d ? 4 : 6;
  398. /* Select logical device A (runtime registers) */
  399. sch311x_sio_outb(sio_config_port, 0x07, 0x0a);
  400. /* Check if Logical Device Register is currently active */
  401. if ((sch311x_sio_inb(sio_config_port, 0x30) & 0x01) == 0)
  402. pr_info("Seems that LDN 0x0a is not active...\n");
  403. /* Get the base address of the runtime registers */
  404. base_addr = (sch311x_sio_inb(sio_config_port, 0x60) << 8) |
  405. sch311x_sio_inb(sio_config_port, 0x61);
  406. if (!base_addr) {
  407. pr_err("Base address not set\n");
  408. err = -ENODEV;
  409. goto exit;
  410. }
  411. *addr = base_addr;
  412. pr_info("Found an SMSC SCH311%d chip at 0x%04x\n", dev_id, base_addr);
  413. exit:
  414. sch311x_sio_exit(sio_config_port);
  415. return err;
  416. }
  417. static int __init sch311x_wdt_init(void)
  418. {
  419. int err, i, found = 0;
  420. unsigned short addr = 0;
  421. for (i = 0; !found && sch311x_ioports[i]; i++)
  422. if (sch311x_detect(sch311x_ioports[i], &addr) == 0)
  423. found++;
  424. if (!found)
  425. return -ENODEV;
  426. sch311x_wdt_data.runtime_reg = addr;
  427. err = platform_driver_register(&sch311x_wdt_driver);
  428. if (err)
  429. return err;
  430. sch311x_wdt_pdev = platform_device_register_simple(DRV_NAME, addr,
  431. NULL, 0);
  432. if (IS_ERR(sch311x_wdt_pdev)) {
  433. err = PTR_ERR(sch311x_wdt_pdev);
  434. goto unreg_platform_driver;
  435. }
  436. return 0;
  437. unreg_platform_driver:
  438. platform_driver_unregister(&sch311x_wdt_driver);
  439. return err;
  440. }
  441. static void __exit sch311x_wdt_exit(void)
  442. {
  443. platform_device_unregister(sch311x_wdt_pdev);
  444. platform_driver_unregister(&sch311x_wdt_driver);
  445. }
  446. module_init(sch311x_wdt_init);
  447. module_exit(sch311x_wdt_exit);
  448. MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>");
  449. MODULE_DESCRIPTION("SMSC SCH311x WatchDog Timer Driver");
  450. MODULE_LICENSE("GPL");