sama5d4_wdt.c 9.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Driver for Atmel SAMA5D4 Watchdog Timer
  4. *
  5. * Copyright (C) 2015-2019 Microchip Technology Inc. and its subsidiaries
  6. */
  7. #include <linux/delay.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/io.h>
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/of_irq.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/reboot.h>
  17. #include <linux/watchdog.h>
  18. #include "at91sam9_wdt.h"
  19. /* minimum and maximum watchdog timeout, in seconds */
  20. #define MIN_WDT_TIMEOUT 1
  21. #define MAX_WDT_TIMEOUT 16
  22. #define WDT_DEFAULT_TIMEOUT MAX_WDT_TIMEOUT
  23. #define WDT_SEC2TICKS(s) ((s) ? (((s) << 8) - 1) : 0)
  24. struct sama5d4_wdt {
  25. struct watchdog_device wdd;
  26. void __iomem *reg_base;
  27. u32 mr;
  28. u32 ir;
  29. unsigned long last_ping;
  30. bool need_irq;
  31. bool sam9x60_support;
  32. };
  33. static int wdt_timeout;
  34. static bool nowayout = WATCHDOG_NOWAYOUT;
  35. module_param(wdt_timeout, int, 0);
  36. MODULE_PARM_DESC(wdt_timeout,
  37. "Watchdog timeout in seconds. (default = "
  38. __MODULE_STRING(WDT_DEFAULT_TIMEOUT) ")");
  39. module_param(nowayout, bool, 0);
  40. MODULE_PARM_DESC(nowayout,
  41. "Watchdog cannot be stopped once started (default="
  42. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  43. #define wdt_enabled (!(wdt->mr & AT91_WDT_WDDIS))
  44. #define wdt_read(wdt, field) \
  45. readl_relaxed((wdt)->reg_base + (field))
  46. /* 4 slow clock periods is 4/32768 = 122.07µs*/
  47. #define WDT_DELAY usecs_to_jiffies(123)
  48. static void wdt_write(struct sama5d4_wdt *wdt, u32 field, u32 val)
  49. {
  50. /*
  51. * WDT_CR and WDT_MR must not be modified within three slow clock
  52. * periods following a restart of the watchdog performed by a write
  53. * access in WDT_CR.
  54. */
  55. while (time_before(jiffies, wdt->last_ping + WDT_DELAY))
  56. usleep_range(30, 125);
  57. writel_relaxed(val, wdt->reg_base + field);
  58. wdt->last_ping = jiffies;
  59. }
  60. static void wdt_write_nosleep(struct sama5d4_wdt *wdt, u32 field, u32 val)
  61. {
  62. if (time_before(jiffies, wdt->last_ping + WDT_DELAY))
  63. udelay(123);
  64. writel_relaxed(val, wdt->reg_base + field);
  65. wdt->last_ping = jiffies;
  66. }
  67. static int sama5d4_wdt_start(struct watchdog_device *wdd)
  68. {
  69. struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
  70. if (wdt->sam9x60_support) {
  71. writel_relaxed(wdt->ir, wdt->reg_base + AT91_SAM9X60_IER);
  72. wdt->mr &= ~AT91_SAM9X60_WDDIS;
  73. } else {
  74. wdt->mr &= ~AT91_WDT_WDDIS;
  75. }
  76. wdt_write(wdt, AT91_WDT_MR, wdt->mr);
  77. return 0;
  78. }
  79. static int sama5d4_wdt_stop(struct watchdog_device *wdd)
  80. {
  81. struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
  82. if (wdt->sam9x60_support) {
  83. writel_relaxed(wdt->ir, wdt->reg_base + AT91_SAM9X60_IDR);
  84. wdt->mr |= AT91_SAM9X60_WDDIS;
  85. } else {
  86. wdt->mr |= AT91_WDT_WDDIS;
  87. }
  88. wdt_write(wdt, AT91_WDT_MR, wdt->mr);
  89. return 0;
  90. }
  91. static int sama5d4_wdt_ping(struct watchdog_device *wdd)
  92. {
  93. struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
  94. wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
  95. return 0;
  96. }
  97. static int sama5d4_wdt_set_timeout(struct watchdog_device *wdd,
  98. unsigned int timeout)
  99. {
  100. struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
  101. u32 value = WDT_SEC2TICKS(timeout);
  102. if (wdt->sam9x60_support) {
  103. wdt_write(wdt, AT91_SAM9X60_WLR,
  104. AT91_SAM9X60_SET_COUNTER(value));
  105. wdd->timeout = timeout;
  106. return 0;
  107. }
  108. wdt->mr &= ~AT91_WDT_WDV;
  109. wdt->mr |= AT91_WDT_SET_WDV(value);
  110. /*
  111. * WDDIS has to be 0 when updating WDD/WDV. The datasheet states: When
  112. * setting the WDDIS bit, and while it is set, the fields WDV and WDD
  113. * must not be modified.
  114. * If the watchdog is enabled, then the timeout can be updated. Else,
  115. * wait that the user enables it.
  116. */
  117. if (wdt_enabled)
  118. wdt_write(wdt, AT91_WDT_MR, wdt->mr & ~AT91_WDT_WDDIS);
  119. wdd->timeout = timeout;
  120. return 0;
  121. }
  122. static const struct watchdog_info sama5d4_wdt_info = {
  123. .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
  124. .identity = "Atmel SAMA5D4 Watchdog",
  125. };
  126. static const struct watchdog_ops sama5d4_wdt_ops = {
  127. .owner = THIS_MODULE,
  128. .start = sama5d4_wdt_start,
  129. .stop = sama5d4_wdt_stop,
  130. .ping = sama5d4_wdt_ping,
  131. .set_timeout = sama5d4_wdt_set_timeout,
  132. };
  133. static irqreturn_t sama5d4_wdt_irq_handler(int irq, void *dev_id)
  134. {
  135. struct sama5d4_wdt *wdt = platform_get_drvdata(dev_id);
  136. u32 reg;
  137. if (wdt->sam9x60_support)
  138. reg = wdt_read(wdt, AT91_SAM9X60_ISR);
  139. else
  140. reg = wdt_read(wdt, AT91_WDT_SR);
  141. if (reg) {
  142. pr_crit("Atmel Watchdog Software Reset\n");
  143. emergency_restart();
  144. pr_crit("Reboot didn't succeed\n");
  145. }
  146. return IRQ_HANDLED;
  147. }
  148. static int of_sama5d4_wdt_init(struct device_node *np, struct sama5d4_wdt *wdt)
  149. {
  150. const char *tmp;
  151. if (wdt->sam9x60_support)
  152. wdt->mr = AT91_SAM9X60_WDDIS;
  153. else
  154. wdt->mr = AT91_WDT_WDDIS;
  155. if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
  156. !strcmp(tmp, "software"))
  157. wdt->need_irq = true;
  158. if (of_property_read_bool(np, "atmel,idle-halt"))
  159. wdt->mr |= AT91_WDT_WDIDLEHLT;
  160. if (of_property_read_bool(np, "atmel,dbg-halt"))
  161. wdt->mr |= AT91_WDT_WDDBGHLT;
  162. return 0;
  163. }
  164. static int sama5d4_wdt_init(struct sama5d4_wdt *wdt)
  165. {
  166. u32 reg, val;
  167. val = WDT_SEC2TICKS(WDT_DEFAULT_TIMEOUT);
  168. /*
  169. * When booting and resuming, the bootloader may have changed the
  170. * watchdog configuration.
  171. * If the watchdog is already running, we can safely update it.
  172. * Else, we have to disable it properly.
  173. */
  174. if (!wdt_enabled) {
  175. reg = wdt_read(wdt, AT91_WDT_MR);
  176. if (wdt->sam9x60_support && (!(reg & AT91_SAM9X60_WDDIS)))
  177. wdt_write_nosleep(wdt, AT91_WDT_MR,
  178. reg | AT91_SAM9X60_WDDIS);
  179. else if (!wdt->sam9x60_support &&
  180. (!(reg & AT91_WDT_WDDIS)))
  181. wdt_write_nosleep(wdt, AT91_WDT_MR,
  182. reg | AT91_WDT_WDDIS);
  183. }
  184. if (wdt->sam9x60_support) {
  185. if (wdt->need_irq)
  186. wdt->ir = AT91_SAM9X60_PERINT;
  187. else
  188. wdt->mr |= AT91_SAM9X60_PERIODRST;
  189. wdt_write(wdt, AT91_SAM9X60_IER, wdt->ir);
  190. wdt_write(wdt, AT91_SAM9X60_WLR, AT91_SAM9X60_SET_COUNTER(val));
  191. } else {
  192. wdt->mr |= AT91_WDT_SET_WDD(WDT_SEC2TICKS(MAX_WDT_TIMEOUT));
  193. wdt->mr |= AT91_WDT_SET_WDV(val);
  194. if (wdt->need_irq)
  195. wdt->mr |= AT91_WDT_WDFIEN;
  196. else
  197. wdt->mr |= AT91_WDT_WDRSTEN;
  198. }
  199. wdt_write_nosleep(wdt, AT91_WDT_MR, wdt->mr);
  200. return 0;
  201. }
  202. static int sama5d4_wdt_probe(struct platform_device *pdev)
  203. {
  204. struct device *dev = &pdev->dev;
  205. struct watchdog_device *wdd;
  206. struct sama5d4_wdt *wdt;
  207. void __iomem *regs;
  208. u32 irq = 0;
  209. int ret;
  210. wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
  211. if (!wdt)
  212. return -ENOMEM;
  213. wdd = &wdt->wdd;
  214. wdd->timeout = WDT_DEFAULT_TIMEOUT;
  215. wdd->info = &sama5d4_wdt_info;
  216. wdd->ops = &sama5d4_wdt_ops;
  217. wdd->min_timeout = MIN_WDT_TIMEOUT;
  218. wdd->max_timeout = MAX_WDT_TIMEOUT;
  219. wdt->last_ping = jiffies;
  220. wdt->sam9x60_support = of_device_is_compatible(dev->of_node,
  221. "microchip,sam9x60-wdt");
  222. watchdog_set_drvdata(wdd, wdt);
  223. regs = devm_platform_ioremap_resource(pdev, 0);
  224. if (IS_ERR(regs))
  225. return PTR_ERR(regs);
  226. wdt->reg_base = regs;
  227. ret = of_sama5d4_wdt_init(dev->of_node, wdt);
  228. if (ret)
  229. return ret;
  230. if (wdt->need_irq) {
  231. irq = irq_of_parse_and_map(dev->of_node, 0);
  232. if (!irq) {
  233. dev_warn(dev, "failed to get IRQ from DT\n");
  234. wdt->need_irq = false;
  235. }
  236. }
  237. if (wdt->need_irq) {
  238. ret = devm_request_irq(dev, irq, sama5d4_wdt_irq_handler,
  239. IRQF_SHARED | IRQF_IRQPOLL |
  240. IRQF_NO_SUSPEND, pdev->name, pdev);
  241. if (ret) {
  242. dev_err(dev, "cannot register interrupt handler\n");
  243. return ret;
  244. }
  245. }
  246. watchdog_init_timeout(wdd, wdt_timeout, dev);
  247. ret = sama5d4_wdt_init(wdt);
  248. if (ret)
  249. return ret;
  250. watchdog_set_nowayout(wdd, nowayout);
  251. watchdog_stop_on_unregister(wdd);
  252. ret = devm_watchdog_register_device(dev, wdd);
  253. if (ret)
  254. return ret;
  255. platform_set_drvdata(pdev, wdt);
  256. dev_info(dev, "initialized (timeout = %d sec, nowayout = %d)\n",
  257. wdd->timeout, nowayout);
  258. return 0;
  259. }
  260. static const struct of_device_id sama5d4_wdt_of_match[] = {
  261. {
  262. .compatible = "atmel,sama5d4-wdt",
  263. },
  264. {
  265. .compatible = "microchip,sam9x60-wdt",
  266. },
  267. { }
  268. };
  269. MODULE_DEVICE_TABLE(of, sama5d4_wdt_of_match);
  270. #ifdef CONFIG_PM_SLEEP
  271. static int sama5d4_wdt_suspend_late(struct device *dev)
  272. {
  273. struct sama5d4_wdt *wdt = dev_get_drvdata(dev);
  274. if (watchdog_active(&wdt->wdd))
  275. sama5d4_wdt_stop(&wdt->wdd);
  276. return 0;
  277. }
  278. static int sama5d4_wdt_resume_early(struct device *dev)
  279. {
  280. struct sama5d4_wdt *wdt = dev_get_drvdata(dev);
  281. /*
  282. * FIXME: writing MR also pings the watchdog which may not be desired.
  283. * This should only be done when the registers are lost on suspend but
  284. * there is no way to get this information right now.
  285. */
  286. sama5d4_wdt_init(wdt);
  287. if (watchdog_active(&wdt->wdd))
  288. sama5d4_wdt_start(&wdt->wdd);
  289. return 0;
  290. }
  291. #endif
  292. static const struct dev_pm_ops sama5d4_wdt_pm_ops = {
  293. SET_LATE_SYSTEM_SLEEP_PM_OPS(sama5d4_wdt_suspend_late,
  294. sama5d4_wdt_resume_early)
  295. };
  296. static struct platform_driver sama5d4_wdt_driver = {
  297. .probe = sama5d4_wdt_probe,
  298. .driver = {
  299. .name = "sama5d4_wdt",
  300. .pm = &sama5d4_wdt_pm_ops,
  301. .of_match_table = sama5d4_wdt_of_match,
  302. }
  303. };
  304. module_platform_driver(sama5d4_wdt_driver);
  305. MODULE_AUTHOR("Atmel Corporation");
  306. MODULE_DESCRIPTION("Atmel SAMA5D4 Watchdog Timer driver");
  307. MODULE_LICENSE("GPL v2");