rti_wdt.c 8.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Watchdog driver for the K3 RTI module
  4. *
  5. * (c) Copyright 2019-2020 Texas Instruments Inc.
  6. * All rights reserved.
  7. */
  8. #include <linux/clk.h>
  9. #include <linux/device.h>
  10. #include <linux/err.h>
  11. #include <linux/io.h>
  12. #include <linux/kernel.h>
  13. #include <linux/mod_devicetable.h>
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/pm_runtime.h>
  18. #include <linux/types.h>
  19. #include <linux/watchdog.h>
  20. #define DEFAULT_HEARTBEAT 60
  21. /* Max heartbeat is calculated at 32kHz source clock */
  22. #define MAX_HEARTBEAT 1000
  23. /* Timer register set definition */
  24. #define RTIDWDCTRL 0x90
  25. #define RTIDWDPRLD 0x94
  26. #define RTIWDSTATUS 0x98
  27. #define RTIWDKEY 0x9c
  28. #define RTIDWDCNTR 0xa0
  29. #define RTIWWDRXCTRL 0xa4
  30. #define RTIWWDSIZECTRL 0xa8
  31. #define RTIWWDRX_NMI 0xa
  32. #define RTIWWDSIZE_50P 0x50
  33. #define RTIWWDSIZE_25P 0x500
  34. #define RTIWWDSIZE_12P5 0x5000
  35. #define RTIWWDSIZE_6P25 0x50000
  36. #define RTIWWDSIZE_3P125 0x500000
  37. #define WDENABLE_KEY 0xa98559da
  38. #define WDKEY_SEQ0 0xe51a
  39. #define WDKEY_SEQ1 0xa35c
  40. #define WDT_PRELOAD_SHIFT 13
  41. #define WDT_PRELOAD_MAX 0xfff
  42. #define DWDST BIT(1)
  43. static int heartbeat = DEFAULT_HEARTBEAT;
  44. /*
  45. * struct to hold data for each WDT device
  46. * @base - base io address of WD device
  47. * @freq - source clock frequency of WDT
  48. * @wdd - hold watchdog device as is in WDT core
  49. */
  50. struct rti_wdt_device {
  51. void __iomem *base;
  52. unsigned long freq;
  53. struct watchdog_device wdd;
  54. };
  55. static int rti_wdt_start(struct watchdog_device *wdd)
  56. {
  57. u32 timer_margin;
  58. struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
  59. /* set timeout period */
  60. timer_margin = (u64)wdd->timeout * wdt->freq;
  61. timer_margin >>= WDT_PRELOAD_SHIFT;
  62. if (timer_margin > WDT_PRELOAD_MAX)
  63. timer_margin = WDT_PRELOAD_MAX;
  64. writel_relaxed(timer_margin, wdt->base + RTIDWDPRLD);
  65. /*
  66. * RTI only supports a windowed mode, where the watchdog can only
  67. * be petted during the open window; not too early or not too late.
  68. * The HW configuration options only allow for the open window size
  69. * to be 50% or less than that; we obviouly want to configure the open
  70. * window as large as possible so we select the 50% option.
  71. */
  72. wdd->min_hw_heartbeat_ms = 500 * wdd->timeout;
  73. /* Generate NMI when wdt expires */
  74. writel_relaxed(RTIWWDRX_NMI, wdt->base + RTIWWDRXCTRL);
  75. /* Open window size 50%; this is the largest window size available */
  76. writel_relaxed(RTIWWDSIZE_50P, wdt->base + RTIWWDSIZECTRL);
  77. readl_relaxed(wdt->base + RTIWWDSIZECTRL);
  78. /* enable watchdog */
  79. writel_relaxed(WDENABLE_KEY, wdt->base + RTIDWDCTRL);
  80. return 0;
  81. }
  82. static int rti_wdt_ping(struct watchdog_device *wdd)
  83. {
  84. struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
  85. /* put watchdog in service state */
  86. writel_relaxed(WDKEY_SEQ0, wdt->base + RTIWDKEY);
  87. /* put watchdog in active state */
  88. writel_relaxed(WDKEY_SEQ1, wdt->base + RTIWDKEY);
  89. return 0;
  90. }
  91. static int rti_wdt_setup_hw_hb(struct watchdog_device *wdd, u32 wsize)
  92. {
  93. /*
  94. * RTI only supports a windowed mode, where the watchdog can only
  95. * be petted during the open window; not too early or not too late.
  96. * The HW configuration options only allow for the open window size
  97. * to be 50% or less than that.
  98. */
  99. switch (wsize) {
  100. case RTIWWDSIZE_50P:
  101. /* 50% open window => 50% min heartbeat */
  102. wdd->min_hw_heartbeat_ms = 500 * heartbeat;
  103. break;
  104. case RTIWWDSIZE_25P:
  105. /* 25% open window => 75% min heartbeat */
  106. wdd->min_hw_heartbeat_ms = 750 * heartbeat;
  107. break;
  108. case RTIWWDSIZE_12P5:
  109. /* 12.5% open window => 87.5% min heartbeat */
  110. wdd->min_hw_heartbeat_ms = 875 * heartbeat;
  111. break;
  112. case RTIWWDSIZE_6P25:
  113. /* 6.5% open window => 93.5% min heartbeat */
  114. wdd->min_hw_heartbeat_ms = 935 * heartbeat;
  115. break;
  116. case RTIWWDSIZE_3P125:
  117. /* 3.125% open window => 96.9% min heartbeat */
  118. wdd->min_hw_heartbeat_ms = 969 * heartbeat;
  119. break;
  120. default:
  121. return -EINVAL;
  122. }
  123. return 0;
  124. }
  125. static unsigned int rti_wdt_get_timeleft_ms(struct watchdog_device *wdd)
  126. {
  127. u64 timer_counter;
  128. u32 val;
  129. struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
  130. /* if timeout has occurred then return 0 */
  131. val = readl_relaxed(wdt->base + RTIWDSTATUS);
  132. if (val & DWDST)
  133. return 0;
  134. timer_counter = readl_relaxed(wdt->base + RTIDWDCNTR);
  135. timer_counter *= 1000;
  136. do_div(timer_counter, wdt->freq);
  137. return timer_counter;
  138. }
  139. static unsigned int rti_wdt_get_timeleft(struct watchdog_device *wdd)
  140. {
  141. return rti_wdt_get_timeleft_ms(wdd) / 1000;
  142. }
  143. static const struct watchdog_info rti_wdt_info = {
  144. .options = WDIOF_KEEPALIVEPING,
  145. .identity = "K3 RTI Watchdog",
  146. };
  147. static const struct watchdog_ops rti_wdt_ops = {
  148. .owner = THIS_MODULE,
  149. .start = rti_wdt_start,
  150. .ping = rti_wdt_ping,
  151. .get_timeleft = rti_wdt_get_timeleft,
  152. };
  153. static int rti_wdt_probe(struct platform_device *pdev)
  154. {
  155. int ret = 0;
  156. struct device *dev = &pdev->dev;
  157. struct resource *wdt_mem;
  158. struct watchdog_device *wdd;
  159. struct rti_wdt_device *wdt;
  160. struct clk *clk;
  161. u32 last_ping = 0;
  162. wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
  163. if (!wdt)
  164. return -ENOMEM;
  165. clk = clk_get(dev, NULL);
  166. if (IS_ERR(clk))
  167. return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");
  168. wdt->freq = clk_get_rate(clk);
  169. clk_put(clk);
  170. if (!wdt->freq) {
  171. dev_err(dev, "Failed to get fck rate.\n");
  172. return -EINVAL;
  173. }
  174. /*
  175. * If watchdog is running at 32k clock, it is not accurate.
  176. * Adjust frequency down in this case so that we don't pet
  177. * the watchdog too often.
  178. */
  179. if (wdt->freq < 32768)
  180. wdt->freq = wdt->freq * 9 / 10;
  181. pm_runtime_enable(dev);
  182. ret = pm_runtime_get_sync(dev);
  183. if (ret) {
  184. pm_runtime_put_noidle(dev);
  185. pm_runtime_disable(&pdev->dev);
  186. return dev_err_probe(dev, ret, "runtime pm failed\n");
  187. }
  188. platform_set_drvdata(pdev, wdt);
  189. wdd = &wdt->wdd;
  190. wdd->info = &rti_wdt_info;
  191. wdd->ops = &rti_wdt_ops;
  192. wdd->min_timeout = 1;
  193. wdd->max_hw_heartbeat_ms = (WDT_PRELOAD_MAX << WDT_PRELOAD_SHIFT) /
  194. wdt->freq * 1000;
  195. wdd->parent = dev;
  196. watchdog_set_drvdata(wdd, wdt);
  197. watchdog_set_nowayout(wdd, 1);
  198. watchdog_set_restart_priority(wdd, 128);
  199. wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  200. wdt->base = devm_ioremap_resource(dev, wdt_mem);
  201. if (IS_ERR(wdt->base)) {
  202. ret = PTR_ERR(wdt->base);
  203. goto err_iomap;
  204. }
  205. if (readl(wdt->base + RTIDWDCTRL) == WDENABLE_KEY) {
  206. u32 time_left_ms;
  207. u64 heartbeat_ms;
  208. u32 wsize;
  209. set_bit(WDOG_HW_RUNNING, &wdd->status);
  210. time_left_ms = rti_wdt_get_timeleft_ms(wdd);
  211. heartbeat_ms = readl(wdt->base + RTIDWDPRLD);
  212. heartbeat_ms <<= WDT_PRELOAD_SHIFT;
  213. heartbeat_ms *= 1000;
  214. do_div(heartbeat_ms, wdt->freq);
  215. if (heartbeat_ms != heartbeat * 1000)
  216. dev_warn(dev, "watchdog already running, ignoring heartbeat config!\n");
  217. heartbeat = heartbeat_ms;
  218. heartbeat /= 1000;
  219. wsize = readl(wdt->base + RTIWWDSIZECTRL);
  220. ret = rti_wdt_setup_hw_hb(wdd, wsize);
  221. if (ret) {
  222. dev_err(dev, "bad window size.\n");
  223. goto err_iomap;
  224. }
  225. last_ping = heartbeat_ms - time_left_ms;
  226. if (time_left_ms > heartbeat_ms) {
  227. dev_warn(dev, "time_left > heartbeat? Assuming last ping just before now.\n");
  228. last_ping = 0;
  229. }
  230. }
  231. watchdog_init_timeout(wdd, heartbeat, dev);
  232. ret = watchdog_register_device(wdd);
  233. if (ret) {
  234. dev_err(dev, "cannot register watchdog device\n");
  235. goto err_iomap;
  236. }
  237. if (last_ping)
  238. watchdog_set_last_hw_keepalive(wdd, last_ping);
  239. return 0;
  240. err_iomap:
  241. pm_runtime_put_sync(&pdev->dev);
  242. pm_runtime_disable(&pdev->dev);
  243. return ret;
  244. }
  245. static int rti_wdt_remove(struct platform_device *pdev)
  246. {
  247. struct rti_wdt_device *wdt = platform_get_drvdata(pdev);
  248. watchdog_unregister_device(&wdt->wdd);
  249. pm_runtime_put(&pdev->dev);
  250. pm_runtime_disable(&pdev->dev);
  251. return 0;
  252. }
  253. static const struct of_device_id rti_wdt_of_match[] = {
  254. { .compatible = "ti,j7-rti-wdt", },
  255. {},
  256. };
  257. MODULE_DEVICE_TABLE(of, rti_wdt_of_match);
  258. static struct platform_driver rti_wdt_driver = {
  259. .driver = {
  260. .name = "rti-wdt",
  261. .of_match_table = rti_wdt_of_match,
  262. },
  263. .probe = rti_wdt_probe,
  264. .remove = rti_wdt_remove,
  265. };
  266. module_platform_driver(rti_wdt_driver);
  267. MODULE_AUTHOR("Tero Kristo <t-kristo@ti.com>");
  268. MODULE_DESCRIPTION("K3 RTI Watchdog Driver");
  269. module_param(heartbeat, int, 0);
  270. MODULE_PARM_DESC(heartbeat,
  271. "Watchdog heartbeat period in seconds from 1 to "
  272. __MODULE_STRING(MAX_HEARTBEAT) ", default "
  273. __MODULE_STRING(DEFAULT_HEARTBEAT));
  274. MODULE_LICENSE("GPL");
  275. MODULE_ALIAS("platform:rti-wdt");