mv64x60_wdt.c 7.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * mv64x60_wdt.c - MV64X60 (Marvell Discovery) watchdog userspace interface
  4. *
  5. * Author: James Chapman <jchapman@katalix.com>
  6. *
  7. * Platform-specific setup code should configure the dog to generate
  8. * interrupt or reset as required. This code only enables/disables
  9. * and services the watchdog.
  10. *
  11. * Derived from mpc8xx_wdt.c, with the following copyright.
  12. *
  13. * 2002 (c) Florian Schirmer <jolt@tuxbox.org>
  14. */
  15. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  16. #include <linux/fs.h>
  17. #include <linux/init.h>
  18. #include <linux/kernel.h>
  19. #include <linux/miscdevice.h>
  20. #include <linux/module.h>
  21. #include <linux/watchdog.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/mv643xx.h>
  24. #include <linux/uaccess.h>
  25. #include <linux/io.h>
  26. #define MV64x60_WDT_WDC_OFFSET 0
  27. /*
  28. * The watchdog configuration register contains a pair of 2-bit fields,
  29. * 1. a reload field, bits 27-26, which triggers a reload of
  30. * the countdown register, and
  31. * 2. an enable field, bits 25-24, which toggles between
  32. * enabling and disabling the watchdog timer.
  33. * Bit 31 is a read-only field which indicates whether the
  34. * watchdog timer is currently enabled.
  35. *
  36. * The low 24 bits contain the timer reload value.
  37. */
  38. #define MV64x60_WDC_ENABLE_SHIFT 24
  39. #define MV64x60_WDC_SERVICE_SHIFT 26
  40. #define MV64x60_WDC_ENABLED_SHIFT 31
  41. #define MV64x60_WDC_ENABLED_TRUE 1
  42. #define MV64x60_WDC_ENABLED_FALSE 0
  43. /* Flags bits */
  44. #define MV64x60_WDOG_FLAG_OPENED 0
  45. static unsigned long wdt_flags;
  46. static int wdt_status;
  47. static void __iomem *mv64x60_wdt_regs;
  48. static int mv64x60_wdt_timeout;
  49. static int mv64x60_wdt_count;
  50. static unsigned int bus_clk;
  51. static char expect_close;
  52. static DEFINE_SPINLOCK(mv64x60_wdt_spinlock);
  53. static bool nowayout = WATCHDOG_NOWAYOUT;
  54. module_param(nowayout, bool, 0);
  55. MODULE_PARM_DESC(nowayout,
  56. "Watchdog cannot be stopped once started (default="
  57. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  58. static int mv64x60_wdt_toggle_wdc(int enabled_predicate, int field_shift)
  59. {
  60. u32 data;
  61. u32 enabled;
  62. int ret = 0;
  63. spin_lock(&mv64x60_wdt_spinlock);
  64. data = readl(mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET);
  65. enabled = (data >> MV64x60_WDC_ENABLED_SHIFT) & 1;
  66. /* only toggle the requested field if enabled state matches predicate */
  67. if ((enabled ^ enabled_predicate) == 0) {
  68. /* We write a 1, then a 2 -- to the appropriate field */
  69. data = (1 << field_shift) | mv64x60_wdt_count;
  70. writel(data, mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET);
  71. data = (2 << field_shift) | mv64x60_wdt_count;
  72. writel(data, mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET);
  73. ret = 1;
  74. }
  75. spin_unlock(&mv64x60_wdt_spinlock);
  76. return ret;
  77. }
  78. static void mv64x60_wdt_service(void)
  79. {
  80. mv64x60_wdt_toggle_wdc(MV64x60_WDC_ENABLED_TRUE,
  81. MV64x60_WDC_SERVICE_SHIFT);
  82. }
  83. static void mv64x60_wdt_handler_enable(void)
  84. {
  85. if (mv64x60_wdt_toggle_wdc(MV64x60_WDC_ENABLED_FALSE,
  86. MV64x60_WDC_ENABLE_SHIFT)) {
  87. mv64x60_wdt_service();
  88. pr_notice("watchdog activated\n");
  89. }
  90. }
  91. static void mv64x60_wdt_handler_disable(void)
  92. {
  93. if (mv64x60_wdt_toggle_wdc(MV64x60_WDC_ENABLED_TRUE,
  94. MV64x60_WDC_ENABLE_SHIFT))
  95. pr_notice("watchdog deactivated\n");
  96. }
  97. static void mv64x60_wdt_set_timeout(unsigned int timeout)
  98. {
  99. /* maximum bus cycle count is 0xFFFFFFFF */
  100. if (timeout > 0xFFFFFFFF / bus_clk)
  101. timeout = 0xFFFFFFFF / bus_clk;
  102. mv64x60_wdt_count = timeout * bus_clk >> 8;
  103. mv64x60_wdt_timeout = timeout;
  104. }
  105. static int mv64x60_wdt_open(struct inode *inode, struct file *file)
  106. {
  107. if (test_and_set_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags))
  108. return -EBUSY;
  109. if (nowayout)
  110. __module_get(THIS_MODULE);
  111. mv64x60_wdt_handler_enable();
  112. return stream_open(inode, file);
  113. }
  114. static int mv64x60_wdt_release(struct inode *inode, struct file *file)
  115. {
  116. if (expect_close == 42)
  117. mv64x60_wdt_handler_disable();
  118. else {
  119. pr_crit("unexpected close, not stopping timer!\n");
  120. mv64x60_wdt_service();
  121. }
  122. expect_close = 0;
  123. clear_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags);
  124. return 0;
  125. }
  126. static ssize_t mv64x60_wdt_write(struct file *file, const char __user *data,
  127. size_t len, loff_t *ppos)
  128. {
  129. if (len) {
  130. if (!nowayout) {
  131. size_t i;
  132. expect_close = 0;
  133. for (i = 0; i != len; i++) {
  134. char c;
  135. if (get_user(c, data + i))
  136. return -EFAULT;
  137. if (c == 'V')
  138. expect_close = 42;
  139. }
  140. }
  141. mv64x60_wdt_service();
  142. }
  143. return len;
  144. }
  145. static long mv64x60_wdt_ioctl(struct file *file,
  146. unsigned int cmd, unsigned long arg)
  147. {
  148. int timeout;
  149. int options;
  150. void __user *argp = (void __user *)arg;
  151. static const struct watchdog_info info = {
  152. .options = WDIOF_SETTIMEOUT |
  153. WDIOF_MAGICCLOSE |
  154. WDIOF_KEEPALIVEPING,
  155. .firmware_version = 0,
  156. .identity = "MV64x60 watchdog",
  157. };
  158. switch (cmd) {
  159. case WDIOC_GETSUPPORT:
  160. if (copy_to_user(argp, &info, sizeof(info)))
  161. return -EFAULT;
  162. break;
  163. case WDIOC_GETSTATUS:
  164. case WDIOC_GETBOOTSTATUS:
  165. if (put_user(wdt_status, (int __user *)argp))
  166. return -EFAULT;
  167. wdt_status &= ~WDIOF_KEEPALIVEPING;
  168. break;
  169. case WDIOC_GETTEMP:
  170. return -EOPNOTSUPP;
  171. case WDIOC_SETOPTIONS:
  172. if (get_user(options, (int __user *)argp))
  173. return -EFAULT;
  174. if (options & WDIOS_DISABLECARD)
  175. mv64x60_wdt_handler_disable();
  176. if (options & WDIOS_ENABLECARD)
  177. mv64x60_wdt_handler_enable();
  178. break;
  179. case WDIOC_KEEPALIVE:
  180. mv64x60_wdt_service();
  181. wdt_status |= WDIOF_KEEPALIVEPING;
  182. break;
  183. case WDIOC_SETTIMEOUT:
  184. if (get_user(timeout, (int __user *)argp))
  185. return -EFAULT;
  186. mv64x60_wdt_set_timeout(timeout);
  187. fallthrough;
  188. case WDIOC_GETTIMEOUT:
  189. if (put_user(mv64x60_wdt_timeout, (int __user *)argp))
  190. return -EFAULT;
  191. break;
  192. default:
  193. return -ENOTTY;
  194. }
  195. return 0;
  196. }
  197. static const struct file_operations mv64x60_wdt_fops = {
  198. .owner = THIS_MODULE,
  199. .llseek = no_llseek,
  200. .write = mv64x60_wdt_write,
  201. .unlocked_ioctl = mv64x60_wdt_ioctl,
  202. .compat_ioctl = compat_ptr_ioctl,
  203. .open = mv64x60_wdt_open,
  204. .release = mv64x60_wdt_release,
  205. };
  206. static struct miscdevice mv64x60_wdt_miscdev = {
  207. .minor = WATCHDOG_MINOR,
  208. .name = "watchdog",
  209. .fops = &mv64x60_wdt_fops,
  210. };
  211. static int mv64x60_wdt_probe(struct platform_device *dev)
  212. {
  213. struct mv64x60_wdt_pdata *pdata = dev_get_platdata(&dev->dev);
  214. struct resource *r;
  215. int timeout = 10;
  216. bus_clk = 133; /* in MHz */
  217. if (pdata) {
  218. timeout = pdata->timeout;
  219. bus_clk = pdata->bus_clk;
  220. }
  221. /* Since bus_clk is truncated MHz, actual frequency could be
  222. * up to 1MHz higher. Round up, since it's better to time out
  223. * too late than too soon.
  224. */
  225. bus_clk++;
  226. bus_clk *= 1000000; /* convert to Hz */
  227. r = platform_get_resource(dev, IORESOURCE_MEM, 0);
  228. if (!r)
  229. return -ENODEV;
  230. mv64x60_wdt_regs = devm_ioremap(&dev->dev, r->start, resource_size(r));
  231. if (mv64x60_wdt_regs == NULL)
  232. return -ENOMEM;
  233. mv64x60_wdt_set_timeout(timeout);
  234. mv64x60_wdt_handler_disable(); /* in case timer was already running */
  235. return misc_register(&mv64x60_wdt_miscdev);
  236. }
  237. static int mv64x60_wdt_remove(struct platform_device *dev)
  238. {
  239. misc_deregister(&mv64x60_wdt_miscdev);
  240. mv64x60_wdt_handler_disable();
  241. return 0;
  242. }
  243. static struct platform_driver mv64x60_wdt_driver = {
  244. .probe = mv64x60_wdt_probe,
  245. .remove = mv64x60_wdt_remove,
  246. .driver = {
  247. .name = MV64x60_WDT_NAME,
  248. },
  249. };
  250. static int __init mv64x60_wdt_init(void)
  251. {
  252. pr_info("MV64x60 watchdog driver\n");
  253. return platform_driver_register(&mv64x60_wdt_driver);
  254. }
  255. static void __exit mv64x60_wdt_exit(void)
  256. {
  257. platform_driver_unregister(&mv64x60_wdt_driver);
  258. }
  259. module_init(mv64x60_wdt_init);
  260. module_exit(mv64x60_wdt_exit);
  261. MODULE_AUTHOR("James Chapman <jchapman@katalix.com>");
  262. MODULE_DESCRIPTION("MV64x60 watchdog driver");
  263. MODULE_LICENSE("GPL");
  264. MODULE_ALIAS("platform:" MV64x60_WDT_NAME);