hpwdt.c 10.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * HPE WatchDog Driver
  4. * based on
  5. *
  6. * SoftDog 0.05: A Software Watchdog Device
  7. *
  8. * (c) Copyright 2018 Hewlett Packard Enterprise Development LP
  9. * Thomas Mingarelli <thomas.mingarelli@hpe.com>
  10. */
  11. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12. #include <linux/device.h>
  13. #include <linux/io.h>
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/pci.h>
  18. #include <linux/pci_ids.h>
  19. #include <linux/types.h>
  20. #include <linux/watchdog.h>
  21. #include <asm/nmi.h>
  22. #define HPWDT_VERSION "2.0.3"
  23. #define SECS_TO_TICKS(secs) ((secs) * 1000 / 128)
  24. #define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000)
  25. #define HPWDT_MAX_TICKS 65535
  26. #define HPWDT_MAX_TIMER TICKS_TO_SECS(HPWDT_MAX_TICKS)
  27. #define DEFAULT_MARGIN 30
  28. #define PRETIMEOUT_SEC 9
  29. static bool ilo5;
  30. static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
  31. static bool nowayout = WATCHDOG_NOWAYOUT;
  32. static bool pretimeout = IS_ENABLED(CONFIG_HPWDT_NMI_DECODING);
  33. static int kdumptimeout = -1;
  34. static void __iomem *pci_mem_addr; /* the PCI-memory address */
  35. static unsigned long __iomem *hpwdt_nmistat;
  36. static unsigned long __iomem *hpwdt_timer_reg;
  37. static unsigned long __iomem *hpwdt_timer_con;
  38. static const struct pci_device_id hpwdt_devices[] = {
  39. { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */
  40. { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */
  41. {0}, /* terminate list */
  42. };
  43. MODULE_DEVICE_TABLE(pci, hpwdt_devices);
  44. static const struct pci_device_id hpwdt_blacklist[] = {
  45. { PCI_DEVICE_SUB(PCI_VENDOR_ID_HP, 0x3306, PCI_VENDOR_ID_HP, 0x1979) }, /* auxilary iLO */
  46. { PCI_DEVICE_SUB(PCI_VENDOR_ID_HP, 0x3306, PCI_VENDOR_ID_HP_3PAR, 0x0289) }, /* CL */
  47. {0}, /* terminate list */
  48. };
  49. static struct watchdog_device hpwdt_dev;
  50. /*
  51. * Watchdog operations
  52. */
  53. static int hpwdt_hw_is_running(void)
  54. {
  55. return ioread8(hpwdt_timer_con) & 0x01;
  56. }
  57. static int hpwdt_start(struct watchdog_device *wdd)
  58. {
  59. int control = 0x81 | (pretimeout ? 0x4 : 0);
  60. int reload = SECS_TO_TICKS(min(wdd->timeout, wdd->max_hw_heartbeat_ms/1000));
  61. dev_dbg(wdd->parent, "start watchdog 0x%08x:0x%08x:0x%02x\n", wdd->timeout, reload, control);
  62. iowrite16(reload, hpwdt_timer_reg);
  63. iowrite8(control, hpwdt_timer_con);
  64. return 0;
  65. }
  66. static void hpwdt_stop(void)
  67. {
  68. unsigned long data;
  69. pr_debug("stop watchdog\n");
  70. data = ioread8(hpwdt_timer_con);
  71. data &= 0xFE;
  72. iowrite8(data, hpwdt_timer_con);
  73. }
  74. static int hpwdt_stop_core(struct watchdog_device *wdd)
  75. {
  76. hpwdt_stop();
  77. return 0;
  78. }
  79. static void hpwdt_ping_ticks(int val)
  80. {
  81. val = min(val, HPWDT_MAX_TICKS);
  82. iowrite16(val, hpwdt_timer_reg);
  83. }
  84. static int hpwdt_ping(struct watchdog_device *wdd)
  85. {
  86. int reload = SECS_TO_TICKS(min(wdd->timeout, wdd->max_hw_heartbeat_ms/1000));
  87. dev_dbg(wdd->parent, "ping watchdog 0x%08x:0x%08x\n", wdd->timeout, reload);
  88. hpwdt_ping_ticks(reload);
  89. return 0;
  90. }
  91. static unsigned int hpwdt_gettimeleft(struct watchdog_device *wdd)
  92. {
  93. return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
  94. }
  95. static int hpwdt_settimeout(struct watchdog_device *wdd, unsigned int val)
  96. {
  97. dev_dbg(wdd->parent, "set_timeout = %d\n", val);
  98. wdd->timeout = val;
  99. if (val <= wdd->pretimeout) {
  100. dev_dbg(wdd->parent, "pretimeout < timeout. Setting to zero\n");
  101. wdd->pretimeout = 0;
  102. pretimeout = 0;
  103. if (watchdog_active(wdd))
  104. hpwdt_start(wdd);
  105. }
  106. hpwdt_ping(wdd);
  107. return 0;
  108. }
  109. #ifdef CONFIG_HPWDT_NMI_DECODING
  110. static int hpwdt_set_pretimeout(struct watchdog_device *wdd, unsigned int req)
  111. {
  112. unsigned int val = 0;
  113. dev_dbg(wdd->parent, "set_pretimeout = %d\n", req);
  114. if (req) {
  115. val = PRETIMEOUT_SEC;
  116. if (val >= wdd->timeout)
  117. return -EINVAL;
  118. }
  119. if (val != req)
  120. dev_dbg(wdd->parent, "Rounding pretimeout to: %d\n", val);
  121. wdd->pretimeout = val;
  122. pretimeout = !!val;
  123. if (watchdog_active(wdd))
  124. hpwdt_start(wdd);
  125. return 0;
  126. }
  127. static int hpwdt_my_nmi(void)
  128. {
  129. return ioread8(hpwdt_nmistat) & 0x6;
  130. }
  131. /*
  132. * NMI Handler
  133. */
  134. static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs)
  135. {
  136. unsigned int mynmi = hpwdt_my_nmi();
  137. static char panic_msg[] =
  138. "00: An NMI occurred. Depending on your system the reason "
  139. "for the NMI is logged in any one of the following resources:\n"
  140. "1. Integrated Management Log (IML)\n"
  141. "2. OA Syslog\n"
  142. "3. OA Forward Progress Log\n"
  143. "4. iLO Event Log";
  144. if (ilo5 && ulReason == NMI_UNKNOWN && !mynmi)
  145. return NMI_DONE;
  146. if (ilo5 && !pretimeout && !mynmi)
  147. return NMI_DONE;
  148. if (kdumptimeout < 0)
  149. hpwdt_stop();
  150. else if (kdumptimeout == 0)
  151. ;
  152. else {
  153. unsigned int val = max((unsigned int)kdumptimeout, hpwdt_dev.timeout);
  154. hpwdt_ping_ticks(SECS_TO_TICKS(val));
  155. }
  156. hex_byte_pack(panic_msg, mynmi);
  157. nmi_panic(regs, panic_msg);
  158. return NMI_HANDLED;
  159. }
  160. #endif /* CONFIG_HPWDT_NMI_DECODING */
  161. static const struct watchdog_info ident = {
  162. .options = WDIOF_PRETIMEOUT |
  163. WDIOF_SETTIMEOUT |
  164. WDIOF_KEEPALIVEPING |
  165. WDIOF_MAGICCLOSE,
  166. .identity = "HPE iLO2+ HW Watchdog Timer",
  167. };
  168. /*
  169. * Kernel interfaces
  170. */
  171. static const struct watchdog_ops hpwdt_ops = {
  172. .owner = THIS_MODULE,
  173. .start = hpwdt_start,
  174. .stop = hpwdt_stop_core,
  175. .ping = hpwdt_ping,
  176. .set_timeout = hpwdt_settimeout,
  177. .get_timeleft = hpwdt_gettimeleft,
  178. #ifdef CONFIG_HPWDT_NMI_DECODING
  179. .set_pretimeout = hpwdt_set_pretimeout,
  180. #endif
  181. };
  182. static struct watchdog_device hpwdt_dev = {
  183. .info = &ident,
  184. .ops = &hpwdt_ops,
  185. .min_timeout = 1,
  186. .timeout = DEFAULT_MARGIN,
  187. .pretimeout = PRETIMEOUT_SEC,
  188. .max_hw_heartbeat_ms = HPWDT_MAX_TIMER * 1000,
  189. };
  190. /*
  191. * Init & Exit
  192. */
  193. static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
  194. {
  195. #ifdef CONFIG_HPWDT_NMI_DECODING
  196. int retval;
  197. /*
  198. * Only one function can register for NMI_UNKNOWN
  199. */
  200. retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 0, "hpwdt");
  201. if (retval)
  202. goto error;
  203. retval = register_nmi_handler(NMI_SERR, hpwdt_pretimeout, 0, "hpwdt");
  204. if (retval)
  205. goto error1;
  206. retval = register_nmi_handler(NMI_IO_CHECK, hpwdt_pretimeout, 0, "hpwdt");
  207. if (retval)
  208. goto error2;
  209. dev_info(&dev->dev,
  210. "HPE Watchdog Timer Driver: NMI decoding initialized\n");
  211. return 0;
  212. error2:
  213. unregister_nmi_handler(NMI_SERR, "hpwdt");
  214. error1:
  215. unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
  216. error:
  217. dev_warn(&dev->dev,
  218. "Unable to register a die notifier (err=%d).\n",
  219. retval);
  220. return retval;
  221. #endif /* CONFIG_HPWDT_NMI_DECODING */
  222. return 0;
  223. }
  224. static void hpwdt_exit_nmi_decoding(void)
  225. {
  226. #ifdef CONFIG_HPWDT_NMI_DECODING
  227. unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
  228. unregister_nmi_handler(NMI_SERR, "hpwdt");
  229. unregister_nmi_handler(NMI_IO_CHECK, "hpwdt");
  230. #endif
  231. }
  232. static int hpwdt_init_one(struct pci_dev *dev,
  233. const struct pci_device_id *ent)
  234. {
  235. int retval;
  236. /*
  237. * First let's find out if we are on an iLO2+ server. We will
  238. * not run on a legacy ASM box.
  239. * So we only support the G5 ProLiant servers and higher.
  240. */
  241. if (dev->subsystem_vendor != PCI_VENDOR_ID_HP &&
  242. dev->subsystem_vendor != PCI_VENDOR_ID_HP_3PAR) {
  243. dev_warn(&dev->dev,
  244. "This server does not have an iLO2+ ASIC.\n");
  245. return -ENODEV;
  246. }
  247. if (pci_match_id(hpwdt_blacklist, dev)) {
  248. dev_dbg(&dev->dev, "Not supported on this device\n");
  249. return -ENODEV;
  250. }
  251. if (pci_enable_device(dev)) {
  252. dev_warn(&dev->dev,
  253. "Not possible to enable PCI Device: 0x%x:0x%x.\n",
  254. ent->vendor, ent->device);
  255. return -ENODEV;
  256. }
  257. pci_mem_addr = pci_iomap(dev, 1, 0x80);
  258. if (!pci_mem_addr) {
  259. dev_warn(&dev->dev,
  260. "Unable to detect the iLO2+ server memory.\n");
  261. retval = -ENOMEM;
  262. goto error_pci_iomap;
  263. }
  264. hpwdt_nmistat = pci_mem_addr + 0x6e;
  265. hpwdt_timer_reg = pci_mem_addr + 0x70;
  266. hpwdt_timer_con = pci_mem_addr + 0x72;
  267. /* Have the core update running timer until user space is ready */
  268. if (hpwdt_hw_is_running()) {
  269. dev_info(&dev->dev, "timer is running\n");
  270. set_bit(WDOG_HW_RUNNING, &hpwdt_dev.status);
  271. }
  272. /* Initialize NMI Decoding functionality */
  273. retval = hpwdt_init_nmi_decoding(dev);
  274. if (retval != 0)
  275. goto error_init_nmi_decoding;
  276. watchdog_stop_on_unregister(&hpwdt_dev);
  277. watchdog_set_nowayout(&hpwdt_dev, nowayout);
  278. watchdog_init_timeout(&hpwdt_dev, soft_margin, NULL);
  279. if (pretimeout && hpwdt_dev.timeout <= PRETIMEOUT_SEC) {
  280. dev_warn(&dev->dev, "timeout <= pretimeout. Setting pretimeout to zero\n");
  281. pretimeout = 0;
  282. }
  283. hpwdt_dev.pretimeout = pretimeout ? PRETIMEOUT_SEC : 0;
  284. kdumptimeout = min(kdumptimeout, HPWDT_MAX_TIMER);
  285. hpwdt_dev.parent = &dev->dev;
  286. retval = watchdog_register_device(&hpwdt_dev);
  287. if (retval < 0)
  288. goto error_wd_register;
  289. dev_info(&dev->dev, "HPE Watchdog Timer Driver: Version: %s\n",
  290. HPWDT_VERSION);
  291. dev_info(&dev->dev, "timeout: %d seconds (nowayout=%d)\n",
  292. hpwdt_dev.timeout, nowayout);
  293. dev_info(&dev->dev, "pretimeout: %s.\n",
  294. pretimeout ? "on" : "off");
  295. dev_info(&dev->dev, "kdumptimeout: %d.\n", kdumptimeout);
  296. if (dev->subsystem_vendor == PCI_VENDOR_ID_HP_3PAR)
  297. ilo5 = true;
  298. return 0;
  299. error_wd_register:
  300. hpwdt_exit_nmi_decoding();
  301. error_init_nmi_decoding:
  302. pci_iounmap(dev, pci_mem_addr);
  303. error_pci_iomap:
  304. pci_disable_device(dev);
  305. return retval;
  306. }
  307. static void hpwdt_exit(struct pci_dev *dev)
  308. {
  309. watchdog_unregister_device(&hpwdt_dev);
  310. hpwdt_exit_nmi_decoding();
  311. pci_iounmap(dev, pci_mem_addr);
  312. pci_disable_device(dev);
  313. }
  314. static struct pci_driver hpwdt_driver = {
  315. .name = "hpwdt",
  316. .id_table = hpwdt_devices,
  317. .probe = hpwdt_init_one,
  318. .remove = hpwdt_exit,
  319. };
  320. MODULE_AUTHOR("Tom Mingarelli");
  321. MODULE_DESCRIPTION("hpe watchdog driver");
  322. MODULE_LICENSE("GPL");
  323. MODULE_VERSION(HPWDT_VERSION);
  324. module_param(soft_margin, int, 0);
  325. MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
  326. module_param_named(timeout, soft_margin, int, 0);
  327. MODULE_PARM_DESC(timeout, "Alias of soft_margin");
  328. module_param(nowayout, bool, 0);
  329. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  330. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  331. module_param(kdumptimeout, int, 0444);
  332. MODULE_PARM_DESC(kdumptimeout, "Timeout applied for crash kernel transition in seconds");
  333. #ifdef CONFIG_HPWDT_NMI_DECODING
  334. module_param(pretimeout, bool, 0);
  335. MODULE_PARM_DESC(pretimeout, "Watchdog pretimeout enabled");
  336. #endif
  337. module_pci_driver(hpwdt_driver);