bt431.h 5.8 KB

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  1. /*
  2. * linux/drivers/video/bt431.h
  3. *
  4. * Copyright 2003 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
  5. * Copyright 2016 Maciej W. Rozycki <macro@linux-mips.org>
  6. *
  7. * This file is subject to the terms and conditions of the GNU General
  8. * Public License. See the file COPYING in the main directory of this
  9. * archive for more details.
  10. */
  11. #include <linux/types.h>
  12. #define BT431_CURSOR_SIZE 64
  13. /*
  14. * Bt431 cursor generator registers, 32-bit aligned.
  15. * Two twin Bt431 are used on the DECstation's PMAG-AA.
  16. */
  17. struct bt431_regs {
  18. volatile u16 addr_lo;
  19. u16 pad0;
  20. volatile u16 addr_hi;
  21. u16 pad1;
  22. volatile u16 addr_cmap;
  23. u16 pad2;
  24. volatile u16 addr_reg;
  25. u16 pad3;
  26. };
  27. static inline u16 bt431_set_value(u8 val)
  28. {
  29. return ((val << 8) | (val & 0xff)) & 0xffff;
  30. }
  31. static inline u8 bt431_get_value(u16 val)
  32. {
  33. return val & 0xff;
  34. }
  35. /*
  36. * Additional registers addressed indirectly.
  37. */
  38. #define BT431_REG_CMD 0x0000
  39. #define BT431_REG_CXLO 0x0001
  40. #define BT431_REG_CXHI 0x0002
  41. #define BT431_REG_CYLO 0x0003
  42. #define BT431_REG_CYHI 0x0004
  43. #define BT431_REG_WXLO 0x0005
  44. #define BT431_REG_WXHI 0x0006
  45. #define BT431_REG_WYLO 0x0007
  46. #define BT431_REG_WYHI 0x0008
  47. #define BT431_REG_WWLO 0x0009
  48. #define BT431_REG_WWHI 0x000a
  49. #define BT431_REG_WHLO 0x000b
  50. #define BT431_REG_WHHI 0x000c
  51. #define BT431_REG_CRAM_BASE 0x0000
  52. #define BT431_REG_CRAM_END 0x01ff
  53. /*
  54. * Command register.
  55. */
  56. #define BT431_CMD_CURS_ENABLE 0x40
  57. #define BT431_CMD_XHAIR_ENABLE 0x20
  58. #define BT431_CMD_OR_CURSORS 0x10
  59. #define BT431_CMD_XOR_CURSORS 0x00
  60. #define BT431_CMD_1_1_MUX 0x00
  61. #define BT431_CMD_4_1_MUX 0x04
  62. #define BT431_CMD_5_1_MUX 0x08
  63. #define BT431_CMD_xxx_MUX 0x0c
  64. #define BT431_CMD_THICK_1 0x00
  65. #define BT431_CMD_THICK_3 0x01
  66. #define BT431_CMD_THICK_5 0x02
  67. #define BT431_CMD_THICK_7 0x03
  68. static inline void bt431_select_reg(struct bt431_regs *regs, int ir)
  69. {
  70. /*
  71. * The compiler splits the write in two bytes without these
  72. * helper variables.
  73. */
  74. volatile u16 *lo = &(regs->addr_lo);
  75. volatile u16 *hi = &(regs->addr_hi);
  76. mb();
  77. *lo = bt431_set_value(ir & 0xff);
  78. wmb();
  79. *hi = bt431_set_value((ir >> 8) & 0xff);
  80. }
  81. /* Autoincrement read/write. */
  82. static inline u8 bt431_read_reg_inc(struct bt431_regs *regs)
  83. {
  84. /*
  85. * The compiler splits the write in two bytes without the
  86. * helper variable.
  87. */
  88. volatile u16 *r = &(regs->addr_reg);
  89. mb();
  90. return bt431_get_value(*r);
  91. }
  92. static inline void bt431_write_reg_inc(struct bt431_regs *regs, u8 value)
  93. {
  94. /*
  95. * The compiler splits the write in two bytes without the
  96. * helper variable.
  97. */
  98. volatile u16 *r = &(regs->addr_reg);
  99. mb();
  100. *r = bt431_set_value(value);
  101. }
  102. static inline u8 bt431_read_reg(struct bt431_regs *regs, int ir)
  103. {
  104. bt431_select_reg(regs, ir);
  105. return bt431_read_reg_inc(regs);
  106. }
  107. static inline void bt431_write_reg(struct bt431_regs *regs, int ir, u8 value)
  108. {
  109. bt431_select_reg(regs, ir);
  110. bt431_write_reg_inc(regs, value);
  111. }
  112. /* Autoincremented read/write for the cursor map. */
  113. static inline u16 bt431_read_cmap_inc(struct bt431_regs *regs)
  114. {
  115. /*
  116. * The compiler splits the write in two bytes without the
  117. * helper variable.
  118. */
  119. volatile u16 *r = &(regs->addr_cmap);
  120. mb();
  121. return *r;
  122. }
  123. static inline void bt431_write_cmap_inc(struct bt431_regs *regs, u16 value)
  124. {
  125. /*
  126. * The compiler splits the write in two bytes without the
  127. * helper variable.
  128. */
  129. volatile u16 *r = &(regs->addr_cmap);
  130. mb();
  131. *r = value;
  132. }
  133. static inline u16 bt431_read_cmap(struct bt431_regs *regs, int cr)
  134. {
  135. bt431_select_reg(regs, cr);
  136. return bt431_read_cmap_inc(regs);
  137. }
  138. static inline void bt431_write_cmap(struct bt431_regs *regs, int cr, u16 value)
  139. {
  140. bt431_select_reg(regs, cr);
  141. bt431_write_cmap_inc(regs, value);
  142. }
  143. static inline void bt431_enable_cursor(struct bt431_regs *regs)
  144. {
  145. bt431_write_reg(regs, BT431_REG_CMD,
  146. BT431_CMD_CURS_ENABLE | BT431_CMD_OR_CURSORS
  147. | BT431_CMD_4_1_MUX | BT431_CMD_THICK_1);
  148. }
  149. static inline void bt431_erase_cursor(struct bt431_regs *regs)
  150. {
  151. bt431_write_reg(regs, BT431_REG_CMD, BT431_CMD_4_1_MUX);
  152. }
  153. static inline void bt431_position_cursor(struct bt431_regs *regs, u16 x, u16 y)
  154. {
  155. /*
  156. * Magic from the MACH sources.
  157. *
  158. * Cx = x + D + H - P
  159. * P = 37 if 1:1, 52 if 4:1, 57 if 5:1
  160. * D = pixel skew between outdata and external data
  161. * H = pixels between HSYNCH falling and active video
  162. *
  163. * Cy = y + V - 32
  164. * V = scanlines between HSYNCH falling, two or more
  165. * clocks after VSYNCH falling, and active video
  166. */
  167. x += 412 - 52;
  168. y += 68 - 32;
  169. /* Use autoincrement. */
  170. bt431_select_reg(regs, BT431_REG_CXLO);
  171. bt431_write_reg_inc(regs, x & 0xff); /* BT431_REG_CXLO */
  172. bt431_write_reg_inc(regs, (x >> 8) & 0x0f); /* BT431_REG_CXHI */
  173. bt431_write_reg_inc(regs, y & 0xff); /* BT431_REG_CYLO */
  174. bt431_write_reg_inc(regs, (y >> 8) & 0x0f); /* BT431_REG_CYHI */
  175. }
  176. static inline void bt431_set_cursor(struct bt431_regs *regs,
  177. const char *data, const char *mask,
  178. u16 rop, u16 width, u16 height)
  179. {
  180. u16 x, y;
  181. int i;
  182. i = 0;
  183. width = DIV_ROUND_UP(width, 8);
  184. bt431_select_reg(regs, BT431_REG_CRAM_BASE);
  185. for (y = 0; y < BT431_CURSOR_SIZE; y++)
  186. for (x = 0; x < BT431_CURSOR_SIZE / 8; x++) {
  187. u16 val = 0;
  188. if (y < height && x < width) {
  189. val = mask[i];
  190. if (rop == ROP_XOR)
  191. val = (val << 8) | (val ^ data[i]);
  192. else
  193. val = (val << 8) | (val & data[i]);
  194. i++;
  195. }
  196. bt431_write_cmap_inc(regs, val);
  197. }
  198. }
  199. static inline void bt431_init_cursor(struct bt431_regs *regs)
  200. {
  201. /* no crosshair window */
  202. bt431_select_reg(regs, BT431_REG_WXLO);
  203. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WXLO */
  204. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WXHI */
  205. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WYLO */
  206. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WYHI */
  207. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WWLO */
  208. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WWHI */
  209. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WHLO */
  210. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WHHI */
  211. }