tdo24m.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * tdo24m - SPI-based drivers for Toppoly TDO24M series LCD panels
  4. *
  5. * Copyright (C) 2008 Marvell International Ltd.
  6. * Eric Miao <eric.miao@marvell.com>
  7. */
  8. #include <linux/module.h>
  9. #include <linux/kernel.h>
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/spi/spi.h>
  13. #include <linux/spi/tdo24m.h>
  14. #include <linux/fb.h>
  15. #include <linux/lcd.h>
  16. #include <linux/slab.h>
  17. #define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL)
  18. #define TDO24M_SPI_BUFF_SIZE (4)
  19. #define MODE_QVGA 0
  20. #define MODE_VGA 1
  21. struct tdo24m {
  22. struct spi_device *spi_dev;
  23. struct lcd_device *lcd_dev;
  24. struct spi_message msg;
  25. struct spi_transfer xfer;
  26. uint8_t *buf;
  27. int (*adj_mode)(struct tdo24m *lcd, int mode);
  28. int color_invert;
  29. int power;
  30. int mode;
  31. };
  32. /* use bit 30, 31 as the indicator of command parameter number */
  33. #define CMD0(x) ((0 << 30) | (x))
  34. #define CMD1(x, x1) ((1 << 30) | ((x) << 9) | 0x100 | (x1))
  35. #define CMD2(x, x1, x2) ((2 << 30) | ((x) << 18) | 0x20000 |\
  36. ((x1) << 9) | 0x100 | (x2))
  37. #define CMD_NULL (-1)
  38. static const uint32_t lcd_panel_reset[] = {
  39. CMD0(0x1), /* reset */
  40. CMD0(0x0), /* nop */
  41. CMD0(0x0), /* nop */
  42. CMD0(0x0), /* nop */
  43. CMD_NULL,
  44. };
  45. static const uint32_t lcd_panel_on[] = {
  46. CMD0(0x29), /* Display ON */
  47. CMD2(0xB8, 0xFF, 0xF9), /* Output Control */
  48. CMD0(0x11), /* Sleep out */
  49. CMD1(0xB0, 0x16), /* Wake */
  50. CMD_NULL,
  51. };
  52. static const uint32_t lcd_panel_off[] = {
  53. CMD0(0x28), /* Display OFF */
  54. CMD2(0xB8, 0x80, 0x02), /* Output Control */
  55. CMD0(0x10), /* Sleep in */
  56. CMD1(0xB0, 0x00), /* Deep stand by in */
  57. CMD_NULL,
  58. };
  59. static const uint32_t lcd_vga_pass_through_tdo24m[] = {
  60. CMD1(0xB0, 0x16),
  61. CMD1(0xBC, 0x80),
  62. CMD1(0xE1, 0x00),
  63. CMD1(0x36, 0x50),
  64. CMD1(0x3B, 0x00),
  65. CMD_NULL,
  66. };
  67. static const uint32_t lcd_qvga_pass_through_tdo24m[] = {
  68. CMD1(0xB0, 0x16),
  69. CMD1(0xBC, 0x81),
  70. CMD1(0xE1, 0x00),
  71. CMD1(0x36, 0x50),
  72. CMD1(0x3B, 0x22),
  73. CMD_NULL,
  74. };
  75. static const uint32_t lcd_vga_transfer_tdo24m[] = {
  76. CMD1(0xcf, 0x02), /* Blanking period control (1) */
  77. CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
  78. CMD1(0xd1, 0x01), /* CKV timing control on/off */
  79. CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */
  80. CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */
  81. CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */
  82. CMD1(0xd5, 0x14), /* ASW timing control (2) */
  83. CMD0(0x21), /* Invert for normally black display */
  84. CMD0(0x29), /* Display on */
  85. CMD_NULL,
  86. };
  87. static const uint32_t lcd_qvga_transfer[] = {
  88. CMD1(0xd6, 0x02), /* Blanking period control (1) */
  89. CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */
  90. CMD1(0xd8, 0x01), /* CKV timing control on/off */
  91. CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */
  92. CMD2(0xde, 0x05, 0x0a), /* OEV timing control */
  93. CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */
  94. CMD1(0xe0, 0x0a), /* ASW timing control (2) */
  95. CMD0(0x21), /* Invert for normally black display */
  96. CMD0(0x29), /* Display on */
  97. CMD_NULL,
  98. };
  99. static const uint32_t lcd_vga_pass_through_tdo35s[] = {
  100. CMD1(0xB0, 0x16),
  101. CMD1(0xBC, 0x80),
  102. CMD1(0xE1, 0x00),
  103. CMD1(0x3B, 0x00),
  104. CMD_NULL,
  105. };
  106. static const uint32_t lcd_qvga_pass_through_tdo35s[] = {
  107. CMD1(0xB0, 0x16),
  108. CMD1(0xBC, 0x81),
  109. CMD1(0xE1, 0x00),
  110. CMD1(0x3B, 0x22),
  111. CMD_NULL,
  112. };
  113. static const uint32_t lcd_vga_transfer_tdo35s[] = {
  114. CMD1(0xcf, 0x02), /* Blanking period control (1) */
  115. CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
  116. CMD1(0xd1, 0x01), /* CKV timing control on/off */
  117. CMD2(0xd2, 0x00, 0x1e), /* CKV 1,2 timing control */
  118. CMD2(0xd3, 0x14, 0x28), /* OEV timing control */
  119. CMD2(0xd4, 0x28, 0x64), /* ASW timing control (1) */
  120. CMD1(0xd5, 0x28), /* ASW timing control (2) */
  121. CMD0(0x21), /* Invert for normally black display */
  122. CMD0(0x29), /* Display on */
  123. CMD_NULL,
  124. };
  125. static const uint32_t lcd_panel_config[] = {
  126. CMD2(0xb8, 0xff, 0xf9), /* Output control */
  127. CMD0(0x11), /* sleep out */
  128. CMD1(0xba, 0x01), /* Display mode (1) */
  129. CMD1(0xbb, 0x00), /* Display mode (2) */
  130. CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */
  131. CMD1(0xbf, 0x10), /* Drive system change control */
  132. CMD1(0xb1, 0x56), /* Booster operation setup */
  133. CMD1(0xb2, 0x33), /* Booster mode setup */
  134. CMD1(0xb3, 0x11), /* Booster frequency setup */
  135. CMD1(0xb4, 0x02), /* Op amp/system clock */
  136. CMD1(0xb5, 0x35), /* VCS voltage */
  137. CMD1(0xb6, 0x40), /* VCOM voltage */
  138. CMD1(0xb7, 0x03), /* External display signal */
  139. CMD1(0xbd, 0x00), /* ASW slew rate */
  140. CMD1(0xbe, 0x00), /* Dummy data for QuadData operation */
  141. CMD1(0xc0, 0x11), /* Sleep out FR count (A) */
  142. CMD1(0xc1, 0x11), /* Sleep out FR count (B) */
  143. CMD1(0xc2, 0x11), /* Sleep out FR count (C) */
  144. CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */
  145. CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */
  146. CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */
  147. CMD1(0xc6, 0xc0), /* Sleep out FR count (G) */
  148. CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */
  149. CMD1(0xc8, 0x44), /* Gamma 1 fine tuning (2) */
  150. CMD1(0xc9, 0x33), /* Gamma 1 inclination adjustment */
  151. CMD1(0xca, 0x00), /* Gamma 1 blue offset adjustment */
  152. CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */
  153. CMD_NULL,
  154. };
  155. static int tdo24m_writes(struct tdo24m *lcd, const uint32_t *array)
  156. {
  157. struct spi_transfer *x = &lcd->xfer;
  158. const uint32_t *p = array;
  159. uint32_t data;
  160. int nparams, err = 0;
  161. for (; *p != CMD_NULL; p++) {
  162. if (!lcd->color_invert && *p == CMD0(0x21))
  163. continue;
  164. nparams = (*p >> 30) & 0x3;
  165. data = *p << (7 - nparams);
  166. switch (nparams) {
  167. case 0:
  168. lcd->buf[0] = (data >> 8) & 0xff;
  169. lcd->buf[1] = data & 0xff;
  170. break;
  171. case 1:
  172. lcd->buf[0] = (data >> 16) & 0xff;
  173. lcd->buf[1] = (data >> 8) & 0xff;
  174. lcd->buf[2] = data & 0xff;
  175. break;
  176. case 2:
  177. lcd->buf[0] = (data >> 24) & 0xff;
  178. lcd->buf[1] = (data >> 16) & 0xff;
  179. lcd->buf[2] = (data >> 8) & 0xff;
  180. lcd->buf[3] = data & 0xff;
  181. break;
  182. default:
  183. continue;
  184. }
  185. x->len = nparams + 2;
  186. err = spi_sync(lcd->spi_dev, &lcd->msg);
  187. if (err)
  188. break;
  189. }
  190. return err;
  191. }
  192. static int tdo24m_adj_mode(struct tdo24m *lcd, int mode)
  193. {
  194. switch (mode) {
  195. case MODE_VGA:
  196. tdo24m_writes(lcd, lcd_vga_pass_through_tdo24m);
  197. tdo24m_writes(lcd, lcd_panel_config);
  198. tdo24m_writes(lcd, lcd_vga_transfer_tdo24m);
  199. break;
  200. case MODE_QVGA:
  201. tdo24m_writes(lcd, lcd_qvga_pass_through_tdo24m);
  202. tdo24m_writes(lcd, lcd_panel_config);
  203. tdo24m_writes(lcd, lcd_qvga_transfer);
  204. break;
  205. default:
  206. return -EINVAL;
  207. }
  208. lcd->mode = mode;
  209. return 0;
  210. }
  211. static int tdo35s_adj_mode(struct tdo24m *lcd, int mode)
  212. {
  213. switch (mode) {
  214. case MODE_VGA:
  215. tdo24m_writes(lcd, lcd_vga_pass_through_tdo35s);
  216. tdo24m_writes(lcd, lcd_panel_config);
  217. tdo24m_writes(lcd, lcd_vga_transfer_tdo35s);
  218. break;
  219. case MODE_QVGA:
  220. tdo24m_writes(lcd, lcd_qvga_pass_through_tdo35s);
  221. tdo24m_writes(lcd, lcd_panel_config);
  222. tdo24m_writes(lcd, lcd_qvga_transfer);
  223. break;
  224. default:
  225. return -EINVAL;
  226. }
  227. lcd->mode = mode;
  228. return 0;
  229. }
  230. static int tdo24m_power_on(struct tdo24m *lcd)
  231. {
  232. int err;
  233. err = tdo24m_writes(lcd, lcd_panel_on);
  234. if (err)
  235. goto out;
  236. err = tdo24m_writes(lcd, lcd_panel_reset);
  237. if (err)
  238. goto out;
  239. err = lcd->adj_mode(lcd, lcd->mode);
  240. out:
  241. return err;
  242. }
  243. static int tdo24m_power_off(struct tdo24m *lcd)
  244. {
  245. return tdo24m_writes(lcd, lcd_panel_off);
  246. }
  247. static int tdo24m_power(struct tdo24m *lcd, int power)
  248. {
  249. int ret = 0;
  250. if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
  251. ret = tdo24m_power_on(lcd);
  252. else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
  253. ret = tdo24m_power_off(lcd);
  254. if (!ret)
  255. lcd->power = power;
  256. return ret;
  257. }
  258. static int tdo24m_set_power(struct lcd_device *ld, int power)
  259. {
  260. struct tdo24m *lcd = lcd_get_data(ld);
  261. return tdo24m_power(lcd, power);
  262. }
  263. static int tdo24m_get_power(struct lcd_device *ld)
  264. {
  265. struct tdo24m *lcd = lcd_get_data(ld);
  266. return lcd->power;
  267. }
  268. static int tdo24m_set_mode(struct lcd_device *ld, struct fb_videomode *m)
  269. {
  270. struct tdo24m *lcd = lcd_get_data(ld);
  271. int mode = MODE_QVGA;
  272. if (m->xres == 640 || m->xres == 480)
  273. mode = MODE_VGA;
  274. if (lcd->mode == mode)
  275. return 0;
  276. return lcd->adj_mode(lcd, mode);
  277. }
  278. static struct lcd_ops tdo24m_ops = {
  279. .get_power = tdo24m_get_power,
  280. .set_power = tdo24m_set_power,
  281. .set_mode = tdo24m_set_mode,
  282. };
  283. static int tdo24m_probe(struct spi_device *spi)
  284. {
  285. struct tdo24m *lcd;
  286. struct spi_message *m;
  287. struct spi_transfer *x;
  288. struct tdo24m_platform_data *pdata;
  289. enum tdo24m_model model;
  290. int err;
  291. pdata = dev_get_platdata(&spi->dev);
  292. if (pdata)
  293. model = pdata->model;
  294. else
  295. model = TDO24M;
  296. spi->bits_per_word = 8;
  297. spi->mode = SPI_MODE_3;
  298. err = spi_setup(spi);
  299. if (err)
  300. return err;
  301. lcd = devm_kzalloc(&spi->dev, sizeof(struct tdo24m), GFP_KERNEL);
  302. if (!lcd)
  303. return -ENOMEM;
  304. lcd->spi_dev = spi;
  305. lcd->power = FB_BLANK_POWERDOWN;
  306. lcd->mode = MODE_VGA; /* default to VGA */
  307. lcd->buf = devm_kzalloc(&spi->dev, TDO24M_SPI_BUFF_SIZE, GFP_KERNEL);
  308. if (lcd->buf == NULL)
  309. return -ENOMEM;
  310. m = &lcd->msg;
  311. x = &lcd->xfer;
  312. spi_message_init(m);
  313. x->cs_change = 0;
  314. x->tx_buf = &lcd->buf[0];
  315. spi_message_add_tail(x, m);
  316. switch (model) {
  317. case TDO24M:
  318. lcd->color_invert = 1;
  319. lcd->adj_mode = tdo24m_adj_mode;
  320. break;
  321. case TDO35S:
  322. lcd->adj_mode = tdo35s_adj_mode;
  323. lcd->color_invert = 0;
  324. break;
  325. default:
  326. dev_err(&spi->dev, "Unsupported model");
  327. return -EINVAL;
  328. }
  329. lcd->lcd_dev = devm_lcd_device_register(&spi->dev, "tdo24m", &spi->dev,
  330. lcd, &tdo24m_ops);
  331. if (IS_ERR(lcd->lcd_dev))
  332. return PTR_ERR(lcd->lcd_dev);
  333. spi_set_drvdata(spi, lcd);
  334. err = tdo24m_power(lcd, FB_BLANK_UNBLANK);
  335. if (err)
  336. return err;
  337. return 0;
  338. }
  339. static int tdo24m_remove(struct spi_device *spi)
  340. {
  341. struct tdo24m *lcd = spi_get_drvdata(spi);
  342. tdo24m_power(lcd, FB_BLANK_POWERDOWN);
  343. return 0;
  344. }
  345. #ifdef CONFIG_PM_SLEEP
  346. static int tdo24m_suspend(struct device *dev)
  347. {
  348. struct tdo24m *lcd = dev_get_drvdata(dev);
  349. return tdo24m_power(lcd, FB_BLANK_POWERDOWN);
  350. }
  351. static int tdo24m_resume(struct device *dev)
  352. {
  353. struct tdo24m *lcd = dev_get_drvdata(dev);
  354. return tdo24m_power(lcd, FB_BLANK_UNBLANK);
  355. }
  356. #endif
  357. static SIMPLE_DEV_PM_OPS(tdo24m_pm_ops, tdo24m_suspend, tdo24m_resume);
  358. /* Power down all displays on reboot, poweroff or halt */
  359. static void tdo24m_shutdown(struct spi_device *spi)
  360. {
  361. struct tdo24m *lcd = spi_get_drvdata(spi);
  362. tdo24m_power(lcd, FB_BLANK_POWERDOWN);
  363. }
  364. static struct spi_driver tdo24m_driver = {
  365. .driver = {
  366. .name = "tdo24m",
  367. .pm = &tdo24m_pm_ops,
  368. },
  369. .probe = tdo24m_probe,
  370. .remove = tdo24m_remove,
  371. .shutdown = tdo24m_shutdown,
  372. };
  373. module_spi_driver(tdo24m_driver);
  374. MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>");
  375. MODULE_DESCRIPTION("Driver for Toppoly TDO24M LCD Panel");
  376. MODULE_LICENSE("GPL");
  377. MODULE_ALIAS("spi:tdo24m");