mediatek.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2019 MediaTek Inc.
  4. *
  5. * Author:
  6. * Min Guo <min.guo@mediatek.com>
  7. * Yonglong Wu <yonglong.wu@mediatek.com>
  8. */
  9. #include <linux/clk.h>
  10. #include <linux/dma-mapping.h>
  11. #include <linux/module.h>
  12. #include <linux/of_platform.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/usb/role.h>
  15. #include <linux/usb/usb_phy_generic.h>
  16. #include "musb_core.h"
  17. #include "musb_dma.h"
  18. #define USB_L1INTS 0x00a0
  19. #define USB_L1INTM 0x00a4
  20. #define MTK_MUSB_TXFUNCADDR 0x0480
  21. /* MediaTek controller toggle enable and status reg */
  22. #define MUSB_RXTOG 0x80
  23. #define MUSB_RXTOGEN 0x82
  24. #define MUSB_TXTOG 0x84
  25. #define MUSB_TXTOGEN 0x86
  26. #define MTK_TOGGLE_EN GENMASK(15, 0)
  27. #define TX_INT_STATUS BIT(0)
  28. #define RX_INT_STATUS BIT(1)
  29. #define USBCOM_INT_STATUS BIT(2)
  30. #define DMA_INT_STATUS BIT(3)
  31. #define DMA_INTR_STATUS_MSK GENMASK(7, 0)
  32. #define DMA_INTR_UNMASK_SET_MSK GENMASK(31, 24)
  33. struct mtk_glue {
  34. struct device *dev;
  35. struct musb *musb;
  36. struct platform_device *musb_pdev;
  37. struct platform_device *usb_phy;
  38. struct phy *phy;
  39. struct usb_phy *xceiv;
  40. enum phy_mode phy_mode;
  41. struct clk *main;
  42. struct clk *mcu;
  43. struct clk *univpll;
  44. enum usb_role role;
  45. struct usb_role_switch *role_sw;
  46. };
  47. static int mtk_musb_clks_get(struct mtk_glue *glue)
  48. {
  49. struct device *dev = glue->dev;
  50. glue->main = devm_clk_get(dev, "main");
  51. if (IS_ERR(glue->main)) {
  52. dev_err(dev, "fail to get main clock\n");
  53. return PTR_ERR(glue->main);
  54. }
  55. glue->mcu = devm_clk_get(dev, "mcu");
  56. if (IS_ERR(glue->mcu)) {
  57. dev_err(dev, "fail to get mcu clock\n");
  58. return PTR_ERR(glue->mcu);
  59. }
  60. glue->univpll = devm_clk_get(dev, "univpll");
  61. if (IS_ERR(glue->univpll)) {
  62. dev_err(dev, "fail to get univpll clock\n");
  63. return PTR_ERR(glue->univpll);
  64. }
  65. return 0;
  66. }
  67. static int mtk_musb_clks_enable(struct mtk_glue *glue)
  68. {
  69. int ret;
  70. ret = clk_prepare_enable(glue->main);
  71. if (ret) {
  72. dev_err(glue->dev, "failed to enable main clock\n");
  73. goto err_main_clk;
  74. }
  75. ret = clk_prepare_enable(glue->mcu);
  76. if (ret) {
  77. dev_err(glue->dev, "failed to enable mcu clock\n");
  78. goto err_mcu_clk;
  79. }
  80. ret = clk_prepare_enable(glue->univpll);
  81. if (ret) {
  82. dev_err(glue->dev, "failed to enable univpll clock\n");
  83. goto err_univpll_clk;
  84. }
  85. return 0;
  86. err_univpll_clk:
  87. clk_disable_unprepare(glue->mcu);
  88. err_mcu_clk:
  89. clk_disable_unprepare(glue->main);
  90. err_main_clk:
  91. return ret;
  92. }
  93. static void mtk_musb_clks_disable(struct mtk_glue *glue)
  94. {
  95. clk_disable_unprepare(glue->univpll);
  96. clk_disable_unprepare(glue->mcu);
  97. clk_disable_unprepare(glue->main);
  98. }
  99. static int mtk_otg_switch_set(struct mtk_glue *glue, enum usb_role role)
  100. {
  101. struct musb *musb = glue->musb;
  102. u8 devctl = readb(musb->mregs + MUSB_DEVCTL);
  103. enum usb_role new_role;
  104. if (role == glue->role)
  105. return 0;
  106. switch (role) {
  107. case USB_ROLE_HOST:
  108. musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
  109. glue->phy_mode = PHY_MODE_USB_HOST;
  110. new_role = USB_ROLE_HOST;
  111. if (glue->role == USB_ROLE_NONE)
  112. phy_power_on(glue->phy);
  113. devctl |= MUSB_DEVCTL_SESSION;
  114. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  115. MUSB_HST_MODE(musb);
  116. break;
  117. case USB_ROLE_DEVICE:
  118. musb->xceiv->otg->state = OTG_STATE_B_IDLE;
  119. glue->phy_mode = PHY_MODE_USB_DEVICE;
  120. new_role = USB_ROLE_DEVICE;
  121. devctl &= ~MUSB_DEVCTL_SESSION;
  122. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  123. if (glue->role == USB_ROLE_NONE)
  124. phy_power_on(glue->phy);
  125. MUSB_DEV_MODE(musb);
  126. break;
  127. case USB_ROLE_NONE:
  128. glue->phy_mode = PHY_MODE_USB_OTG;
  129. new_role = USB_ROLE_NONE;
  130. devctl &= ~MUSB_DEVCTL_SESSION;
  131. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  132. if (glue->role != USB_ROLE_NONE)
  133. phy_power_off(glue->phy);
  134. break;
  135. default:
  136. dev_err(glue->dev, "Invalid State\n");
  137. return -EINVAL;
  138. }
  139. glue->role = new_role;
  140. phy_set_mode(glue->phy, glue->phy_mode);
  141. return 0;
  142. }
  143. static int musb_usb_role_sx_set(struct usb_role_switch *sw, enum usb_role role)
  144. {
  145. return mtk_otg_switch_set(usb_role_switch_get_drvdata(sw), role);
  146. }
  147. static enum usb_role musb_usb_role_sx_get(struct usb_role_switch *sw)
  148. {
  149. struct mtk_glue *glue = usb_role_switch_get_drvdata(sw);
  150. return glue->role;
  151. }
  152. static int mtk_otg_switch_init(struct mtk_glue *glue)
  153. {
  154. struct usb_role_switch_desc role_sx_desc = { 0 };
  155. role_sx_desc.set = musb_usb_role_sx_set;
  156. role_sx_desc.get = musb_usb_role_sx_get;
  157. role_sx_desc.fwnode = dev_fwnode(glue->dev);
  158. role_sx_desc.driver_data = glue;
  159. glue->role_sw = usb_role_switch_register(glue->dev, &role_sx_desc);
  160. return PTR_ERR_OR_ZERO(glue->role_sw);
  161. }
  162. static void mtk_otg_switch_exit(struct mtk_glue *glue)
  163. {
  164. return usb_role_switch_unregister(glue->role_sw);
  165. }
  166. static irqreturn_t generic_interrupt(int irq, void *__hci)
  167. {
  168. unsigned long flags;
  169. irqreturn_t retval = IRQ_NONE;
  170. struct musb *musb = __hci;
  171. spin_lock_irqsave(&musb->lock, flags);
  172. musb->int_usb = musb_clearb(musb->mregs, MUSB_INTRUSB);
  173. musb->int_rx = musb_clearw(musb->mregs, MUSB_INTRRX);
  174. musb->int_tx = musb_clearw(musb->mregs, MUSB_INTRTX);
  175. if ((musb->int_usb & MUSB_INTR_RESET) && !is_host_active(musb)) {
  176. /* ep0 FADDR must be 0 when (re)entering peripheral mode */
  177. musb_ep_select(musb->mregs, 0);
  178. musb_writeb(musb->mregs, MUSB_FADDR, 0);
  179. }
  180. if (musb->int_usb || musb->int_tx || musb->int_rx)
  181. retval = musb_interrupt(musb);
  182. spin_unlock_irqrestore(&musb->lock, flags);
  183. return retval;
  184. }
  185. static irqreturn_t mtk_musb_interrupt(int irq, void *dev_id)
  186. {
  187. irqreturn_t retval = IRQ_NONE;
  188. struct musb *musb = (struct musb *)dev_id;
  189. u32 l1_ints;
  190. l1_ints = musb_readl(musb->mregs, USB_L1INTS) &
  191. musb_readl(musb->mregs, USB_L1INTM);
  192. if (l1_ints & (TX_INT_STATUS | RX_INT_STATUS | USBCOM_INT_STATUS))
  193. retval = generic_interrupt(irq, musb);
  194. #if defined(CONFIG_USB_INVENTRA_DMA)
  195. if (l1_ints & DMA_INT_STATUS)
  196. retval = dma_controller_irq(irq, musb->dma_controller);
  197. #endif
  198. return retval;
  199. }
  200. static u32 mtk_musb_busctl_offset(u8 epnum, u16 offset)
  201. {
  202. return MTK_MUSB_TXFUNCADDR + offset + 8 * epnum;
  203. }
  204. static u8 mtk_musb_clearb(void __iomem *addr, unsigned int offset)
  205. {
  206. u8 data;
  207. /* W1C */
  208. data = musb_readb(addr, offset);
  209. musb_writeb(addr, offset, data);
  210. return data;
  211. }
  212. static u16 mtk_musb_clearw(void __iomem *addr, unsigned int offset)
  213. {
  214. u16 data;
  215. /* W1C */
  216. data = musb_readw(addr, offset);
  217. musb_writew(addr, offset, data);
  218. return data;
  219. }
  220. static int mtk_musb_set_mode(struct musb *musb, u8 mode)
  221. {
  222. struct device *dev = musb->controller;
  223. struct mtk_glue *glue = dev_get_drvdata(dev->parent);
  224. enum phy_mode new_mode;
  225. enum usb_role new_role;
  226. switch (mode) {
  227. case MUSB_HOST:
  228. new_mode = PHY_MODE_USB_HOST;
  229. new_role = USB_ROLE_HOST;
  230. break;
  231. case MUSB_PERIPHERAL:
  232. new_mode = PHY_MODE_USB_DEVICE;
  233. new_role = USB_ROLE_DEVICE;
  234. break;
  235. case MUSB_OTG:
  236. new_mode = PHY_MODE_USB_OTG;
  237. new_role = USB_ROLE_NONE;
  238. break;
  239. default:
  240. dev_err(glue->dev, "Invalid mode request\n");
  241. return -EINVAL;
  242. }
  243. if (glue->phy_mode == new_mode)
  244. return 0;
  245. if (musb->port_mode != MUSB_OTG) {
  246. dev_err(glue->dev, "Does not support changing modes\n");
  247. return -EINVAL;
  248. }
  249. mtk_otg_switch_set(glue, new_role);
  250. return 0;
  251. }
  252. static int mtk_musb_init(struct musb *musb)
  253. {
  254. struct device *dev = musb->controller;
  255. struct mtk_glue *glue = dev_get_drvdata(dev->parent);
  256. int ret;
  257. glue->musb = musb;
  258. musb->phy = glue->phy;
  259. musb->xceiv = glue->xceiv;
  260. musb->is_host = false;
  261. musb->isr = mtk_musb_interrupt;
  262. /* Set TX/RX toggle enable */
  263. musb_writew(musb->mregs, MUSB_TXTOGEN, MTK_TOGGLE_EN);
  264. musb_writew(musb->mregs, MUSB_RXTOGEN, MTK_TOGGLE_EN);
  265. if (musb->port_mode == MUSB_OTG) {
  266. ret = mtk_otg_switch_init(glue);
  267. if (ret)
  268. return ret;
  269. }
  270. ret = phy_init(glue->phy);
  271. if (ret)
  272. goto err_phy_init;
  273. ret = phy_power_on(glue->phy);
  274. if (ret)
  275. goto err_phy_power_on;
  276. phy_set_mode(glue->phy, glue->phy_mode);
  277. #if defined(CONFIG_USB_INVENTRA_DMA)
  278. musb_writel(musb->mregs, MUSB_HSDMA_INTR,
  279. DMA_INTR_STATUS_MSK | DMA_INTR_UNMASK_SET_MSK);
  280. #endif
  281. musb_writel(musb->mregs, USB_L1INTM, TX_INT_STATUS | RX_INT_STATUS |
  282. USBCOM_INT_STATUS | DMA_INT_STATUS);
  283. return 0;
  284. err_phy_power_on:
  285. phy_exit(glue->phy);
  286. err_phy_init:
  287. mtk_otg_switch_exit(glue);
  288. return ret;
  289. }
  290. static u16 mtk_musb_get_toggle(struct musb_qh *qh, int is_out)
  291. {
  292. struct musb *musb = qh->hw_ep->musb;
  293. u8 epnum = qh->hw_ep->epnum;
  294. u16 toggle;
  295. toggle = musb_readw(musb->mregs, is_out ? MUSB_TXTOG : MUSB_RXTOG);
  296. return toggle & (1 << epnum);
  297. }
  298. static u16 mtk_musb_set_toggle(struct musb_qh *qh, int is_out, struct urb *urb)
  299. {
  300. struct musb *musb = qh->hw_ep->musb;
  301. u8 epnum = qh->hw_ep->epnum;
  302. u16 value, toggle;
  303. toggle = usb_gettoggle(urb->dev, qh->epnum, is_out);
  304. if (is_out) {
  305. value = musb_readw(musb->mregs, MUSB_TXTOG);
  306. value |= toggle << epnum;
  307. musb_writew(musb->mregs, MUSB_TXTOG, value);
  308. } else {
  309. value = musb_readw(musb->mregs, MUSB_RXTOG);
  310. value |= toggle << epnum;
  311. musb_writew(musb->mregs, MUSB_RXTOG, value);
  312. }
  313. return 0;
  314. }
  315. static int mtk_musb_exit(struct musb *musb)
  316. {
  317. struct device *dev = musb->controller;
  318. struct mtk_glue *glue = dev_get_drvdata(dev->parent);
  319. mtk_otg_switch_exit(glue);
  320. phy_power_off(glue->phy);
  321. phy_exit(glue->phy);
  322. mtk_musb_clks_disable(glue);
  323. pm_runtime_put_sync(dev);
  324. pm_runtime_disable(dev);
  325. return 0;
  326. }
  327. static const struct musb_platform_ops mtk_musb_ops = {
  328. .quirks = MUSB_DMA_INVENTRA,
  329. .init = mtk_musb_init,
  330. .get_toggle = mtk_musb_get_toggle,
  331. .set_toggle = mtk_musb_set_toggle,
  332. .exit = mtk_musb_exit,
  333. #ifdef CONFIG_USB_INVENTRA_DMA
  334. .dma_init = musbhs_dma_controller_create_noirq,
  335. .dma_exit = musbhs_dma_controller_destroy,
  336. #endif
  337. .clearb = mtk_musb_clearb,
  338. .clearw = mtk_musb_clearw,
  339. .busctl_offset = mtk_musb_busctl_offset,
  340. .set_mode = mtk_musb_set_mode,
  341. };
  342. #define MTK_MUSB_MAX_EP_NUM 8
  343. #define MTK_MUSB_RAM_BITS 11
  344. static struct musb_fifo_cfg mtk_musb_mode_cfg[] = {
  345. { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
  346. { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
  347. { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
  348. { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
  349. { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
  350. { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
  351. { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
  352. { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
  353. { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
  354. { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
  355. { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 1024, },
  356. { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 1024, },
  357. { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, },
  358. { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 64, },
  359. };
  360. static const struct musb_hdrc_config mtk_musb_hdrc_config = {
  361. .fifo_cfg = mtk_musb_mode_cfg,
  362. .fifo_cfg_size = ARRAY_SIZE(mtk_musb_mode_cfg),
  363. .multipoint = true,
  364. .dyn_fifo = true,
  365. .num_eps = MTK_MUSB_MAX_EP_NUM,
  366. .ram_bits = MTK_MUSB_RAM_BITS,
  367. };
  368. static const struct platform_device_info mtk_dev_info = {
  369. .name = "musb-hdrc",
  370. .id = PLATFORM_DEVID_AUTO,
  371. .dma_mask = DMA_BIT_MASK(32),
  372. };
  373. static int mtk_musb_probe(struct platform_device *pdev)
  374. {
  375. struct musb_hdrc_platform_data *pdata;
  376. struct mtk_glue *glue;
  377. struct platform_device_info pinfo;
  378. struct device *dev = &pdev->dev;
  379. struct device_node *np = dev->of_node;
  380. int ret;
  381. glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL);
  382. if (!glue)
  383. return -ENOMEM;
  384. glue->dev = dev;
  385. pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
  386. if (!pdata)
  387. return -ENOMEM;
  388. ret = of_platform_populate(np, NULL, NULL, dev);
  389. if (ret) {
  390. dev_err(dev, "failed to create child devices at %p\n", np);
  391. return ret;
  392. }
  393. ret = mtk_musb_clks_get(glue);
  394. if (ret)
  395. return ret;
  396. pdata->config = &mtk_musb_hdrc_config;
  397. pdata->platform_ops = &mtk_musb_ops;
  398. pdata->mode = usb_get_dr_mode(dev);
  399. if (IS_ENABLED(CONFIG_USB_MUSB_HOST))
  400. pdata->mode = USB_DR_MODE_HOST;
  401. else if (IS_ENABLED(CONFIG_USB_MUSB_GADGET))
  402. pdata->mode = USB_DR_MODE_PERIPHERAL;
  403. switch (pdata->mode) {
  404. case USB_DR_MODE_HOST:
  405. glue->phy_mode = PHY_MODE_USB_HOST;
  406. glue->role = USB_ROLE_HOST;
  407. break;
  408. case USB_DR_MODE_PERIPHERAL:
  409. glue->phy_mode = PHY_MODE_USB_DEVICE;
  410. glue->role = USB_ROLE_DEVICE;
  411. break;
  412. case USB_DR_MODE_OTG:
  413. glue->phy_mode = PHY_MODE_USB_OTG;
  414. glue->role = USB_ROLE_NONE;
  415. break;
  416. default:
  417. dev_err(&pdev->dev, "Error 'dr_mode' property\n");
  418. return -EINVAL;
  419. }
  420. glue->phy = devm_of_phy_get_by_index(dev, np, 0);
  421. if (IS_ERR(glue->phy)) {
  422. dev_err(dev, "fail to getting phy %ld\n",
  423. PTR_ERR(glue->phy));
  424. return PTR_ERR(glue->phy);
  425. }
  426. glue->usb_phy = usb_phy_generic_register();
  427. if (IS_ERR(glue->usb_phy)) {
  428. dev_err(dev, "fail to registering usb-phy %ld\n",
  429. PTR_ERR(glue->usb_phy));
  430. return PTR_ERR(glue->usb_phy);
  431. }
  432. glue->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
  433. if (IS_ERR(glue->xceiv)) {
  434. ret = PTR_ERR(glue->xceiv);
  435. dev_err(dev, "fail to getting usb-phy %d\n", ret);
  436. goto err_unregister_usb_phy;
  437. }
  438. platform_set_drvdata(pdev, glue);
  439. pm_runtime_enable(dev);
  440. pm_runtime_get_sync(dev);
  441. ret = mtk_musb_clks_enable(glue);
  442. if (ret)
  443. goto err_enable_clk;
  444. pinfo = mtk_dev_info;
  445. pinfo.parent = dev;
  446. pinfo.res = pdev->resource;
  447. pinfo.num_res = pdev->num_resources;
  448. pinfo.data = pdata;
  449. pinfo.size_data = sizeof(*pdata);
  450. glue->musb_pdev = platform_device_register_full(&pinfo);
  451. if (IS_ERR(glue->musb_pdev)) {
  452. ret = PTR_ERR(glue->musb_pdev);
  453. dev_err(dev, "failed to register musb device: %d\n", ret);
  454. goto err_device_register;
  455. }
  456. return 0;
  457. err_device_register:
  458. mtk_musb_clks_disable(glue);
  459. err_enable_clk:
  460. pm_runtime_put_sync(dev);
  461. pm_runtime_disable(dev);
  462. err_unregister_usb_phy:
  463. usb_phy_generic_unregister(glue->usb_phy);
  464. return ret;
  465. }
  466. static int mtk_musb_remove(struct platform_device *pdev)
  467. {
  468. struct mtk_glue *glue = platform_get_drvdata(pdev);
  469. struct platform_device *usb_phy = glue->usb_phy;
  470. platform_device_unregister(glue->musb_pdev);
  471. usb_phy_generic_unregister(usb_phy);
  472. return 0;
  473. }
  474. #ifdef CONFIG_OF
  475. static const struct of_device_id mtk_musb_match[] = {
  476. {.compatible = "mediatek,mtk-musb",},
  477. {},
  478. };
  479. MODULE_DEVICE_TABLE(of, mtk_musb_match);
  480. #endif
  481. static struct platform_driver mtk_musb_driver = {
  482. .probe = mtk_musb_probe,
  483. .remove = mtk_musb_remove,
  484. .driver = {
  485. .name = "musb-mtk",
  486. .of_match_table = of_match_ptr(mtk_musb_match),
  487. },
  488. };
  489. module_platform_driver(mtk_musb_driver);
  490. MODULE_DESCRIPTION("MediaTek MUSB Glue Layer");
  491. MODULE_AUTHOR("Min Guo <min.guo@mediatek.com>");
  492. MODULE_LICENSE("GPL v2");