davinci.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2005-2006 by Texas Instruments
  4. *
  5. * This file is part of the Inventra Controller Driver for Linux.
  6. */
  7. #include <linux/module.h>
  8. #include <linux/kernel.h>
  9. #include <linux/sched.h>
  10. #include <linux/list.h>
  11. #include <linux/delay.h>
  12. #include <linux/clk.h>
  13. #include <linux/err.h>
  14. #include <linux/io.h>
  15. #include <linux/gpio/consumer.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/usb/usb_phy_generic.h>
  19. #include <mach/cputype.h>
  20. #include <mach/hardware.h>
  21. #include <asm/mach-types.h>
  22. #include "musb_core.h"
  23. #include "davinci.h"
  24. #include "cppi_dma.h"
  25. #define USB_PHY_CTRL IO_ADDRESS(USBPHY_CTL_PADDR)
  26. #define DM355_DEEPSLEEP IO_ADDRESS(DM355_DEEPSLEEP_PADDR)
  27. struct davinci_glue {
  28. struct device *dev;
  29. struct platform_device *musb;
  30. struct clk *clk;
  31. bool vbus_state;
  32. struct gpio_desc *vbus;
  33. struct work_struct vbus_work;
  34. };
  35. /* REVISIT (PM) we should be able to keep the PHY in low power mode most
  36. * of the time (24 MHZ oscillator and PLL off, etc) by setting POWER.D0
  37. * and, when in host mode, autosuspending idle root ports... PHYPLLON
  38. * (overriding SUSPENDM?) then likely needs to stay off.
  39. */
  40. static inline void phy_on(void)
  41. {
  42. u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
  43. /* power everything up; start the on-chip PHY and its PLL */
  44. phy_ctrl &= ~(USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN);
  45. phy_ctrl |= USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON;
  46. __raw_writel(phy_ctrl, USB_PHY_CTRL);
  47. /* wait for PLL to lock before proceeding */
  48. while ((__raw_readl(USB_PHY_CTRL) & USBPHY_PHYCLKGD) == 0)
  49. cpu_relax();
  50. }
  51. static inline void phy_off(void)
  52. {
  53. u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
  54. /* powerdown the on-chip PHY, its PLL, and the OTG block */
  55. phy_ctrl &= ~(USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON);
  56. phy_ctrl |= USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN;
  57. __raw_writel(phy_ctrl, USB_PHY_CTRL);
  58. }
  59. static int dma_off = 1;
  60. static void davinci_musb_enable(struct musb *musb)
  61. {
  62. u32 tmp, old, val;
  63. /* workaround: setup irqs through both register sets */
  64. tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK)
  65. << DAVINCI_USB_TXINT_SHIFT;
  66. musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
  67. old = tmp;
  68. tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK))
  69. << DAVINCI_USB_RXINT_SHIFT;
  70. musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
  71. tmp |= old;
  72. val = ~MUSB_INTR_SOF;
  73. tmp |= ((val & 0x01ff) << DAVINCI_USB_USBINT_SHIFT);
  74. musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
  75. if (is_dma_capable() && !dma_off)
  76. printk(KERN_WARNING "%s %s: dma not reactivated\n",
  77. __FILE__, __func__);
  78. else
  79. dma_off = 0;
  80. /* force a DRVVBUS irq so we can start polling for ID change */
  81. musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
  82. DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT);
  83. }
  84. /*
  85. * Disable the HDRC and flush interrupts
  86. */
  87. static void davinci_musb_disable(struct musb *musb)
  88. {
  89. /* because we don't set CTRLR.UINT, "important" to:
  90. * - not read/write INTRUSB/INTRUSBE
  91. * - (except during initial setup, as workaround)
  92. * - use INTSETR/INTCLRR instead
  93. */
  94. musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_CLR_REG,
  95. DAVINCI_USB_USBINT_MASK
  96. | DAVINCI_USB_TXINT_MASK
  97. | DAVINCI_USB_RXINT_MASK);
  98. musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0);
  99. if (is_dma_capable() && !dma_off)
  100. WARNING("dma still active\n");
  101. }
  102. #define portstate(stmt) stmt
  103. /*
  104. * VBUS SWITCHING IS BOARD-SPECIFIC ... at least for the DM6446 EVM,
  105. * which doesn't wire DRVVBUS to the FET that switches it. Unclear
  106. * if that's a problem with the DM6446 chip or just with that board.
  107. *
  108. * In either case, the DM355 EVM automates DRVVBUS the normal way,
  109. * when J10 is out, and TI documents it as handling OTG.
  110. */
  111. /* I2C operations are always synchronous, and require a task context.
  112. * With unloaded systems, using the shared workqueue seems to suffice
  113. * to satisfy the 100msec A_WAIT_VRISE timeout...
  114. */
  115. static void evm_deferred_drvvbus(struct work_struct *work)
  116. {
  117. struct davinci_glue *glue = container_of(work, struct davinci_glue,
  118. vbus_work);
  119. gpiod_set_value_cansleep(glue->vbus, glue->vbus_state);
  120. glue->vbus_state = !glue->vbus_state;
  121. }
  122. static void davinci_musb_source_power(struct musb *musb, int is_on,
  123. int immediate)
  124. {
  125. struct davinci_glue *glue = dev_get_drvdata(musb->controller->parent);
  126. /* This GPIO handling is entirely optional */
  127. if (!glue->vbus)
  128. return;
  129. if (is_on)
  130. is_on = 1;
  131. if (glue->vbus_state == is_on)
  132. return;
  133. /* 0/1 vs "-1 == unknown/init" */
  134. glue->vbus_state = !is_on;
  135. if (machine_is_davinci_evm()) {
  136. if (immediate)
  137. gpiod_set_value_cansleep(glue->vbus, glue->vbus_state);
  138. else
  139. schedule_work(&glue->vbus_work);
  140. }
  141. if (immediate)
  142. glue->vbus_state = is_on;
  143. }
  144. static void davinci_musb_set_vbus(struct musb *musb, int is_on)
  145. {
  146. WARN_ON(is_on && is_peripheral_active(musb));
  147. davinci_musb_source_power(musb, is_on, 0);
  148. }
  149. #define POLL_SECONDS 2
  150. static void otg_timer(struct timer_list *t)
  151. {
  152. struct musb *musb = from_timer(musb, t, dev_timer);
  153. void __iomem *mregs = musb->mregs;
  154. u8 devctl;
  155. unsigned long flags;
  156. /* We poll because DaVinci's won't expose several OTG-critical
  157. * status change events (from the transceiver) otherwise.
  158. */
  159. devctl = musb_readb(mregs, MUSB_DEVCTL);
  160. dev_dbg(musb->controller, "poll devctl %02x (%s)\n", devctl,
  161. usb_otg_state_string(musb->xceiv->otg->state));
  162. spin_lock_irqsave(&musb->lock, flags);
  163. switch (musb->xceiv->otg->state) {
  164. case OTG_STATE_A_WAIT_VFALL:
  165. /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL
  166. * seems to mis-handle session "start" otherwise (or in our
  167. * case "recover"), in routine "VBUS was valid by the time
  168. * VBUSERR got reported during enumeration" cases.
  169. */
  170. if (devctl & MUSB_DEVCTL_VBUS) {
  171. mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
  172. break;
  173. }
  174. musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
  175. musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
  176. MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT);
  177. break;
  178. case OTG_STATE_B_IDLE:
  179. /*
  180. * There's no ID-changed IRQ, so we have no good way to tell
  181. * when to switch to the A-Default state machine (by setting
  182. * the DEVCTL.SESSION flag).
  183. *
  184. * Workaround: whenever we're in B_IDLE, try setting the
  185. * session flag every few seconds. If it works, ID was
  186. * grounded and we're now in the A-Default state machine.
  187. *
  188. * NOTE setting the session flag is _supposed_ to trigger
  189. * SRP, but clearly it doesn't.
  190. */
  191. musb_writeb(mregs, MUSB_DEVCTL,
  192. devctl | MUSB_DEVCTL_SESSION);
  193. devctl = musb_readb(mregs, MUSB_DEVCTL);
  194. if (devctl & MUSB_DEVCTL_BDEVICE)
  195. mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
  196. else
  197. musb->xceiv->otg->state = OTG_STATE_A_IDLE;
  198. break;
  199. default:
  200. break;
  201. }
  202. spin_unlock_irqrestore(&musb->lock, flags);
  203. }
  204. static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
  205. {
  206. unsigned long flags;
  207. irqreturn_t retval = IRQ_NONE;
  208. struct musb *musb = __hci;
  209. struct usb_otg *otg = musb->xceiv->otg;
  210. void __iomem *tibase = musb->ctrl_base;
  211. struct cppi *cppi;
  212. u32 tmp;
  213. spin_lock_irqsave(&musb->lock, flags);
  214. /* NOTE: DaVinci shadows the Mentor IRQs. Don't manage them through
  215. * the Mentor registers (except for setup), use the TI ones and EOI.
  216. *
  217. * Docs describe irq "vector" registers associated with the CPPI and
  218. * USB EOI registers. These hold a bitmask corresponding to the
  219. * current IRQ, not an irq handler address. Would using those bits
  220. * resolve some of the races observed in this dispatch code??
  221. */
  222. /* CPPI interrupts share the same IRQ line, but have their own
  223. * mask, state, "vector", and EOI registers.
  224. */
  225. cppi = container_of(musb->dma_controller, struct cppi, controller);
  226. if (is_cppi_enabled(musb) && musb->dma_controller && !cppi->irq)
  227. retval = cppi_interrupt(irq, __hci);
  228. /* ack and handle non-CPPI interrupts */
  229. tmp = musb_readl(tibase, DAVINCI_USB_INT_SRC_MASKED_REG);
  230. musb_writel(tibase, DAVINCI_USB_INT_SRC_CLR_REG, tmp);
  231. dev_dbg(musb->controller, "IRQ %08x\n", tmp);
  232. musb->int_rx = (tmp & DAVINCI_USB_RXINT_MASK)
  233. >> DAVINCI_USB_RXINT_SHIFT;
  234. musb->int_tx = (tmp & DAVINCI_USB_TXINT_MASK)
  235. >> DAVINCI_USB_TXINT_SHIFT;
  236. musb->int_usb = (tmp & DAVINCI_USB_USBINT_MASK)
  237. >> DAVINCI_USB_USBINT_SHIFT;
  238. /* DRVVBUS irqs are the only proxy we have (a very poor one!) for
  239. * DaVinci's missing ID change IRQ. We need an ID change IRQ to
  240. * switch appropriately between halves of the OTG state machine.
  241. * Managing DEVCTL.SESSION per Mentor docs requires we know its
  242. * value, but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
  243. * Also, DRVVBUS pulses for SRP (but not at 5V) ...
  244. */
  245. if (tmp & (DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT)) {
  246. int drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG);
  247. void __iomem *mregs = musb->mregs;
  248. u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
  249. int err = musb->int_usb & MUSB_INTR_VBUSERROR;
  250. err = musb->int_usb & MUSB_INTR_VBUSERROR;
  251. if (err) {
  252. /* The Mentor core doesn't debounce VBUS as needed
  253. * to cope with device connect current spikes. This
  254. * means it's not uncommon for bus-powered devices
  255. * to get VBUS errors during enumeration.
  256. *
  257. * This is a workaround, but newer RTL from Mentor
  258. * seems to allow a better one: "re"starting sessions
  259. * without waiting (on EVM, a **long** time) for VBUS
  260. * to stop registering in devctl.
  261. */
  262. musb->int_usb &= ~MUSB_INTR_VBUSERROR;
  263. musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
  264. mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
  265. WARNING("VBUS error workaround (delay coming)\n");
  266. } else if (drvvbus) {
  267. MUSB_HST_MODE(musb);
  268. musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
  269. portstate(musb->port1_status |= USB_PORT_STAT_POWER);
  270. del_timer(&musb->dev_timer);
  271. } else {
  272. musb->is_active = 0;
  273. MUSB_DEV_MODE(musb);
  274. musb->xceiv->otg->state = OTG_STATE_B_IDLE;
  275. portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
  276. }
  277. /* NOTE: this must complete poweron within 100 msec
  278. * (OTG_TIME_A_WAIT_VRISE) but we don't check for that.
  279. */
  280. davinci_musb_source_power(musb, drvvbus, 0);
  281. dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
  282. drvvbus ? "on" : "off",
  283. usb_otg_state_string(musb->xceiv->otg->state),
  284. err ? " ERROR" : "",
  285. devctl);
  286. retval = IRQ_HANDLED;
  287. }
  288. if (musb->int_tx || musb->int_rx || musb->int_usb)
  289. retval |= musb_interrupt(musb);
  290. /* irq stays asserted until EOI is written */
  291. musb_writel(tibase, DAVINCI_USB_EOI_REG, 0);
  292. /* poll for ID change */
  293. if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
  294. mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
  295. spin_unlock_irqrestore(&musb->lock, flags);
  296. return retval;
  297. }
  298. static int davinci_musb_set_mode(struct musb *musb, u8 mode)
  299. {
  300. /* EVM can't do this (right?) */
  301. return -EIO;
  302. }
  303. static int davinci_musb_init(struct musb *musb)
  304. {
  305. void __iomem *tibase = musb->ctrl_base;
  306. u32 revision;
  307. int ret = -ENODEV;
  308. musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
  309. if (IS_ERR_OR_NULL(musb->xceiv)) {
  310. ret = -EPROBE_DEFER;
  311. goto unregister;
  312. }
  313. musb->mregs += DAVINCI_BASE_OFFSET;
  314. /* returns zero if e.g. not clocked */
  315. revision = musb_readl(tibase, DAVINCI_USB_VERSION_REG);
  316. if (revision == 0)
  317. goto fail;
  318. timer_setup(&musb->dev_timer, otg_timer, 0);
  319. davinci_musb_source_power(musb, 0, 1);
  320. /* dm355 EVM swaps D+/D- for signal integrity, and
  321. * is clocked from the main 24 MHz crystal.
  322. */
  323. if (machine_is_davinci_dm355_evm()) {
  324. u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
  325. phy_ctrl &= ~(3 << 9);
  326. phy_ctrl |= USBPHY_DATAPOL;
  327. __raw_writel(phy_ctrl, USB_PHY_CTRL);
  328. }
  329. /* On dm355, the default-A state machine needs DRVVBUS control.
  330. * If we won't be a host, there's no need to turn it on.
  331. */
  332. if (cpu_is_davinci_dm355()) {
  333. u32 deepsleep = __raw_readl(DM355_DEEPSLEEP);
  334. deepsleep &= ~DRVVBUS_FORCE;
  335. __raw_writel(deepsleep, DM355_DEEPSLEEP);
  336. }
  337. /* reset the controller */
  338. musb_writel(tibase, DAVINCI_USB_CTRL_REG, 0x1);
  339. /* start the on-chip PHY and its PLL */
  340. phy_on();
  341. msleep(5);
  342. /* NOTE: irqs are in mixed mode, not bypass to pure-musb */
  343. pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n",
  344. revision, __raw_readl(USB_PHY_CTRL),
  345. musb_readb(tibase, DAVINCI_USB_CTRL_REG));
  346. musb->isr = davinci_musb_interrupt;
  347. return 0;
  348. fail:
  349. usb_put_phy(musb->xceiv);
  350. unregister:
  351. usb_phy_generic_unregister();
  352. return ret;
  353. }
  354. static int davinci_musb_exit(struct musb *musb)
  355. {
  356. int maxdelay = 30;
  357. u8 devctl, warn = 0;
  358. del_timer_sync(&musb->dev_timer);
  359. /* force VBUS off */
  360. if (cpu_is_davinci_dm355()) {
  361. u32 deepsleep = __raw_readl(DM355_DEEPSLEEP);
  362. deepsleep &= ~DRVVBUS_FORCE;
  363. deepsleep |= DRVVBUS_OVERRIDE;
  364. __raw_writel(deepsleep, DM355_DEEPSLEEP);
  365. }
  366. davinci_musb_source_power(musb, 0 /*off*/, 1);
  367. /*
  368. * delay, to avoid problems with module reload.
  369. * if there's no peripheral connected, this can take a
  370. * long time to fall, especially on EVM with huge C133.
  371. */
  372. do {
  373. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  374. if (!(devctl & MUSB_DEVCTL_VBUS))
  375. break;
  376. if ((devctl & MUSB_DEVCTL_VBUS) != warn) {
  377. warn = devctl & MUSB_DEVCTL_VBUS;
  378. dev_dbg(musb->controller, "VBUS %d\n",
  379. warn >> MUSB_DEVCTL_VBUS_SHIFT);
  380. }
  381. msleep(1000);
  382. maxdelay--;
  383. } while (maxdelay > 0);
  384. /* in OTG mode, another host might be connected */
  385. if (devctl & MUSB_DEVCTL_VBUS)
  386. dev_dbg(musb->controller, "VBUS off timeout (devctl %02x)\n", devctl);
  387. phy_off();
  388. usb_put_phy(musb->xceiv);
  389. return 0;
  390. }
  391. static const struct musb_platform_ops davinci_ops = {
  392. .quirks = MUSB_DMA_CPPI,
  393. .init = davinci_musb_init,
  394. .exit = davinci_musb_exit,
  395. #ifdef CONFIG_USB_TI_CPPI_DMA
  396. .dma_init = cppi_dma_controller_create,
  397. .dma_exit = cppi_dma_controller_destroy,
  398. #endif
  399. .enable = davinci_musb_enable,
  400. .disable = davinci_musb_disable,
  401. .set_mode = davinci_musb_set_mode,
  402. .set_vbus = davinci_musb_set_vbus,
  403. };
  404. static const struct platform_device_info davinci_dev_info = {
  405. .name = "musb-hdrc",
  406. .id = PLATFORM_DEVID_AUTO,
  407. .dma_mask = DMA_BIT_MASK(32),
  408. };
  409. static int davinci_probe(struct platform_device *pdev)
  410. {
  411. struct resource musb_resources[3];
  412. struct musb_hdrc_platform_data *pdata = dev_get_platdata(&pdev->dev);
  413. struct platform_device *musb;
  414. struct davinci_glue *glue;
  415. struct platform_device_info pinfo;
  416. struct clk *clk;
  417. int ret = -ENOMEM;
  418. glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
  419. if (!glue)
  420. goto err0;
  421. clk = devm_clk_get(&pdev->dev, "usb");
  422. if (IS_ERR(clk)) {
  423. dev_err(&pdev->dev, "failed to get clock\n");
  424. ret = PTR_ERR(clk);
  425. goto err0;
  426. }
  427. ret = clk_enable(clk);
  428. if (ret) {
  429. dev_err(&pdev->dev, "failed to enable clock\n");
  430. goto err0;
  431. }
  432. glue->dev = &pdev->dev;
  433. glue->clk = clk;
  434. pdata->platform_ops = &davinci_ops;
  435. glue->vbus = devm_gpiod_get_optional(&pdev->dev, NULL, GPIOD_OUT_LOW);
  436. if (IS_ERR(glue->vbus)) {
  437. ret = PTR_ERR(glue->vbus);
  438. goto err0;
  439. } else {
  440. glue->vbus_state = -1;
  441. INIT_WORK(&glue->vbus_work, evm_deferred_drvvbus);
  442. }
  443. usb_phy_generic_register();
  444. platform_set_drvdata(pdev, glue);
  445. memset(musb_resources, 0x00, sizeof(*musb_resources) *
  446. ARRAY_SIZE(musb_resources));
  447. musb_resources[0].name = pdev->resource[0].name;
  448. musb_resources[0].start = pdev->resource[0].start;
  449. musb_resources[0].end = pdev->resource[0].end;
  450. musb_resources[0].flags = pdev->resource[0].flags;
  451. musb_resources[1].name = pdev->resource[1].name;
  452. musb_resources[1].start = pdev->resource[1].start;
  453. musb_resources[1].end = pdev->resource[1].end;
  454. musb_resources[1].flags = pdev->resource[1].flags;
  455. /*
  456. * For DM6467 3 resources are passed. A placeholder for the 3rd
  457. * resource is always there, so it's safe to always copy it...
  458. */
  459. musb_resources[2].name = pdev->resource[2].name;
  460. musb_resources[2].start = pdev->resource[2].start;
  461. musb_resources[2].end = pdev->resource[2].end;
  462. musb_resources[2].flags = pdev->resource[2].flags;
  463. pinfo = davinci_dev_info;
  464. pinfo.parent = &pdev->dev;
  465. pinfo.res = musb_resources;
  466. pinfo.num_res = ARRAY_SIZE(musb_resources);
  467. pinfo.data = pdata;
  468. pinfo.size_data = sizeof(*pdata);
  469. glue->musb = musb = platform_device_register_full(&pinfo);
  470. if (IS_ERR(musb)) {
  471. ret = PTR_ERR(musb);
  472. dev_err(&pdev->dev, "failed to register musb device: %d\n", ret);
  473. goto err1;
  474. }
  475. return 0;
  476. err1:
  477. clk_disable(clk);
  478. err0:
  479. return ret;
  480. }
  481. static int davinci_remove(struct platform_device *pdev)
  482. {
  483. struct davinci_glue *glue = platform_get_drvdata(pdev);
  484. platform_device_unregister(glue->musb);
  485. usb_phy_generic_unregister();
  486. clk_disable(glue->clk);
  487. return 0;
  488. }
  489. static struct platform_driver davinci_driver = {
  490. .probe = davinci_probe,
  491. .remove = davinci_remove,
  492. .driver = {
  493. .name = "musb-davinci",
  494. },
  495. };
  496. MODULE_DESCRIPTION("DaVinci MUSB Glue Layer");
  497. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  498. MODULE_LICENSE("GPL v2");
  499. module_platform_driver(davinci_driver);