da8xx.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Texas Instruments DA8xx/OMAP-L1x "glue layer"
  4. *
  5. * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
  6. *
  7. * Based on the DaVinci "glue layer" code.
  8. * Copyright (C) 2005-2006 by Texas Instruments
  9. *
  10. * DT support
  11. * Copyright (c) 2016 Petr Kulhavy <petr@barix.com>
  12. *
  13. * This file is part of the Inventra Controller Driver for Linux.
  14. */
  15. #include <linux/module.h>
  16. #include <linux/clk.h>
  17. #include <linux/err.h>
  18. #include <linux/io.h>
  19. #include <linux/of_platform.h>
  20. #include <linux/phy/phy.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/usb/usb_phy_generic.h>
  24. #include "musb_core.h"
  25. /*
  26. * DA8XX specific definitions
  27. */
  28. /* USB 2.0 OTG module registers */
  29. #define DA8XX_USB_REVISION_REG 0x00
  30. #define DA8XX_USB_CTRL_REG 0x04
  31. #define DA8XX_USB_STAT_REG 0x08
  32. #define DA8XX_USB_EMULATION_REG 0x0c
  33. #define DA8XX_USB_SRP_FIX_TIME_REG 0x18
  34. #define DA8XX_USB_INTR_SRC_REG 0x20
  35. #define DA8XX_USB_INTR_SRC_SET_REG 0x24
  36. #define DA8XX_USB_INTR_SRC_CLEAR_REG 0x28
  37. #define DA8XX_USB_INTR_MASK_REG 0x2c
  38. #define DA8XX_USB_INTR_MASK_SET_REG 0x30
  39. #define DA8XX_USB_INTR_MASK_CLEAR_REG 0x34
  40. #define DA8XX_USB_INTR_SRC_MASKED_REG 0x38
  41. #define DA8XX_USB_END_OF_INTR_REG 0x3c
  42. #define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2))
  43. /* Control register bits */
  44. #define DA8XX_SOFT_RESET_MASK 1
  45. #define DA8XX_USB_TX_EP_MASK 0x1f /* EP0 + 4 Tx EPs */
  46. #define DA8XX_USB_RX_EP_MASK 0x1e /* 4 Rx EPs */
  47. /* USB interrupt register bits */
  48. #define DA8XX_INTR_USB_SHIFT 16
  49. #define DA8XX_INTR_USB_MASK (0x1ff << DA8XX_INTR_USB_SHIFT) /* 8 Mentor */
  50. /* interrupts and DRVVBUS interrupt */
  51. #define DA8XX_INTR_DRVVBUS 0x100
  52. #define DA8XX_INTR_RX_SHIFT 8
  53. #define DA8XX_INTR_RX_MASK (DA8XX_USB_RX_EP_MASK << DA8XX_INTR_RX_SHIFT)
  54. #define DA8XX_INTR_TX_SHIFT 0
  55. #define DA8XX_INTR_TX_MASK (DA8XX_USB_TX_EP_MASK << DA8XX_INTR_TX_SHIFT)
  56. #define DA8XX_MENTOR_CORE_OFFSET 0x400
  57. struct da8xx_glue {
  58. struct device *dev;
  59. struct platform_device *musb;
  60. struct platform_device *usb_phy;
  61. struct clk *clk;
  62. struct phy *phy;
  63. };
  64. /*
  65. * Because we don't set CTRL.UINT, it's "important" to:
  66. * - not read/write INTRUSB/INTRUSBE (except during
  67. * initial setup, as a workaround);
  68. * - use INTSET/INTCLR instead.
  69. */
  70. /**
  71. * da8xx_musb_enable - enable interrupts
  72. */
  73. static void da8xx_musb_enable(struct musb *musb)
  74. {
  75. void __iomem *reg_base = musb->ctrl_base;
  76. u32 mask;
  77. /* Workaround: setup IRQs through both register sets. */
  78. mask = ((musb->epmask & DA8XX_USB_TX_EP_MASK) << DA8XX_INTR_TX_SHIFT) |
  79. ((musb->epmask & DA8XX_USB_RX_EP_MASK) << DA8XX_INTR_RX_SHIFT) |
  80. DA8XX_INTR_USB_MASK;
  81. musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask);
  82. /* Force the DRVVBUS IRQ so we can start polling for ID change. */
  83. musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG,
  84. DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT);
  85. }
  86. /**
  87. * da8xx_musb_disable - disable HDRC and flush interrupts
  88. */
  89. static void da8xx_musb_disable(struct musb *musb)
  90. {
  91. void __iomem *reg_base = musb->ctrl_base;
  92. musb_writel(reg_base, DA8XX_USB_INTR_MASK_CLEAR_REG,
  93. DA8XX_INTR_USB_MASK |
  94. DA8XX_INTR_TX_MASK | DA8XX_INTR_RX_MASK);
  95. musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
  96. }
  97. #define portstate(stmt) stmt
  98. static void da8xx_musb_set_vbus(struct musb *musb, int is_on)
  99. {
  100. WARN_ON(is_on && is_peripheral_active(musb));
  101. }
  102. #define POLL_SECONDS 2
  103. static void otg_timer(struct timer_list *t)
  104. {
  105. struct musb *musb = from_timer(musb, t, dev_timer);
  106. void __iomem *mregs = musb->mregs;
  107. u8 devctl;
  108. unsigned long flags;
  109. /*
  110. * We poll because DaVinci's won't expose several OTG-critical
  111. * status change events (from the transceiver) otherwise.
  112. */
  113. devctl = musb_readb(mregs, MUSB_DEVCTL);
  114. dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
  115. usb_otg_state_string(musb->xceiv->otg->state));
  116. spin_lock_irqsave(&musb->lock, flags);
  117. switch (musb->xceiv->otg->state) {
  118. case OTG_STATE_A_WAIT_BCON:
  119. devctl &= ~MUSB_DEVCTL_SESSION;
  120. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  121. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  122. if (devctl & MUSB_DEVCTL_BDEVICE) {
  123. musb->xceiv->otg->state = OTG_STATE_B_IDLE;
  124. MUSB_DEV_MODE(musb);
  125. } else {
  126. musb->xceiv->otg->state = OTG_STATE_A_IDLE;
  127. MUSB_HST_MODE(musb);
  128. }
  129. break;
  130. case OTG_STATE_A_WAIT_VFALL:
  131. /*
  132. * Wait till VBUS falls below SessionEnd (~0.2 V); the 1.3
  133. * RTL seems to mis-handle session "start" otherwise (or in
  134. * our case "recover"), in routine "VBUS was valid by the time
  135. * VBUSERR got reported during enumeration" cases.
  136. */
  137. if (devctl & MUSB_DEVCTL_VBUS) {
  138. mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
  139. break;
  140. }
  141. musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
  142. musb_writel(musb->ctrl_base, DA8XX_USB_INTR_SRC_SET_REG,
  143. MUSB_INTR_VBUSERROR << DA8XX_INTR_USB_SHIFT);
  144. break;
  145. case OTG_STATE_B_IDLE:
  146. /*
  147. * There's no ID-changed IRQ, so we have no good way to tell
  148. * when to switch to the A-Default state machine (by setting
  149. * the DEVCTL.Session bit).
  150. *
  151. * Workaround: whenever we're in B_IDLE, try setting the
  152. * session flag every few seconds. If it works, ID was
  153. * grounded and we're now in the A-Default state machine.
  154. *
  155. * NOTE: setting the session flag is _supposed_ to trigger
  156. * SRP but clearly it doesn't.
  157. */
  158. musb_writeb(mregs, MUSB_DEVCTL, devctl | MUSB_DEVCTL_SESSION);
  159. devctl = musb_readb(mregs, MUSB_DEVCTL);
  160. if (devctl & MUSB_DEVCTL_BDEVICE)
  161. mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
  162. else
  163. musb->xceiv->otg->state = OTG_STATE_A_IDLE;
  164. break;
  165. default:
  166. break;
  167. }
  168. spin_unlock_irqrestore(&musb->lock, flags);
  169. }
  170. static void da8xx_musb_try_idle(struct musb *musb, unsigned long timeout)
  171. {
  172. static unsigned long last_timer;
  173. if (timeout == 0)
  174. timeout = jiffies + msecs_to_jiffies(3);
  175. /* Never idle if active, or when VBUS timeout is not set as host */
  176. if (musb->is_active || (musb->a_wait_bcon == 0 &&
  177. musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) {
  178. dev_dbg(musb->controller, "%s active, deleting timer\n",
  179. usb_otg_state_string(musb->xceiv->otg->state));
  180. del_timer(&musb->dev_timer);
  181. last_timer = jiffies;
  182. return;
  183. }
  184. if (time_after(last_timer, timeout) && timer_pending(&musb->dev_timer)) {
  185. dev_dbg(musb->controller, "Longer idle timer already pending, ignoring...\n");
  186. return;
  187. }
  188. last_timer = timeout;
  189. dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
  190. usb_otg_state_string(musb->xceiv->otg->state),
  191. jiffies_to_msecs(timeout - jiffies));
  192. mod_timer(&musb->dev_timer, timeout);
  193. }
  194. static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
  195. {
  196. struct musb *musb = hci;
  197. void __iomem *reg_base = musb->ctrl_base;
  198. unsigned long flags;
  199. irqreturn_t ret = IRQ_NONE;
  200. u32 status;
  201. spin_lock_irqsave(&musb->lock, flags);
  202. /*
  203. * NOTE: DA8XX shadows the Mentor IRQs. Don't manage them through
  204. * the Mentor registers (except for setup), use the TI ones and EOI.
  205. */
  206. /* Acknowledge and handle non-CPPI interrupts */
  207. status = musb_readl(reg_base, DA8XX_USB_INTR_SRC_MASKED_REG);
  208. if (!status)
  209. goto eoi;
  210. musb_writel(reg_base, DA8XX_USB_INTR_SRC_CLEAR_REG, status);
  211. dev_dbg(musb->controller, "USB IRQ %08x\n", status);
  212. musb->int_rx = (status & DA8XX_INTR_RX_MASK) >> DA8XX_INTR_RX_SHIFT;
  213. musb->int_tx = (status & DA8XX_INTR_TX_MASK) >> DA8XX_INTR_TX_SHIFT;
  214. musb->int_usb = (status & DA8XX_INTR_USB_MASK) >> DA8XX_INTR_USB_SHIFT;
  215. /*
  216. * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
  217. * DA8xx's missing ID change IRQ. We need an ID change IRQ to
  218. * switch appropriately between halves of the OTG state machine.
  219. * Managing DEVCTL.Session per Mentor docs requires that we know its
  220. * value but DEVCTL.BDevice is invalid without DEVCTL.Session set.
  221. * Also, DRVVBUS pulses for SRP (but not at 5 V)...
  222. */
  223. if (status & (DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT)) {
  224. int drvvbus = musb_readl(reg_base, DA8XX_USB_STAT_REG);
  225. void __iomem *mregs = musb->mregs;
  226. u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
  227. int err;
  228. err = musb->int_usb & MUSB_INTR_VBUSERROR;
  229. if (err) {
  230. /*
  231. * The Mentor core doesn't debounce VBUS as needed
  232. * to cope with device connect current spikes. This
  233. * means it's not uncommon for bus-powered devices
  234. * to get VBUS errors during enumeration.
  235. *
  236. * This is a workaround, but newer RTL from Mentor
  237. * seems to allow a better one: "re"-starting sessions
  238. * without waiting for VBUS to stop registering in
  239. * devctl.
  240. */
  241. musb->int_usb &= ~MUSB_INTR_VBUSERROR;
  242. musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
  243. mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
  244. WARNING("VBUS error workaround (delay coming)\n");
  245. } else if (drvvbus) {
  246. MUSB_HST_MODE(musb);
  247. musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
  248. portstate(musb->port1_status |= USB_PORT_STAT_POWER);
  249. del_timer(&musb->dev_timer);
  250. } else if (!(musb->int_usb & MUSB_INTR_BABBLE)) {
  251. /*
  252. * When babble condition happens, drvvbus interrupt
  253. * is also generated. Ignore this drvvbus interrupt
  254. * and let babble interrupt handler recovers the
  255. * controller; otherwise, the host-mode flag is lost
  256. * due to the MUSB_DEV_MODE() call below and babble
  257. * recovery logic will not be called.
  258. */
  259. musb->is_active = 0;
  260. MUSB_DEV_MODE(musb);
  261. musb->xceiv->otg->state = OTG_STATE_B_IDLE;
  262. portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
  263. }
  264. dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
  265. drvvbus ? "on" : "off",
  266. usb_otg_state_string(musb->xceiv->otg->state),
  267. err ? " ERROR" : "",
  268. devctl);
  269. ret = IRQ_HANDLED;
  270. }
  271. if (musb->int_tx || musb->int_rx || musb->int_usb)
  272. ret |= musb_interrupt(musb);
  273. eoi:
  274. /* EOI needs to be written for the IRQ to be re-asserted. */
  275. if (ret == IRQ_HANDLED || status)
  276. musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
  277. /* Poll for ID change */
  278. if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
  279. mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
  280. spin_unlock_irqrestore(&musb->lock, flags);
  281. return ret;
  282. }
  283. static int da8xx_musb_set_mode(struct musb *musb, u8 musb_mode)
  284. {
  285. struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
  286. enum phy_mode phy_mode;
  287. /*
  288. * The PHY has some issues when it is forced in device or host mode.
  289. * Unless the user request another mode, configure the PHY in OTG mode.
  290. */
  291. if (!musb->is_initialized)
  292. return phy_set_mode(glue->phy, PHY_MODE_USB_OTG);
  293. switch (musb_mode) {
  294. case MUSB_HOST: /* Force VBUS valid, ID = 0 */
  295. phy_mode = PHY_MODE_USB_HOST;
  296. break;
  297. case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */
  298. phy_mode = PHY_MODE_USB_DEVICE;
  299. break;
  300. case MUSB_OTG: /* Don't override the VBUS/ID comparators */
  301. phy_mode = PHY_MODE_USB_OTG;
  302. break;
  303. default:
  304. return -EINVAL;
  305. }
  306. return phy_set_mode(glue->phy, phy_mode);
  307. }
  308. static int da8xx_musb_init(struct musb *musb)
  309. {
  310. struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
  311. void __iomem *reg_base = musb->ctrl_base;
  312. u32 rev;
  313. int ret = -ENODEV;
  314. musb->mregs += DA8XX_MENTOR_CORE_OFFSET;
  315. ret = clk_prepare_enable(glue->clk);
  316. if (ret) {
  317. dev_err(glue->dev, "failed to enable clock\n");
  318. return ret;
  319. }
  320. /* Returns zero if e.g. not clocked */
  321. rev = musb_readl(reg_base, DA8XX_USB_REVISION_REG);
  322. if (!rev)
  323. goto fail;
  324. musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
  325. if (IS_ERR_OR_NULL(musb->xceiv)) {
  326. ret = -EPROBE_DEFER;
  327. goto fail;
  328. }
  329. timer_setup(&musb->dev_timer, otg_timer, 0);
  330. /* Reset the controller */
  331. musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
  332. /* Start the on-chip PHY and its PLL. */
  333. ret = phy_init(glue->phy);
  334. if (ret) {
  335. dev_err(glue->dev, "Failed to init phy.\n");
  336. goto fail;
  337. }
  338. ret = phy_power_on(glue->phy);
  339. if (ret) {
  340. dev_err(glue->dev, "Failed to power on phy.\n");
  341. goto err_phy_power_on;
  342. }
  343. msleep(5);
  344. /* NOTE: IRQs are in mixed mode, not bypass to pure MUSB */
  345. pr_debug("DA8xx OTG revision %08x, control %02x\n", rev,
  346. musb_readb(reg_base, DA8XX_USB_CTRL_REG));
  347. musb->isr = da8xx_musb_interrupt;
  348. return 0;
  349. err_phy_power_on:
  350. phy_exit(glue->phy);
  351. fail:
  352. clk_disable_unprepare(glue->clk);
  353. return ret;
  354. }
  355. static int da8xx_musb_exit(struct musb *musb)
  356. {
  357. struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
  358. del_timer_sync(&musb->dev_timer);
  359. phy_power_off(glue->phy);
  360. phy_exit(glue->phy);
  361. clk_disable_unprepare(glue->clk);
  362. usb_put_phy(musb->xceiv);
  363. return 0;
  364. }
  365. static inline u8 get_vbus_power(struct device *dev)
  366. {
  367. struct regulator *vbus_supply;
  368. int current_uA;
  369. vbus_supply = regulator_get_optional(dev, "vbus");
  370. if (IS_ERR(vbus_supply))
  371. return 255;
  372. current_uA = regulator_get_current_limit(vbus_supply);
  373. regulator_put(vbus_supply);
  374. if (current_uA <= 0 || current_uA > 510000)
  375. return 255;
  376. return current_uA / 1000 / 2;
  377. }
  378. #ifdef CONFIG_USB_TI_CPPI41_DMA
  379. static void da8xx_dma_controller_callback(struct dma_controller *c)
  380. {
  381. struct musb *musb = c->musb;
  382. void __iomem *reg_base = musb->ctrl_base;
  383. musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
  384. }
  385. static struct dma_controller *
  386. da8xx_dma_controller_create(struct musb *musb, void __iomem *base)
  387. {
  388. struct dma_controller *controller;
  389. controller = cppi41_dma_controller_create(musb, base);
  390. if (IS_ERR_OR_NULL(controller))
  391. return controller;
  392. controller->dma_callback = da8xx_dma_controller_callback;
  393. return controller;
  394. }
  395. #endif
  396. static const struct musb_platform_ops da8xx_ops = {
  397. .quirks = MUSB_INDEXED_EP | MUSB_PRESERVE_SESSION |
  398. MUSB_DMA_CPPI41 | MUSB_DA8XX,
  399. .init = da8xx_musb_init,
  400. .exit = da8xx_musb_exit,
  401. .fifo_mode = 2,
  402. #ifdef CONFIG_USB_TI_CPPI41_DMA
  403. .dma_init = da8xx_dma_controller_create,
  404. .dma_exit = cppi41_dma_controller_destroy,
  405. #endif
  406. .enable = da8xx_musb_enable,
  407. .disable = da8xx_musb_disable,
  408. .set_mode = da8xx_musb_set_mode,
  409. .try_idle = da8xx_musb_try_idle,
  410. .set_vbus = da8xx_musb_set_vbus,
  411. };
  412. static const struct platform_device_info da8xx_dev_info = {
  413. .name = "musb-hdrc",
  414. .id = PLATFORM_DEVID_AUTO,
  415. .dma_mask = DMA_BIT_MASK(32),
  416. };
  417. static const struct musb_hdrc_config da8xx_config = {
  418. .ram_bits = 10,
  419. .num_eps = 5,
  420. .multipoint = 1,
  421. };
  422. static struct of_dev_auxdata da8xx_auxdata_lookup[] = {
  423. OF_DEV_AUXDATA("ti,da830-cppi41", 0x01e01000, "cppi41-dmaengine",
  424. NULL),
  425. {}
  426. };
  427. static int da8xx_probe(struct platform_device *pdev)
  428. {
  429. struct resource musb_resources[2];
  430. struct musb_hdrc_platform_data *pdata = dev_get_platdata(&pdev->dev);
  431. struct da8xx_glue *glue;
  432. struct platform_device_info pinfo;
  433. struct clk *clk;
  434. struct device_node *np = pdev->dev.of_node;
  435. int ret;
  436. glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
  437. if (!glue)
  438. return -ENOMEM;
  439. clk = devm_clk_get(&pdev->dev, NULL);
  440. if (IS_ERR(clk)) {
  441. dev_err(&pdev->dev, "failed to get clock\n");
  442. return PTR_ERR(clk);
  443. }
  444. glue->phy = devm_phy_get(&pdev->dev, "usb-phy");
  445. if (IS_ERR(glue->phy)) {
  446. if (PTR_ERR(glue->phy) != -EPROBE_DEFER)
  447. dev_err(&pdev->dev, "failed to get phy\n");
  448. return PTR_ERR(glue->phy);
  449. }
  450. glue->dev = &pdev->dev;
  451. glue->clk = clk;
  452. if (IS_ENABLED(CONFIG_OF) && np) {
  453. pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
  454. if (!pdata)
  455. return -ENOMEM;
  456. pdata->config = &da8xx_config;
  457. pdata->mode = musb_get_mode(&pdev->dev);
  458. pdata->power = get_vbus_power(&pdev->dev);
  459. }
  460. pdata->platform_ops = &da8xx_ops;
  461. glue->usb_phy = usb_phy_generic_register();
  462. ret = PTR_ERR_OR_ZERO(glue->usb_phy);
  463. if (ret) {
  464. dev_err(&pdev->dev, "failed to register usb_phy\n");
  465. return ret;
  466. }
  467. platform_set_drvdata(pdev, glue);
  468. ret = of_platform_populate(pdev->dev.of_node, NULL,
  469. da8xx_auxdata_lookup, &pdev->dev);
  470. if (ret)
  471. return ret;
  472. memset(musb_resources, 0x00, sizeof(*musb_resources) *
  473. ARRAY_SIZE(musb_resources));
  474. musb_resources[0].name = pdev->resource[0].name;
  475. musb_resources[0].start = pdev->resource[0].start;
  476. musb_resources[0].end = pdev->resource[0].end;
  477. musb_resources[0].flags = pdev->resource[0].flags;
  478. musb_resources[1].name = pdev->resource[1].name;
  479. musb_resources[1].start = pdev->resource[1].start;
  480. musb_resources[1].end = pdev->resource[1].end;
  481. musb_resources[1].flags = pdev->resource[1].flags;
  482. pinfo = da8xx_dev_info;
  483. pinfo.parent = &pdev->dev;
  484. pinfo.res = musb_resources;
  485. pinfo.num_res = ARRAY_SIZE(musb_resources);
  486. pinfo.data = pdata;
  487. pinfo.size_data = sizeof(*pdata);
  488. glue->musb = platform_device_register_full(&pinfo);
  489. ret = PTR_ERR_OR_ZERO(glue->musb);
  490. if (ret) {
  491. dev_err(&pdev->dev, "failed to register musb device: %d\n", ret);
  492. usb_phy_generic_unregister(glue->usb_phy);
  493. }
  494. return ret;
  495. }
  496. static int da8xx_remove(struct platform_device *pdev)
  497. {
  498. struct da8xx_glue *glue = platform_get_drvdata(pdev);
  499. platform_device_unregister(glue->musb);
  500. usb_phy_generic_unregister(glue->usb_phy);
  501. return 0;
  502. }
  503. #ifdef CONFIG_PM_SLEEP
  504. static int da8xx_suspend(struct device *dev)
  505. {
  506. int ret;
  507. struct da8xx_glue *glue = dev_get_drvdata(dev);
  508. ret = phy_power_off(glue->phy);
  509. if (ret)
  510. return ret;
  511. clk_disable_unprepare(glue->clk);
  512. return 0;
  513. }
  514. static int da8xx_resume(struct device *dev)
  515. {
  516. int ret;
  517. struct da8xx_glue *glue = dev_get_drvdata(dev);
  518. ret = clk_prepare_enable(glue->clk);
  519. if (ret)
  520. return ret;
  521. return phy_power_on(glue->phy);
  522. }
  523. #endif
  524. static SIMPLE_DEV_PM_OPS(da8xx_pm_ops, da8xx_suspend, da8xx_resume);
  525. #ifdef CONFIG_OF
  526. static const struct of_device_id da8xx_id_table[] = {
  527. {
  528. .compatible = "ti,da830-musb",
  529. },
  530. {},
  531. };
  532. MODULE_DEVICE_TABLE(of, da8xx_id_table);
  533. #endif
  534. static struct platform_driver da8xx_driver = {
  535. .probe = da8xx_probe,
  536. .remove = da8xx_remove,
  537. .driver = {
  538. .name = "musb-da8xx",
  539. .pm = &da8xx_pm_ops,
  540. .of_match_table = of_match_ptr(da8xx_id_table),
  541. },
  542. };
  543. MODULE_DESCRIPTION("DA8xx/OMAP-L1x MUSB Glue Layer");
  544. MODULE_AUTHOR("Sergei Shtylyov <sshtylyov@ru.mvista.com>");
  545. MODULE_LICENSE("GPL v2");
  546. module_platform_driver(da8xx_driver);