ohci-tmio.c 9.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * OHCI HCD(Host Controller Driver) for USB.
  4. *
  5. *(C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  6. *(C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
  7. *(C) Copyright 2002 Hewlett-Packard Company
  8. *
  9. * Bus glue for Toshiba Mobile IO(TMIO) Controller's OHCI core
  10. * (C) Copyright 2005 Chris Humbert <mahadri-usb@drigon.com>
  11. * (C) Copyright 2007, 2008 Dmitry Baryshkov <dbaryshkov@gmail.com>
  12. *
  13. * This is known to work with the following variants:
  14. * TC6393XB revision 3 (32kB SRAM)
  15. *
  16. * The TMIO's OHCI core DMAs through a small internal buffer that
  17. * is directly addressable by the CPU.
  18. *
  19. * Written from sparse documentation from Toshiba and Sharp's driver
  20. * for the 2.4 kernel,
  21. * usb-ohci-tc6393.c(C) Copyright 2004 Lineo Solutions, Inc.
  22. */
  23. /*#include <linux/fs.h>
  24. #include <linux/mount.h>
  25. #include <linux/pagemap.h>
  26. #include <linux/namei.h>
  27. #include <linux/sched.h>*/
  28. #include <linux/platform_device.h>
  29. #include <linux/mfd/core.h>
  30. #include <linux/mfd/tmio.h>
  31. #include <linux/dma-mapping.h>
  32. /*-------------------------------------------------------------------------*/
  33. /*
  34. * USB Host Controller Configuration Register
  35. */
  36. #define CCR_REVID 0x08 /* b Revision ID */
  37. #define CCR_BASE 0x10 /* l USB Control Register Base Address Low */
  38. #define CCR_ILME 0x40 /* b Internal Local Memory Enable */
  39. #define CCR_PM 0x4c /* w Power Management */
  40. #define CCR_INTC 0x50 /* b INT Control */
  41. #define CCR_LMW1L 0x54 /* w Local Memory Window 1 LMADRS Low */
  42. #define CCR_LMW1H 0x56 /* w Local Memory Window 1 LMADRS High */
  43. #define CCR_LMW1BL 0x58 /* w Local Memory Window 1 Base Address Low */
  44. #define CCR_LMW1BH 0x5A /* w Local Memory Window 1 Base Address High */
  45. #define CCR_LMW2L 0x5C /* w Local Memory Window 2 LMADRS Low */
  46. #define CCR_LMW2H 0x5E /* w Local Memory Window 2 LMADRS High */
  47. #define CCR_LMW2BL 0x60 /* w Local Memory Window 2 Base Address Low */
  48. #define CCR_LMW2BH 0x62 /* w Local Memory Window 2 Base Address High */
  49. #define CCR_MISC 0xFC /* b MISC */
  50. #define CCR_PM_GKEN 0x0001
  51. #define CCR_PM_CKRNEN 0x0002
  52. #define CCR_PM_USBPW1 0x0004
  53. #define CCR_PM_USBPW2 0x0008
  54. #define CCR_PM_USBPW3 0x0010
  55. #define CCR_PM_PMEE 0x0100
  56. #define CCR_PM_PMES 0x8000
  57. /*-------------------------------------------------------------------------*/
  58. struct tmio_hcd {
  59. void __iomem *ccr;
  60. spinlock_t lock; /* protects RMW cycles */
  61. };
  62. #define hcd_to_tmio(hcd) ((struct tmio_hcd *)(hcd_to_ohci(hcd) + 1))
  63. /*-------------------------------------------------------------------------*/
  64. static void tmio_write_pm(struct platform_device *dev)
  65. {
  66. struct usb_hcd *hcd = platform_get_drvdata(dev);
  67. struct tmio_hcd *tmio = hcd_to_tmio(hcd);
  68. u16 pm;
  69. unsigned long flags;
  70. spin_lock_irqsave(&tmio->lock, flags);
  71. pm = CCR_PM_GKEN | CCR_PM_CKRNEN |
  72. CCR_PM_PMEE | CCR_PM_PMES;
  73. tmio_iowrite16(pm, tmio->ccr + CCR_PM);
  74. spin_unlock_irqrestore(&tmio->lock, flags);
  75. }
  76. static void tmio_stop_hc(struct platform_device *dev)
  77. {
  78. struct usb_hcd *hcd = platform_get_drvdata(dev);
  79. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  80. struct tmio_hcd *tmio = hcd_to_tmio(hcd);
  81. u16 pm;
  82. pm = CCR_PM_GKEN | CCR_PM_CKRNEN;
  83. switch (ohci->num_ports) {
  84. default:
  85. dev_err(&dev->dev, "Unsupported amount of ports: %d\n", ohci->num_ports);
  86. fallthrough;
  87. case 3:
  88. pm |= CCR_PM_USBPW3;
  89. fallthrough;
  90. case 2:
  91. pm |= CCR_PM_USBPW2;
  92. fallthrough;
  93. case 1:
  94. pm |= CCR_PM_USBPW1;
  95. }
  96. tmio_iowrite8(0, tmio->ccr + CCR_INTC);
  97. tmio_iowrite8(0, tmio->ccr + CCR_ILME);
  98. tmio_iowrite16(0, tmio->ccr + CCR_BASE);
  99. tmio_iowrite16(0, tmio->ccr + CCR_BASE + 2);
  100. tmio_iowrite16(pm, tmio->ccr + CCR_PM);
  101. }
  102. static void tmio_start_hc(struct platform_device *dev)
  103. {
  104. struct usb_hcd *hcd = platform_get_drvdata(dev);
  105. struct tmio_hcd *tmio = hcd_to_tmio(hcd);
  106. unsigned long base = hcd->rsrc_start;
  107. tmio_write_pm(dev);
  108. tmio_iowrite16(base, tmio->ccr + CCR_BASE);
  109. tmio_iowrite16(base >> 16, tmio->ccr + CCR_BASE + 2);
  110. tmio_iowrite8(1, tmio->ccr + CCR_ILME);
  111. tmio_iowrite8(2, tmio->ccr + CCR_INTC);
  112. dev_info(&dev->dev, "revision %d @ 0x%08llx, irq %d\n",
  113. tmio_ioread8(tmio->ccr + CCR_REVID),
  114. (u64) hcd->rsrc_start, hcd->irq);
  115. }
  116. static int ohci_tmio_start(struct usb_hcd *hcd)
  117. {
  118. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  119. int ret;
  120. if ((ret = ohci_init(ohci)) < 0)
  121. return ret;
  122. if ((ret = ohci_run(ohci)) < 0) {
  123. dev_err(hcd->self.controller, "can't start %s\n",
  124. hcd->self.bus_name);
  125. ohci_stop(hcd);
  126. return ret;
  127. }
  128. return 0;
  129. }
  130. static const struct hc_driver ohci_tmio_hc_driver = {
  131. .description = hcd_name,
  132. .product_desc = "TMIO OHCI USB Host Controller",
  133. .hcd_priv_size = sizeof(struct ohci_hcd) + sizeof (struct tmio_hcd),
  134. /* generic hardware linkage */
  135. .irq = ohci_irq,
  136. .flags = HCD_USB11 | HCD_MEMORY,
  137. /* basic lifecycle operations */
  138. .start = ohci_tmio_start,
  139. .stop = ohci_stop,
  140. .shutdown = ohci_shutdown,
  141. /* managing i/o requests and associated device resources */
  142. .urb_enqueue = ohci_urb_enqueue,
  143. .urb_dequeue = ohci_urb_dequeue,
  144. .endpoint_disable = ohci_endpoint_disable,
  145. /* scheduling support */
  146. .get_frame_number = ohci_get_frame,
  147. /* root hub support */
  148. .hub_status_data = ohci_hub_status_data,
  149. .hub_control = ohci_hub_control,
  150. #ifdef CONFIG_PM
  151. .bus_suspend = ohci_bus_suspend,
  152. .bus_resume = ohci_bus_resume,
  153. #endif
  154. .start_port_reset = ohci_start_port_reset,
  155. };
  156. /*-------------------------------------------------------------------------*/
  157. static struct platform_driver ohci_hcd_tmio_driver;
  158. static int ohci_hcd_tmio_drv_probe(struct platform_device *dev)
  159. {
  160. const struct mfd_cell *cell = mfd_get_cell(dev);
  161. struct resource *regs = platform_get_resource(dev, IORESOURCE_MEM, 0);
  162. struct resource *config = platform_get_resource(dev, IORESOURCE_MEM, 1);
  163. struct resource *sram = platform_get_resource(dev, IORESOURCE_MEM, 2);
  164. int irq = platform_get_irq(dev, 0);
  165. struct tmio_hcd *tmio;
  166. struct ohci_hcd *ohci;
  167. struct usb_hcd *hcd;
  168. int ret;
  169. if (usb_disabled())
  170. return -ENODEV;
  171. if (!cell || !regs || !config || !sram)
  172. return -EINVAL;
  173. if (irq < 0)
  174. return irq;
  175. hcd = usb_create_hcd(&ohci_tmio_hc_driver, &dev->dev, dev_name(&dev->dev));
  176. if (!hcd) {
  177. ret = -ENOMEM;
  178. goto err_usb_create_hcd;
  179. }
  180. hcd->rsrc_start = regs->start;
  181. hcd->rsrc_len = resource_size(regs);
  182. tmio = hcd_to_tmio(hcd);
  183. spin_lock_init(&tmio->lock);
  184. tmio->ccr = ioremap(config->start, resource_size(config));
  185. if (!tmio->ccr) {
  186. ret = -ENOMEM;
  187. goto err_ioremap_ccr;
  188. }
  189. hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
  190. if (!hcd->regs) {
  191. ret = -ENOMEM;
  192. goto err_ioremap_regs;
  193. }
  194. if (cell->enable) {
  195. ret = cell->enable(dev);
  196. if (ret)
  197. goto err_enable;
  198. }
  199. tmio_start_hc(dev);
  200. ohci = hcd_to_ohci(hcd);
  201. ohci_hcd_init(ohci);
  202. ret = usb_hcd_setup_local_mem(hcd, sram->start, sram->start,
  203. resource_size(sram));
  204. if (ret < 0)
  205. goto err_enable;
  206. ret = usb_add_hcd(hcd, irq, 0);
  207. if (ret)
  208. goto err_add_hcd;
  209. device_wakeup_enable(hcd->self.controller);
  210. if (ret == 0)
  211. return ret;
  212. usb_remove_hcd(hcd);
  213. err_add_hcd:
  214. tmio_stop_hc(dev);
  215. if (cell->disable)
  216. cell->disable(dev);
  217. err_enable:
  218. iounmap(hcd->regs);
  219. err_ioremap_regs:
  220. iounmap(tmio->ccr);
  221. err_ioremap_ccr:
  222. usb_put_hcd(hcd);
  223. err_usb_create_hcd:
  224. return ret;
  225. }
  226. static int ohci_hcd_tmio_drv_remove(struct platform_device *dev)
  227. {
  228. struct usb_hcd *hcd = platform_get_drvdata(dev);
  229. struct tmio_hcd *tmio = hcd_to_tmio(hcd);
  230. const struct mfd_cell *cell = mfd_get_cell(dev);
  231. usb_remove_hcd(hcd);
  232. tmio_stop_hc(dev);
  233. if (cell->disable)
  234. cell->disable(dev);
  235. iounmap(hcd->regs);
  236. iounmap(tmio->ccr);
  237. usb_put_hcd(hcd);
  238. return 0;
  239. }
  240. #ifdef CONFIG_PM
  241. static int ohci_hcd_tmio_drv_suspend(struct platform_device *dev, pm_message_t state)
  242. {
  243. const struct mfd_cell *cell = mfd_get_cell(dev);
  244. struct usb_hcd *hcd = platform_get_drvdata(dev);
  245. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  246. struct tmio_hcd *tmio = hcd_to_tmio(hcd);
  247. unsigned long flags;
  248. u8 misc;
  249. int ret;
  250. if (time_before(jiffies, ohci->next_statechange))
  251. msleep(5);
  252. ohci->next_statechange = jiffies;
  253. spin_lock_irqsave(&tmio->lock, flags);
  254. misc = tmio_ioread8(tmio->ccr + CCR_MISC);
  255. misc |= 1 << 3; /* USSUSP */
  256. tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
  257. spin_unlock_irqrestore(&tmio->lock, flags);
  258. if (cell->suspend) {
  259. ret = cell->suspend(dev);
  260. if (ret)
  261. return ret;
  262. }
  263. return 0;
  264. }
  265. static int ohci_hcd_tmio_drv_resume(struct platform_device *dev)
  266. {
  267. const struct mfd_cell *cell = mfd_get_cell(dev);
  268. struct usb_hcd *hcd = platform_get_drvdata(dev);
  269. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  270. struct tmio_hcd *tmio = hcd_to_tmio(hcd);
  271. unsigned long flags;
  272. u8 misc;
  273. int ret;
  274. if (time_before(jiffies, ohci->next_statechange))
  275. msleep(5);
  276. ohci->next_statechange = jiffies;
  277. if (cell->resume) {
  278. ret = cell->resume(dev);
  279. if (ret)
  280. return ret;
  281. }
  282. tmio_start_hc(dev);
  283. spin_lock_irqsave(&tmio->lock, flags);
  284. misc = tmio_ioread8(tmio->ccr + CCR_MISC);
  285. misc &= ~(1 << 3); /* USSUSP */
  286. tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
  287. spin_unlock_irqrestore(&tmio->lock, flags);
  288. ohci_resume(hcd, false);
  289. return 0;
  290. }
  291. #else
  292. #define ohci_hcd_tmio_drv_suspend NULL
  293. #define ohci_hcd_tmio_drv_resume NULL
  294. #endif
  295. static struct platform_driver ohci_hcd_tmio_driver = {
  296. .probe = ohci_hcd_tmio_drv_probe,
  297. .remove = ohci_hcd_tmio_drv_remove,
  298. .shutdown = usb_hcd_platform_shutdown,
  299. .suspend = ohci_hcd_tmio_drv_suspend,
  300. .resume = ohci_hcd_tmio_drv_resume,
  301. .driver = {
  302. .name = "tmio-ohci",
  303. },
  304. };