host.c 9.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * host.c - ChipIdea USB host controller driver
  4. *
  5. * Copyright (c) 2012 Intel Corporation
  6. *
  7. * Author: Alexander Shishkin
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/io.h>
  11. #include <linux/usb.h>
  12. #include <linux/usb/hcd.h>
  13. #include <linux/usb/chipidea.h>
  14. #include <linux/regulator/consumer.h>
  15. #include <linux/pinctrl/consumer.h>
  16. #include "../host/ehci.h"
  17. #include "ci.h"
  18. #include "bits.h"
  19. #include "host.h"
  20. static struct hc_driver __read_mostly ci_ehci_hc_driver;
  21. static int (*orig_bus_suspend)(struct usb_hcd *hcd);
  22. struct ehci_ci_priv {
  23. struct regulator *reg_vbus;
  24. bool enabled;
  25. };
  26. static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
  27. {
  28. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  29. struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
  30. struct device *dev = hcd->self.controller;
  31. struct ci_hdrc *ci = dev_get_drvdata(dev);
  32. int ret = 0;
  33. int port = HCS_N_PORTS(ehci->hcs_params);
  34. if (priv->reg_vbus && enable != priv->enabled) {
  35. if (port > 1) {
  36. dev_warn(dev,
  37. "Not support multi-port regulator control\n");
  38. return 0;
  39. }
  40. if (enable)
  41. ret = regulator_enable(priv->reg_vbus);
  42. else
  43. ret = regulator_disable(priv->reg_vbus);
  44. if (ret) {
  45. dev_err(dev,
  46. "Failed to %s vbus regulator, ret=%d\n",
  47. enable ? "enable" : "disable", ret);
  48. return ret;
  49. }
  50. priv->enabled = enable;
  51. }
  52. if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
  53. /*
  54. * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
  55. * As HSIC is always HS, this should be safe for others.
  56. */
  57. hw_port_test_set(ci, 5);
  58. hw_port_test_set(ci, 0);
  59. }
  60. return 0;
  61. };
  62. static int ehci_ci_reset(struct usb_hcd *hcd)
  63. {
  64. struct device *dev = hcd->self.controller;
  65. struct ci_hdrc *ci = dev_get_drvdata(dev);
  66. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  67. int ret;
  68. ret = ehci_setup(hcd);
  69. if (ret)
  70. return ret;
  71. ehci->need_io_watchdog = 0;
  72. if (ci->platdata->notify_event) {
  73. ret = ci->platdata->notify_event(ci,
  74. CI_HDRC_CONTROLLER_RESET_EVENT);
  75. if (ret)
  76. return ret;
  77. }
  78. ci_platform_configure(ci);
  79. return ret;
  80. }
  81. static const struct ehci_driver_overrides ehci_ci_overrides = {
  82. .extra_priv_size = sizeof(struct ehci_ci_priv),
  83. .port_power = ehci_ci_portpower,
  84. .reset = ehci_ci_reset,
  85. };
  86. static irqreturn_t host_irq(struct ci_hdrc *ci)
  87. {
  88. return usb_hcd_irq(ci->irq, ci->hcd);
  89. }
  90. static int host_start(struct ci_hdrc *ci)
  91. {
  92. struct usb_hcd *hcd;
  93. struct ehci_hcd *ehci;
  94. struct ehci_ci_priv *priv;
  95. int ret;
  96. if (usb_disabled())
  97. return -ENODEV;
  98. hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
  99. ci->dev, dev_name(ci->dev), NULL);
  100. if (!hcd)
  101. return -ENOMEM;
  102. dev_set_drvdata(ci->dev, ci);
  103. hcd->rsrc_start = ci->hw_bank.phys;
  104. hcd->rsrc_len = ci->hw_bank.size;
  105. hcd->regs = ci->hw_bank.abs;
  106. hcd->has_tt = 1;
  107. hcd->power_budget = ci->platdata->power_budget;
  108. hcd->tpl_support = ci->platdata->tpl_support;
  109. if (ci->phy || ci->usb_phy) {
  110. hcd->skip_phy_initialization = 1;
  111. if (ci->usb_phy)
  112. hcd->usb_phy = ci->usb_phy;
  113. }
  114. ehci = hcd_to_ehci(hcd);
  115. ehci->caps = ci->hw_bank.cap;
  116. ehci->has_hostpc = ci->hw_bank.lpm;
  117. ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
  118. ehci->imx28_write_fix = ci->imx28_write_fix;
  119. priv = (struct ehci_ci_priv *)ehci->priv;
  120. priv->reg_vbus = NULL;
  121. if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
  122. if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
  123. ret = regulator_enable(ci->platdata->reg_vbus);
  124. if (ret) {
  125. dev_err(ci->dev,
  126. "Failed to enable vbus regulator, ret=%d\n",
  127. ret);
  128. goto put_hcd;
  129. }
  130. } else {
  131. priv->reg_vbus = ci->platdata->reg_vbus;
  132. }
  133. }
  134. if (ci->platdata->pins_host)
  135. pinctrl_select_state(ci->platdata->pctl,
  136. ci->platdata->pins_host);
  137. ret = usb_add_hcd(hcd, 0, 0);
  138. if (ret) {
  139. goto disable_reg;
  140. } else {
  141. struct usb_otg *otg = &ci->otg;
  142. ci->hcd = hcd;
  143. if (ci_otg_is_fsm_mode(ci)) {
  144. otg->host = &hcd->self;
  145. hcd->self.otg_port = 1;
  146. }
  147. if (ci->platdata->notify_event &&
  148. (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC))
  149. ci->platdata->notify_event
  150. (ci, CI_HDRC_IMX_HSIC_ACTIVE_EVENT);
  151. }
  152. return ret;
  153. disable_reg:
  154. if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
  155. (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
  156. regulator_disable(ci->platdata->reg_vbus);
  157. put_hcd:
  158. usb_put_hcd(hcd);
  159. return ret;
  160. }
  161. static void host_stop(struct ci_hdrc *ci)
  162. {
  163. struct usb_hcd *hcd = ci->hcd;
  164. if (hcd) {
  165. if (ci->platdata->notify_event)
  166. ci->platdata->notify_event(ci,
  167. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  168. usb_remove_hcd(hcd);
  169. ci->role = CI_ROLE_END;
  170. synchronize_irq(ci->irq);
  171. usb_put_hcd(hcd);
  172. if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
  173. (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
  174. regulator_disable(ci->platdata->reg_vbus);
  175. }
  176. ci->hcd = NULL;
  177. ci->otg.host = NULL;
  178. if (ci->platdata->pins_host && ci->platdata->pins_default)
  179. pinctrl_select_state(ci->platdata->pctl,
  180. ci->platdata->pins_default);
  181. }
  182. void ci_hdrc_host_destroy(struct ci_hdrc *ci)
  183. {
  184. if (ci->role == CI_ROLE_HOST && ci->hcd)
  185. host_stop(ci);
  186. }
  187. /* The below code is based on tegra ehci driver */
  188. static int ci_ehci_hub_control(
  189. struct usb_hcd *hcd,
  190. u16 typeReq,
  191. u16 wValue,
  192. u16 wIndex,
  193. char *buf,
  194. u16 wLength
  195. )
  196. {
  197. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  198. unsigned int ports = HCS_N_PORTS(ehci->hcs_params);
  199. u32 __iomem *status_reg;
  200. u32 temp, port_index;
  201. unsigned long flags;
  202. int retval = 0;
  203. struct device *dev = hcd->self.controller;
  204. struct ci_hdrc *ci = dev_get_drvdata(dev);
  205. port_index = wIndex & 0xff;
  206. port_index -= (port_index > 0);
  207. status_reg = &ehci->regs->port_status[port_index];
  208. spin_lock_irqsave(&ehci->lock, flags);
  209. if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
  210. if (!wIndex || wIndex > ports) {
  211. retval = -EPIPE;
  212. goto done;
  213. }
  214. temp = ehci_readl(ehci, status_reg);
  215. if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
  216. retval = -EPIPE;
  217. goto done;
  218. }
  219. temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
  220. temp |= PORT_WKDISC_E | PORT_WKOC_E;
  221. ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
  222. /*
  223. * If a transaction is in progress, there may be a delay in
  224. * suspending the port. Poll until the port is suspended.
  225. */
  226. if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
  227. PORT_SUSPEND, 5000))
  228. ehci_err(ehci, "timeout waiting for SUSPEND\n");
  229. if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
  230. if (ci->platdata->notify_event)
  231. ci->platdata->notify_event(ci,
  232. CI_HDRC_IMX_HSIC_SUSPEND_EVENT);
  233. temp = ehci_readl(ehci, status_reg);
  234. temp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
  235. ehci_writel(ehci, temp, status_reg);
  236. }
  237. set_bit(port_index, &ehci->suspended_ports);
  238. goto done;
  239. }
  240. /*
  241. * After resume has finished, it needs do some post resume
  242. * operation for some SoCs.
  243. */
  244. else if (typeReq == ClearPortFeature &&
  245. wValue == USB_PORT_FEAT_C_SUSPEND) {
  246. /* Make sure the resume has finished, it should be finished */
  247. if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 25000))
  248. ehci_err(ehci, "timeout waiting for resume\n");
  249. }
  250. spin_unlock_irqrestore(&ehci->lock, flags);
  251. /* Handle the hub control events here */
  252. return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
  253. done:
  254. spin_unlock_irqrestore(&ehci->lock, flags);
  255. return retval;
  256. }
  257. static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
  258. {
  259. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  260. struct device *dev = hcd->self.controller;
  261. struct ci_hdrc *ci = dev_get_drvdata(dev);
  262. int port;
  263. u32 tmp;
  264. int ret = orig_bus_suspend(hcd);
  265. if (ret)
  266. return ret;
  267. port = HCS_N_PORTS(ehci->hcs_params);
  268. while (port--) {
  269. u32 __iomem *reg = &ehci->regs->port_status[port];
  270. u32 portsc = ehci_readl(ehci, reg);
  271. if (portsc & PORT_CONNECT) {
  272. /*
  273. * For chipidea, the resume signal will be ended
  274. * automatically, so for remote wakeup case, the
  275. * usbcmd.rs may not be set before the resume has
  276. * ended if other resume paths consumes too much
  277. * time (~24ms), in that case, the SOF will not
  278. * send out within 3ms after resume ends, then the
  279. * high speed device will enter full speed mode.
  280. */
  281. tmp = ehci_readl(ehci, &ehci->regs->command);
  282. tmp |= CMD_RUN;
  283. ehci_writel(ehci, tmp, &ehci->regs->command);
  284. /*
  285. * It needs a short delay between set RS bit and PHCD.
  286. */
  287. usleep_range(150, 200);
  288. /*
  289. * Need to clear WKCN and WKOC for imx HSIC,
  290. * otherwise, there will be wakeup event.
  291. */
  292. if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
  293. tmp = ehci_readl(ehci, reg);
  294. tmp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
  295. ehci_writel(ehci, tmp, reg);
  296. }
  297. break;
  298. }
  299. }
  300. return 0;
  301. }
  302. int ci_hdrc_host_init(struct ci_hdrc *ci)
  303. {
  304. struct ci_role_driver *rdrv;
  305. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
  306. return -ENXIO;
  307. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  308. if (!rdrv)
  309. return -ENOMEM;
  310. rdrv->start = host_start;
  311. rdrv->stop = host_stop;
  312. rdrv->irq = host_irq;
  313. rdrv->name = "host";
  314. ci->roles[CI_ROLE_HOST] = rdrv;
  315. return 0;
  316. }
  317. void ci_hdrc_host_driver_init(void)
  318. {
  319. ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
  320. orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
  321. ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
  322. ci_ehci_hc_driver.hub_control = ci_ehci_hub_control;
  323. }