ci_hdrc_tegra.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2016, NVIDIA Corporation
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/module.h>
  7. #include <linux/of_device.h>
  8. #include <linux/reset.h>
  9. #include <linux/usb/chipidea.h>
  10. #include "ci.h"
  11. struct tegra_udc {
  12. struct ci_hdrc_platform_data data;
  13. struct platform_device *dev;
  14. struct usb_phy *phy;
  15. struct clk *clk;
  16. };
  17. struct tegra_udc_soc_info {
  18. unsigned long flags;
  19. };
  20. static const struct tegra_udc_soc_info tegra_udc_soc_info = {
  21. .flags = CI_HDRC_REQUIRES_ALIGNED_DMA,
  22. };
  23. static const struct of_device_id tegra_udc_of_match[] = {
  24. {
  25. .compatible = "nvidia,tegra20-udc",
  26. .data = &tegra_udc_soc_info,
  27. }, {
  28. .compatible = "nvidia,tegra30-udc",
  29. .data = &tegra_udc_soc_info,
  30. }, {
  31. .compatible = "nvidia,tegra114-udc",
  32. .data = &tegra_udc_soc_info,
  33. }, {
  34. .compatible = "nvidia,tegra124-udc",
  35. .data = &tegra_udc_soc_info,
  36. }, {
  37. /* sentinel */
  38. }
  39. };
  40. MODULE_DEVICE_TABLE(of, tegra_udc_of_match);
  41. static int tegra_udc_probe(struct platform_device *pdev)
  42. {
  43. const struct tegra_udc_soc_info *soc;
  44. struct tegra_udc *udc;
  45. int err;
  46. udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
  47. if (!udc)
  48. return -ENOMEM;
  49. soc = of_device_get_match_data(&pdev->dev);
  50. if (!soc) {
  51. dev_err(&pdev->dev, "failed to match OF data\n");
  52. return -EINVAL;
  53. }
  54. udc->phy = devm_usb_get_phy_by_phandle(&pdev->dev, "nvidia,phy", 0);
  55. if (IS_ERR(udc->phy)) {
  56. err = PTR_ERR(udc->phy);
  57. dev_err(&pdev->dev, "failed to get PHY: %d\n", err);
  58. return err;
  59. }
  60. udc->clk = devm_clk_get(&pdev->dev, NULL);
  61. if (IS_ERR(udc->clk)) {
  62. err = PTR_ERR(udc->clk);
  63. dev_err(&pdev->dev, "failed to get clock: %d\n", err);
  64. return err;
  65. }
  66. err = clk_prepare_enable(udc->clk);
  67. if (err < 0) {
  68. dev_err(&pdev->dev, "failed to enable clock: %d\n", err);
  69. return err;
  70. }
  71. /* setup and register ChipIdea HDRC device */
  72. udc->data.name = "tegra-udc";
  73. udc->data.flags = soc->flags;
  74. udc->data.usb_phy = udc->phy;
  75. udc->data.capoffset = DEF_CAPOFFSET;
  76. udc->dev = ci_hdrc_add_device(&pdev->dev, pdev->resource,
  77. pdev->num_resources, &udc->data);
  78. if (IS_ERR(udc->dev)) {
  79. err = PTR_ERR(udc->dev);
  80. dev_err(&pdev->dev, "failed to add HDRC device: %d\n", err);
  81. goto fail_power_off;
  82. }
  83. platform_set_drvdata(pdev, udc);
  84. return 0;
  85. fail_power_off:
  86. clk_disable_unprepare(udc->clk);
  87. return err;
  88. }
  89. static int tegra_udc_remove(struct platform_device *pdev)
  90. {
  91. struct tegra_udc *udc = platform_get_drvdata(pdev);
  92. ci_hdrc_remove_device(udc->dev);
  93. clk_disable_unprepare(udc->clk);
  94. return 0;
  95. }
  96. static struct platform_driver tegra_udc_driver = {
  97. .driver = {
  98. .name = "tegra-udc",
  99. .of_match_table = tegra_udc_of_match,
  100. },
  101. .probe = tegra_udc_probe,
  102. .remove = tegra_udc_remove,
  103. };
  104. module_platform_driver(tegra_udc_driver);
  105. MODULE_DESCRIPTION("NVIDIA Tegra USB device mode driver");
  106. MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
  107. MODULE_ALIAS("platform:tegra-udc");
  108. MODULE_LICENSE("GPL v2");