uio_dmem_genirq.c 9.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * drivers/uio/uio_dmem_genirq.c
  4. *
  5. * Userspace I/O platform driver with generic IRQ handling code.
  6. *
  7. * Copyright (C) 2012 Damian Hobson-Garcia
  8. *
  9. * Based on uio_pdrv_genirq.c by Magnus Damm
  10. */
  11. #include <linux/platform_device.h>
  12. #include <linux/uio_driver.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/bitops.h>
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/platform_data/uio_dmem_genirq.h>
  18. #include <linux/stringify.h>
  19. #include <linux/pm_runtime.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/slab.h>
  22. #include <linux/irq.h>
  23. #include <linux/of.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/of_address.h>
  26. #define DRIVER_NAME "uio_dmem_genirq"
  27. #define DMEM_MAP_ERROR (~0)
  28. struct uio_dmem_genirq_platdata {
  29. struct uio_info *uioinfo;
  30. spinlock_t lock;
  31. unsigned long flags;
  32. struct platform_device *pdev;
  33. unsigned int dmem_region_start;
  34. unsigned int num_dmem_regions;
  35. void *dmem_region_vaddr[MAX_UIO_MAPS];
  36. struct mutex alloc_lock;
  37. unsigned int refcnt;
  38. };
  39. static int uio_dmem_genirq_open(struct uio_info *info, struct inode *inode)
  40. {
  41. struct uio_dmem_genirq_platdata *priv = info->priv;
  42. struct uio_mem *uiomem;
  43. int dmem_region = priv->dmem_region_start;
  44. uiomem = &priv->uioinfo->mem[priv->dmem_region_start];
  45. mutex_lock(&priv->alloc_lock);
  46. while (!priv->refcnt && uiomem < &priv->uioinfo->mem[MAX_UIO_MAPS]) {
  47. void *addr;
  48. if (!uiomem->size)
  49. break;
  50. addr = dma_alloc_coherent(&priv->pdev->dev, uiomem->size,
  51. (dma_addr_t *)&uiomem->addr, GFP_KERNEL);
  52. if (!addr) {
  53. uiomem->addr = DMEM_MAP_ERROR;
  54. }
  55. priv->dmem_region_vaddr[dmem_region++] = addr;
  56. ++uiomem;
  57. }
  58. priv->refcnt++;
  59. mutex_unlock(&priv->alloc_lock);
  60. /* Wait until the Runtime PM code has woken up the device */
  61. pm_runtime_get_sync(&priv->pdev->dev);
  62. return 0;
  63. }
  64. static int uio_dmem_genirq_release(struct uio_info *info, struct inode *inode)
  65. {
  66. struct uio_dmem_genirq_platdata *priv = info->priv;
  67. struct uio_mem *uiomem;
  68. int dmem_region = priv->dmem_region_start;
  69. /* Tell the Runtime PM code that the device has become idle */
  70. pm_runtime_put_sync(&priv->pdev->dev);
  71. uiomem = &priv->uioinfo->mem[priv->dmem_region_start];
  72. mutex_lock(&priv->alloc_lock);
  73. priv->refcnt--;
  74. while (!priv->refcnt && uiomem < &priv->uioinfo->mem[MAX_UIO_MAPS]) {
  75. if (!uiomem->size)
  76. break;
  77. if (priv->dmem_region_vaddr[dmem_region]) {
  78. dma_free_coherent(&priv->pdev->dev, uiomem->size,
  79. priv->dmem_region_vaddr[dmem_region],
  80. uiomem->addr);
  81. }
  82. uiomem->addr = DMEM_MAP_ERROR;
  83. ++dmem_region;
  84. ++uiomem;
  85. }
  86. mutex_unlock(&priv->alloc_lock);
  87. return 0;
  88. }
  89. static irqreturn_t uio_dmem_genirq_handler(int irq, struct uio_info *dev_info)
  90. {
  91. struct uio_dmem_genirq_platdata *priv = dev_info->priv;
  92. /* Just disable the interrupt in the interrupt controller, and
  93. * remember the state so we can allow user space to enable it later.
  94. */
  95. if (!test_and_set_bit(0, &priv->flags))
  96. disable_irq_nosync(irq);
  97. return IRQ_HANDLED;
  98. }
  99. static int uio_dmem_genirq_irqcontrol(struct uio_info *dev_info, s32 irq_on)
  100. {
  101. struct uio_dmem_genirq_platdata *priv = dev_info->priv;
  102. unsigned long flags;
  103. /* Allow user space to enable and disable the interrupt
  104. * in the interrupt controller, but keep track of the
  105. * state to prevent per-irq depth damage.
  106. *
  107. * Serialize this operation to support multiple tasks.
  108. */
  109. spin_lock_irqsave(&priv->lock, flags);
  110. if (irq_on) {
  111. if (test_and_clear_bit(0, &priv->flags))
  112. enable_irq(dev_info->irq);
  113. spin_unlock_irqrestore(&priv->lock, flags);
  114. } else {
  115. if (!test_and_set_bit(0, &priv->flags)) {
  116. spin_unlock_irqrestore(&priv->lock, flags);
  117. disable_irq(dev_info->irq);
  118. }
  119. }
  120. return 0;
  121. }
  122. static int uio_dmem_genirq_probe(struct platform_device *pdev)
  123. {
  124. struct uio_dmem_genirq_pdata *pdata = dev_get_platdata(&pdev->dev);
  125. struct uio_info *uioinfo = &pdata->uioinfo;
  126. struct uio_dmem_genirq_platdata *priv;
  127. struct uio_mem *uiomem;
  128. int ret = -EINVAL;
  129. int i;
  130. if (pdev->dev.of_node) {
  131. /* alloc uioinfo for one device */
  132. uioinfo = kzalloc(sizeof(*uioinfo), GFP_KERNEL);
  133. if (!uioinfo) {
  134. ret = -ENOMEM;
  135. dev_err(&pdev->dev, "unable to kmalloc\n");
  136. goto bad2;
  137. }
  138. uioinfo->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%pOFn",
  139. pdev->dev.of_node);
  140. uioinfo->version = "devicetree";
  141. }
  142. if (!uioinfo || !uioinfo->name || !uioinfo->version) {
  143. dev_err(&pdev->dev, "missing platform_data\n");
  144. goto bad0;
  145. }
  146. if (uioinfo->handler || uioinfo->irqcontrol ||
  147. uioinfo->irq_flags & IRQF_SHARED) {
  148. dev_err(&pdev->dev, "interrupt configuration error\n");
  149. goto bad0;
  150. }
  151. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  152. if (!priv) {
  153. ret = -ENOMEM;
  154. dev_err(&pdev->dev, "unable to kmalloc\n");
  155. goto bad0;
  156. }
  157. dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
  158. priv->uioinfo = uioinfo;
  159. spin_lock_init(&priv->lock);
  160. priv->flags = 0; /* interrupt is enabled to begin with */
  161. priv->pdev = pdev;
  162. mutex_init(&priv->alloc_lock);
  163. if (!uioinfo->irq) {
  164. /* Multiple IRQs are not supported */
  165. ret = platform_get_irq(pdev, 0);
  166. if (ret == -ENXIO && pdev->dev.of_node)
  167. ret = UIO_IRQ_NONE;
  168. else if (ret < 0)
  169. goto bad1;
  170. uioinfo->irq = ret;
  171. }
  172. if (uioinfo->irq) {
  173. struct irq_data *irq_data = irq_get_irq_data(uioinfo->irq);
  174. /*
  175. * If a level interrupt, dont do lazy disable. Otherwise the
  176. * irq will fire again since clearing of the actual cause, on
  177. * device level, is done in userspace
  178. * irqd_is_level_type() isn't used since isn't valid until
  179. * irq is configured.
  180. */
  181. if (irq_data &&
  182. irqd_get_trigger_type(irq_data) & IRQ_TYPE_LEVEL_MASK) {
  183. dev_dbg(&pdev->dev, "disable lazy unmask\n");
  184. irq_set_status_flags(uioinfo->irq, IRQ_DISABLE_UNLAZY);
  185. }
  186. }
  187. uiomem = &uioinfo->mem[0];
  188. for (i = 0; i < pdev->num_resources; ++i) {
  189. struct resource *r = &pdev->resource[i];
  190. if (r->flags != IORESOURCE_MEM)
  191. continue;
  192. if (uiomem >= &uioinfo->mem[MAX_UIO_MAPS]) {
  193. dev_warn(&pdev->dev, "device has more than "
  194. __stringify(MAX_UIO_MAPS)
  195. " I/O memory resources.\n");
  196. break;
  197. }
  198. uiomem->memtype = UIO_MEM_PHYS;
  199. uiomem->addr = r->start;
  200. uiomem->size = resource_size(r);
  201. ++uiomem;
  202. }
  203. priv->dmem_region_start = uiomem - &uioinfo->mem[0];
  204. priv->num_dmem_regions = pdata->num_dynamic_regions;
  205. for (i = 0; i < pdata->num_dynamic_regions; ++i) {
  206. if (uiomem >= &uioinfo->mem[MAX_UIO_MAPS]) {
  207. dev_warn(&pdev->dev, "device has more than "
  208. __stringify(MAX_UIO_MAPS)
  209. " dynamic and fixed memory regions.\n");
  210. break;
  211. }
  212. uiomem->memtype = UIO_MEM_PHYS;
  213. uiomem->addr = DMEM_MAP_ERROR;
  214. uiomem->size = pdata->dynamic_region_sizes[i];
  215. ++uiomem;
  216. }
  217. while (uiomem < &uioinfo->mem[MAX_UIO_MAPS]) {
  218. uiomem->size = 0;
  219. ++uiomem;
  220. }
  221. /* This driver requires no hardware specific kernel code to handle
  222. * interrupts. Instead, the interrupt handler simply disables the
  223. * interrupt in the interrupt controller. User space is responsible
  224. * for performing hardware specific acknowledge and re-enabling of
  225. * the interrupt in the interrupt controller.
  226. *
  227. * Interrupt sharing is not supported.
  228. */
  229. uioinfo->handler = uio_dmem_genirq_handler;
  230. uioinfo->irqcontrol = uio_dmem_genirq_irqcontrol;
  231. uioinfo->open = uio_dmem_genirq_open;
  232. uioinfo->release = uio_dmem_genirq_release;
  233. uioinfo->priv = priv;
  234. /* Enable Runtime PM for this device:
  235. * The device starts in suspended state to allow the hardware to be
  236. * turned off by default. The Runtime PM bus code should power on the
  237. * hardware and enable clocks at open().
  238. */
  239. pm_runtime_enable(&pdev->dev);
  240. ret = uio_register_device(&pdev->dev, priv->uioinfo);
  241. if (ret) {
  242. dev_err(&pdev->dev, "unable to register uio device\n");
  243. pm_runtime_disable(&pdev->dev);
  244. goto bad1;
  245. }
  246. platform_set_drvdata(pdev, priv);
  247. return 0;
  248. bad1:
  249. kfree(priv);
  250. bad0:
  251. /* kfree uioinfo for OF */
  252. if (pdev->dev.of_node)
  253. kfree(uioinfo);
  254. bad2:
  255. return ret;
  256. }
  257. static int uio_dmem_genirq_remove(struct platform_device *pdev)
  258. {
  259. struct uio_dmem_genirq_platdata *priv = platform_get_drvdata(pdev);
  260. uio_unregister_device(priv->uioinfo);
  261. pm_runtime_disable(&pdev->dev);
  262. priv->uioinfo->handler = NULL;
  263. priv->uioinfo->irqcontrol = NULL;
  264. /* kfree uioinfo for OF */
  265. if (pdev->dev.of_node)
  266. kfree(priv->uioinfo);
  267. kfree(priv);
  268. return 0;
  269. }
  270. static int uio_dmem_genirq_runtime_nop(struct device *dev)
  271. {
  272. /* Runtime PM callback shared between ->runtime_suspend()
  273. * and ->runtime_resume(). Simply returns success.
  274. *
  275. * In this driver pm_runtime_get_sync() and pm_runtime_put_sync()
  276. * are used at open() and release() time. This allows the
  277. * Runtime PM code to turn off power to the device while the
  278. * device is unused, ie before open() and after release().
  279. *
  280. * This Runtime PM callback does not need to save or restore
  281. * any registers since user space is responsbile for hardware
  282. * register reinitialization after open().
  283. */
  284. return 0;
  285. }
  286. static const struct dev_pm_ops uio_dmem_genirq_dev_pm_ops = {
  287. .runtime_suspend = uio_dmem_genirq_runtime_nop,
  288. .runtime_resume = uio_dmem_genirq_runtime_nop,
  289. };
  290. #ifdef CONFIG_OF
  291. static const struct of_device_id uio_of_genirq_match[] = {
  292. { /* empty for now */ },
  293. };
  294. MODULE_DEVICE_TABLE(of, uio_of_genirq_match);
  295. #endif
  296. static struct platform_driver uio_dmem_genirq = {
  297. .probe = uio_dmem_genirq_probe,
  298. .remove = uio_dmem_genirq_remove,
  299. .driver = {
  300. .name = DRIVER_NAME,
  301. .pm = &uio_dmem_genirq_dev_pm_ops,
  302. .of_match_table = of_match_ptr(uio_of_genirq_match),
  303. },
  304. };
  305. module_platform_driver(uio_dmem_genirq);
  306. MODULE_AUTHOR("Damian Hobson-Garcia");
  307. MODULE_DESCRIPTION("Userspace I/O platform driver with dynamic memory.");
  308. MODULE_LICENSE("GPL v2");
  309. MODULE_ALIAS("platform:" DRIVER_NAME);