mxser.c 70 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  4. *
  5. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
  6. * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
  7. *
  8. * This code is loosely based on the 1.8 moxa driver which is based on
  9. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  10. * others.
  11. *
  12. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  13. * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
  14. * www.moxa.com.
  15. * - Fixed x86_64 cleanness
  16. */
  17. #include <linux/module.h>
  18. #include <linux/errno.h>
  19. #include <linux/signal.h>
  20. #include <linux/sched.h>
  21. #include <linux/timer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/tty.h>
  24. #include <linux/tty_flip.h>
  25. #include <linux/serial.h>
  26. #include <linux/serial_reg.h>
  27. #include <linux/major.h>
  28. #include <linux/string.h>
  29. #include <linux/fcntl.h>
  30. #include <linux/ptrace.h>
  31. #include <linux/ioport.h>
  32. #include <linux/mm.h>
  33. #include <linux/delay.h>
  34. #include <linux/pci.h>
  35. #include <linux/bitops.h>
  36. #include <linux/slab.h>
  37. #include <linux/ratelimit.h>
  38. #include <asm/io.h>
  39. #include <asm/irq.h>
  40. #include <linux/uaccess.h>
  41. #include "mxser.h"
  42. #define MXSER_VERSION "2.0.5" /* 1.14 */
  43. #define MXSERMAJOR 174
  44. #define MXSER_BOARDS 4 /* Max. boards */
  45. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  46. #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
  47. #define MXSER_ISR_PASS_LIMIT 100
  48. /*CheckIsMoxaMust return value*/
  49. #define MOXA_OTHER_UART 0x00
  50. #define MOXA_MUST_MU150_HWID 0x01
  51. #define MOXA_MUST_MU860_HWID 0x02
  52. #define WAKEUP_CHARS 256
  53. #define UART_MCR_AFE 0x20
  54. #define UART_LSR_SPECIAL 0x1E
  55. #define PCI_DEVICE_ID_POS104UL 0x1044
  56. #define PCI_DEVICE_ID_CB108 0x1080
  57. #define PCI_DEVICE_ID_CP102UF 0x1023
  58. #define PCI_DEVICE_ID_CP112UL 0x1120
  59. #define PCI_DEVICE_ID_CB114 0x1142
  60. #define PCI_DEVICE_ID_CP114UL 0x1143
  61. #define PCI_DEVICE_ID_CB134I 0x1341
  62. #define PCI_DEVICE_ID_CP138U 0x1380
  63. #define C168_ASIC_ID 1
  64. #define C104_ASIC_ID 2
  65. #define C102_ASIC_ID 0xB
  66. #define CI132_ASIC_ID 4
  67. #define CI134_ASIC_ID 3
  68. #define CI104J_ASIC_ID 5
  69. #define MXSER_HIGHBAUD 1
  70. #define MXSER_HAS2 2
  71. /* This is only for PCI */
  72. static const struct {
  73. int type;
  74. int tx_fifo;
  75. int rx_fifo;
  76. int xmit_fifo_size;
  77. int rx_high_water;
  78. int rx_trigger;
  79. int rx_low_water;
  80. long max_baud;
  81. } Gpci_uart_info[] = {
  82. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  83. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  84. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  85. };
  86. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  87. struct mxser_cardinfo {
  88. char *name;
  89. unsigned int nports;
  90. unsigned int flags;
  91. };
  92. static const struct mxser_cardinfo mxser_cards[] = {
  93. /* 0*/ { "C168 series", 8, },
  94. { "C104 series", 4, },
  95. { "CI-104J series", 4, },
  96. { "C168H/PCI series", 8, },
  97. { "C104H/PCI series", 4, },
  98. /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
  99. { "CI-132 series", 4, MXSER_HAS2 },
  100. { "CI-134 series", 4, },
  101. { "CP-132 series", 2, },
  102. { "CP-114 series", 4, },
  103. /*10*/ { "CT-114 series", 4, },
  104. { "CP-102 series", 2, MXSER_HIGHBAUD },
  105. { "CP-104U series", 4, },
  106. { "CP-168U series", 8, },
  107. { "CP-132U series", 2, },
  108. /*15*/ { "CP-134U series", 4, },
  109. { "CP-104JU series", 4, },
  110. { "Moxa UC7000 Serial", 8, }, /* RC7000 */
  111. { "CP-118U series", 8, },
  112. { "CP-102UL series", 2, },
  113. /*20*/ { "CP-102U series", 2, },
  114. { "CP-118EL series", 8, },
  115. { "CP-168EL series", 8, },
  116. { "CP-104EL series", 4, },
  117. { "CB-108 series", 8, },
  118. /*25*/ { "CB-114 series", 4, },
  119. { "CB-134I series", 4, },
  120. { "CP-138U series", 8, },
  121. { "POS-104UL series", 4, },
  122. { "CP-114UL series", 4, },
  123. /*30*/ { "CP-102UF series", 2, },
  124. { "CP-112UL series", 2, },
  125. };
  126. /* driver_data correspond to the lines in the structure above
  127. see also ISA probe function before you change something */
  128. static const struct pci_device_id mxser_pcibrds[] = {
  129. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
  130. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
  131. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
  132. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
  133. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
  134. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
  135. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
  136. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
  137. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
  138. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
  139. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
  140. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
  141. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
  142. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
  143. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
  144. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
  145. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
  146. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
  147. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
  148. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
  149. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
  150. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
  151. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
  152. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
  153. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
  154. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
  155. { }
  156. };
  157. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  158. static unsigned long ioaddr[MXSER_BOARDS];
  159. static int ttymajor = MXSERMAJOR;
  160. /* Variables for insmod */
  161. MODULE_AUTHOR("Casper Yang");
  162. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  163. module_param_hw_array(ioaddr, ulong, ioport, NULL, 0);
  164. MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
  165. module_param(ttymajor, int, 0);
  166. MODULE_LICENSE("GPL");
  167. struct mxser_log {
  168. int tick;
  169. unsigned long rxcnt[MXSER_PORTS];
  170. unsigned long txcnt[MXSER_PORTS];
  171. };
  172. struct mxser_mon {
  173. unsigned long rxcnt;
  174. unsigned long txcnt;
  175. unsigned long up_rxcnt;
  176. unsigned long up_txcnt;
  177. int modem_status;
  178. unsigned char hold_reason;
  179. };
  180. struct mxser_mon_ext {
  181. unsigned long rx_cnt[32];
  182. unsigned long tx_cnt[32];
  183. unsigned long up_rxcnt[32];
  184. unsigned long up_txcnt[32];
  185. int modem_status[32];
  186. long baudrate[32];
  187. int databits[32];
  188. int stopbits[32];
  189. int parity[32];
  190. int flowctrl[32];
  191. int fifo[32];
  192. int iftype[32];
  193. };
  194. struct mxser_board;
  195. struct mxser_port {
  196. struct tty_port port;
  197. struct mxser_board *board;
  198. unsigned long ioaddr;
  199. unsigned long opmode_ioaddr;
  200. int max_baud;
  201. int rx_high_water;
  202. int rx_trigger; /* Rx fifo trigger level */
  203. int rx_low_water;
  204. int baud_base; /* max. speed */
  205. int type; /* UART type */
  206. int x_char; /* xon/xoff character */
  207. int IER; /* Interrupt Enable Register */
  208. int MCR; /* Modem control register */
  209. unsigned char stop_rx;
  210. unsigned char ldisc_stop_rx;
  211. int custom_divisor;
  212. unsigned char err_shadow;
  213. struct async_icount icount; /* kernel counters for 4 input interrupts */
  214. unsigned int timeout;
  215. int read_status_mask;
  216. int ignore_status_mask;
  217. unsigned int xmit_fifo_size;
  218. int xmit_head;
  219. int xmit_tail;
  220. int xmit_cnt;
  221. int closing;
  222. struct ktermios normal_termios;
  223. struct mxser_mon mon_data;
  224. spinlock_t slock;
  225. };
  226. struct mxser_board {
  227. unsigned int idx;
  228. int irq;
  229. const struct mxser_cardinfo *info;
  230. unsigned long vector;
  231. unsigned long vector_mask;
  232. int chip_flag;
  233. int uart_type;
  234. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  235. };
  236. struct mxser_mstatus {
  237. tcflag_t cflag;
  238. int cts;
  239. int dsr;
  240. int ri;
  241. int dcd;
  242. };
  243. static struct mxser_board mxser_boards[MXSER_BOARDS];
  244. static struct tty_driver *mxvar_sdriver;
  245. static struct mxser_log mxvar_log;
  246. static int mxser_set_baud_method[MXSER_PORTS + 1];
  247. static void mxser_enable_must_enchance_mode(unsigned long baseio)
  248. {
  249. u8 oldlcr;
  250. u8 efr;
  251. oldlcr = inb(baseio + UART_LCR);
  252. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  253. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  254. efr |= MOXA_MUST_EFR_EFRB_ENABLE;
  255. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  256. outb(oldlcr, baseio + UART_LCR);
  257. }
  258. #ifdef CONFIG_PCI
  259. static void mxser_disable_must_enchance_mode(unsigned long baseio)
  260. {
  261. u8 oldlcr;
  262. u8 efr;
  263. oldlcr = inb(baseio + UART_LCR);
  264. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  265. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  266. efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
  267. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  268. outb(oldlcr, baseio + UART_LCR);
  269. }
  270. #endif
  271. static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
  272. {
  273. u8 oldlcr;
  274. u8 efr;
  275. oldlcr = inb(baseio + UART_LCR);
  276. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  277. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  278. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  279. efr |= MOXA_MUST_EFR_BANK0;
  280. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  281. outb(value, baseio + MOXA_MUST_XON1_REGISTER);
  282. outb(oldlcr, baseio + UART_LCR);
  283. }
  284. static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
  285. {
  286. u8 oldlcr;
  287. u8 efr;
  288. oldlcr = inb(baseio + UART_LCR);
  289. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  290. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  291. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  292. efr |= MOXA_MUST_EFR_BANK0;
  293. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  294. outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
  295. outb(oldlcr, baseio + UART_LCR);
  296. }
  297. static void mxser_set_must_fifo_value(struct mxser_port *info)
  298. {
  299. u8 oldlcr;
  300. u8 efr;
  301. oldlcr = inb(info->ioaddr + UART_LCR);
  302. outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
  303. efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
  304. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  305. efr |= MOXA_MUST_EFR_BANK1;
  306. outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
  307. outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
  308. outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
  309. outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
  310. outb(oldlcr, info->ioaddr + UART_LCR);
  311. }
  312. static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
  313. {
  314. u8 oldlcr;
  315. u8 efr;
  316. oldlcr = inb(baseio + UART_LCR);
  317. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  318. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  319. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  320. efr |= MOXA_MUST_EFR_BANK2;
  321. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  322. outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
  323. outb(oldlcr, baseio + UART_LCR);
  324. }
  325. #ifdef CONFIG_PCI
  326. static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
  327. {
  328. u8 oldlcr;
  329. u8 efr;
  330. oldlcr = inb(baseio + UART_LCR);
  331. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  332. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  333. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  334. efr |= MOXA_MUST_EFR_BANK2;
  335. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  336. *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
  337. outb(oldlcr, baseio + UART_LCR);
  338. }
  339. #endif
  340. static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
  341. {
  342. u8 oldlcr;
  343. u8 efr;
  344. oldlcr = inb(baseio + UART_LCR);
  345. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  346. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  347. efr &= ~MOXA_MUST_EFR_SF_MASK;
  348. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  349. outb(oldlcr, baseio + UART_LCR);
  350. }
  351. static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
  352. {
  353. u8 oldlcr;
  354. u8 efr;
  355. oldlcr = inb(baseio + UART_LCR);
  356. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  357. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  358. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  359. efr |= MOXA_MUST_EFR_SF_TX1;
  360. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  361. outb(oldlcr, baseio + UART_LCR);
  362. }
  363. static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
  364. {
  365. u8 oldlcr;
  366. u8 efr;
  367. oldlcr = inb(baseio + UART_LCR);
  368. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  369. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  370. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  371. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  372. outb(oldlcr, baseio + UART_LCR);
  373. }
  374. static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
  375. {
  376. u8 oldlcr;
  377. u8 efr;
  378. oldlcr = inb(baseio + UART_LCR);
  379. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  380. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  381. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  382. efr |= MOXA_MUST_EFR_SF_RX1;
  383. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  384. outb(oldlcr, baseio + UART_LCR);
  385. }
  386. static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
  387. {
  388. u8 oldlcr;
  389. u8 efr;
  390. oldlcr = inb(baseio + UART_LCR);
  391. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  392. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  393. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  394. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  395. outb(oldlcr, baseio + UART_LCR);
  396. }
  397. #ifdef CONFIG_PCI
  398. static int CheckIsMoxaMust(unsigned long io)
  399. {
  400. u8 oldmcr, hwid;
  401. int i;
  402. outb(0, io + UART_LCR);
  403. mxser_disable_must_enchance_mode(io);
  404. oldmcr = inb(io + UART_MCR);
  405. outb(0, io + UART_MCR);
  406. mxser_set_must_xon1_value(io, 0x11);
  407. if ((hwid = inb(io + UART_MCR)) != 0) {
  408. outb(oldmcr, io + UART_MCR);
  409. return MOXA_OTHER_UART;
  410. }
  411. mxser_get_must_hardware_id(io, &hwid);
  412. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  413. if (hwid == Gpci_uart_info[i].type)
  414. return (int)hwid;
  415. }
  416. return MOXA_OTHER_UART;
  417. }
  418. #endif
  419. static void process_txrx_fifo(struct mxser_port *info)
  420. {
  421. int i;
  422. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  423. info->rx_trigger = 1;
  424. info->rx_high_water = 1;
  425. info->rx_low_water = 1;
  426. info->xmit_fifo_size = 1;
  427. } else
  428. for (i = 0; i < UART_INFO_NUM; i++)
  429. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  430. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  431. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  432. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  433. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  434. break;
  435. }
  436. }
  437. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  438. {
  439. static unsigned char mxser_msr[MXSER_PORTS + 1];
  440. unsigned char status = 0;
  441. status = inb(baseaddr + UART_MSR);
  442. mxser_msr[port] &= 0x0F;
  443. mxser_msr[port] |= status;
  444. status = mxser_msr[port];
  445. if (mode)
  446. mxser_msr[port] = 0;
  447. return status;
  448. }
  449. static int mxser_carrier_raised(struct tty_port *port)
  450. {
  451. struct mxser_port *mp = container_of(port, struct mxser_port, port);
  452. return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
  453. }
  454. static void mxser_dtr_rts(struct tty_port *port, int on)
  455. {
  456. struct mxser_port *mp = container_of(port, struct mxser_port, port);
  457. unsigned long flags;
  458. spin_lock_irqsave(&mp->slock, flags);
  459. if (on)
  460. outb(inb(mp->ioaddr + UART_MCR) |
  461. UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
  462. else
  463. outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
  464. mp->ioaddr + UART_MCR);
  465. spin_unlock_irqrestore(&mp->slock, flags);
  466. }
  467. static int mxser_set_baud(struct tty_struct *tty, long newspd)
  468. {
  469. struct mxser_port *info = tty->driver_data;
  470. unsigned int quot = 0, baud;
  471. unsigned char cval;
  472. u64 timeout;
  473. if (!info->ioaddr)
  474. return -1;
  475. if (newspd > info->max_baud)
  476. return -1;
  477. if (newspd == 134) {
  478. quot = 2 * info->baud_base / 269;
  479. tty_encode_baud_rate(tty, 134, 134);
  480. } else if (newspd) {
  481. quot = info->baud_base / newspd;
  482. if (quot == 0)
  483. quot = 1;
  484. baud = info->baud_base/quot;
  485. tty_encode_baud_rate(tty, baud, baud);
  486. } else {
  487. quot = 0;
  488. }
  489. /*
  490. * worst case (128 * 1000 * 10 * 18432) needs 35 bits, so divide in the
  491. * u64 domain
  492. */
  493. timeout = (u64)info->xmit_fifo_size * HZ * 10 * quot;
  494. do_div(timeout, info->baud_base);
  495. info->timeout = timeout + HZ / 50; /* Add .02 seconds of slop */
  496. if (quot) {
  497. info->MCR |= UART_MCR_DTR;
  498. outb(info->MCR, info->ioaddr + UART_MCR);
  499. } else {
  500. info->MCR &= ~UART_MCR_DTR;
  501. outb(info->MCR, info->ioaddr + UART_MCR);
  502. return 0;
  503. }
  504. cval = inb(info->ioaddr + UART_LCR);
  505. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  506. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  507. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  508. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  509. #ifdef BOTHER
  510. if (C_BAUD(tty) == BOTHER) {
  511. quot = info->baud_base % newspd;
  512. quot *= 8;
  513. if (quot % newspd > newspd / 2) {
  514. quot /= newspd;
  515. quot++;
  516. } else
  517. quot /= newspd;
  518. mxser_set_must_enum_value(info->ioaddr, quot);
  519. } else
  520. #endif
  521. mxser_set_must_enum_value(info->ioaddr, 0);
  522. return 0;
  523. }
  524. /*
  525. * This routine is called to set the UART divisor registers to match
  526. * the specified baud rate for a serial port.
  527. */
  528. static void mxser_change_speed(struct tty_struct *tty)
  529. {
  530. struct mxser_port *info = tty->driver_data;
  531. unsigned cflag, cval, fcr;
  532. unsigned char status;
  533. cflag = tty->termios.c_cflag;
  534. if (!info->ioaddr)
  535. return;
  536. if (mxser_set_baud_method[tty->index] == 0)
  537. mxser_set_baud(tty, tty_get_baud_rate(tty));
  538. /* byte size and parity */
  539. switch (cflag & CSIZE) {
  540. case CS5:
  541. cval = 0x00;
  542. break;
  543. case CS6:
  544. cval = 0x01;
  545. break;
  546. case CS7:
  547. cval = 0x02;
  548. break;
  549. case CS8:
  550. cval = 0x03;
  551. break;
  552. default:
  553. cval = 0x00;
  554. break; /* too keep GCC shut... */
  555. }
  556. if (cflag & CSTOPB)
  557. cval |= 0x04;
  558. if (cflag & PARENB)
  559. cval |= UART_LCR_PARITY;
  560. if (!(cflag & PARODD))
  561. cval |= UART_LCR_EPAR;
  562. if (cflag & CMSPAR)
  563. cval |= UART_LCR_SPAR;
  564. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  565. if (info->board->chip_flag) {
  566. fcr = UART_FCR_ENABLE_FIFO;
  567. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  568. mxser_set_must_fifo_value(info);
  569. } else
  570. fcr = 0;
  571. } else {
  572. fcr = UART_FCR_ENABLE_FIFO;
  573. if (info->board->chip_flag) {
  574. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  575. mxser_set_must_fifo_value(info);
  576. } else {
  577. switch (info->rx_trigger) {
  578. case 1:
  579. fcr |= UART_FCR_TRIGGER_1;
  580. break;
  581. case 4:
  582. fcr |= UART_FCR_TRIGGER_4;
  583. break;
  584. case 8:
  585. fcr |= UART_FCR_TRIGGER_8;
  586. break;
  587. default:
  588. fcr |= UART_FCR_TRIGGER_14;
  589. break;
  590. }
  591. }
  592. }
  593. /* CTS flow control flag and modem status interrupts */
  594. info->IER &= ~UART_IER_MSI;
  595. info->MCR &= ~UART_MCR_AFE;
  596. tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
  597. if (cflag & CRTSCTS) {
  598. info->IER |= UART_IER_MSI;
  599. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  600. info->MCR |= UART_MCR_AFE;
  601. } else {
  602. status = inb(info->ioaddr + UART_MSR);
  603. if (tty->hw_stopped) {
  604. if (status & UART_MSR_CTS) {
  605. tty->hw_stopped = 0;
  606. if (info->type != PORT_16550A &&
  607. !info->board->chip_flag) {
  608. outb(info->IER & ~UART_IER_THRI,
  609. info->ioaddr +
  610. UART_IER);
  611. info->IER |= UART_IER_THRI;
  612. outb(info->IER, info->ioaddr +
  613. UART_IER);
  614. }
  615. tty_wakeup(tty);
  616. }
  617. } else {
  618. if (!(status & UART_MSR_CTS)) {
  619. tty->hw_stopped = 1;
  620. if ((info->type != PORT_16550A) &&
  621. (!info->board->chip_flag)) {
  622. info->IER &= ~UART_IER_THRI;
  623. outb(info->IER, info->ioaddr +
  624. UART_IER);
  625. }
  626. }
  627. }
  628. }
  629. }
  630. outb(info->MCR, info->ioaddr + UART_MCR);
  631. tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
  632. if (~cflag & CLOCAL)
  633. info->IER |= UART_IER_MSI;
  634. outb(info->IER, info->ioaddr + UART_IER);
  635. /*
  636. * Set up parity check flag
  637. */
  638. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  639. if (I_INPCK(tty))
  640. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  641. if (I_BRKINT(tty) || I_PARMRK(tty))
  642. info->read_status_mask |= UART_LSR_BI;
  643. info->ignore_status_mask = 0;
  644. if (I_IGNBRK(tty)) {
  645. info->ignore_status_mask |= UART_LSR_BI;
  646. info->read_status_mask |= UART_LSR_BI;
  647. /*
  648. * If we're ignore parity and break indicators, ignore
  649. * overruns too. (For real raw support).
  650. */
  651. if (I_IGNPAR(tty)) {
  652. info->ignore_status_mask |=
  653. UART_LSR_OE |
  654. UART_LSR_PE |
  655. UART_LSR_FE;
  656. info->read_status_mask |=
  657. UART_LSR_OE |
  658. UART_LSR_PE |
  659. UART_LSR_FE;
  660. }
  661. }
  662. if (info->board->chip_flag) {
  663. mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
  664. mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
  665. if (I_IXON(tty)) {
  666. mxser_enable_must_rx_software_flow_control(
  667. info->ioaddr);
  668. } else {
  669. mxser_disable_must_rx_software_flow_control(
  670. info->ioaddr);
  671. }
  672. if (I_IXOFF(tty)) {
  673. mxser_enable_must_tx_software_flow_control(
  674. info->ioaddr);
  675. } else {
  676. mxser_disable_must_tx_software_flow_control(
  677. info->ioaddr);
  678. }
  679. }
  680. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  681. outb(cval, info->ioaddr + UART_LCR);
  682. }
  683. static void mxser_check_modem_status(struct tty_struct *tty,
  684. struct mxser_port *port, int status)
  685. {
  686. /* update input line counters */
  687. if (status & UART_MSR_TERI)
  688. port->icount.rng++;
  689. if (status & UART_MSR_DDSR)
  690. port->icount.dsr++;
  691. if (status & UART_MSR_DDCD)
  692. port->icount.dcd++;
  693. if (status & UART_MSR_DCTS)
  694. port->icount.cts++;
  695. port->mon_data.modem_status = status;
  696. wake_up_interruptible(&port->port.delta_msr_wait);
  697. if (tty_port_check_carrier(&port->port) && (status & UART_MSR_DDCD)) {
  698. if (status & UART_MSR_DCD)
  699. wake_up_interruptible(&port->port.open_wait);
  700. }
  701. if (tty_port_cts_enabled(&port->port)) {
  702. if (tty->hw_stopped) {
  703. if (status & UART_MSR_CTS) {
  704. tty->hw_stopped = 0;
  705. if ((port->type != PORT_16550A) &&
  706. (!port->board->chip_flag)) {
  707. outb(port->IER & ~UART_IER_THRI,
  708. port->ioaddr + UART_IER);
  709. port->IER |= UART_IER_THRI;
  710. outb(port->IER, port->ioaddr +
  711. UART_IER);
  712. }
  713. tty_wakeup(tty);
  714. }
  715. } else {
  716. if (!(status & UART_MSR_CTS)) {
  717. tty->hw_stopped = 1;
  718. if (port->type != PORT_16550A &&
  719. !port->board->chip_flag) {
  720. port->IER &= ~UART_IER_THRI;
  721. outb(port->IER, port->ioaddr +
  722. UART_IER);
  723. }
  724. }
  725. }
  726. }
  727. }
  728. static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
  729. {
  730. struct mxser_port *info = container_of(port, struct mxser_port, port);
  731. unsigned long page;
  732. unsigned long flags;
  733. int ret;
  734. page = __get_free_page(GFP_KERNEL);
  735. if (!page)
  736. return -ENOMEM;
  737. spin_lock_irqsave(&info->slock, flags);
  738. if (!info->ioaddr || !info->type) {
  739. set_bit(TTY_IO_ERROR, &tty->flags);
  740. spin_unlock_irqrestore(&info->slock, flags);
  741. ret = 0;
  742. goto err_free_xmit;
  743. }
  744. info->port.xmit_buf = (unsigned char *) page;
  745. /*
  746. * Clear the FIFO buffers and disable them
  747. * (they will be reenabled in mxser_change_speed())
  748. */
  749. if (info->board->chip_flag)
  750. outb((UART_FCR_CLEAR_RCVR |
  751. UART_FCR_CLEAR_XMIT |
  752. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  753. else
  754. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  755. info->ioaddr + UART_FCR);
  756. /*
  757. * At this point there's no way the LSR could still be 0xFF;
  758. * if it is, then bail out, because there's likely no UART
  759. * here.
  760. */
  761. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  762. spin_unlock_irqrestore(&info->slock, flags);
  763. if (capable(CAP_SYS_ADMIN)) {
  764. set_bit(TTY_IO_ERROR, &tty->flags);
  765. return 0;
  766. }
  767. ret = -ENODEV;
  768. goto err_free_xmit;
  769. }
  770. /*
  771. * Clear the interrupt registers.
  772. */
  773. (void) inb(info->ioaddr + UART_LSR);
  774. (void) inb(info->ioaddr + UART_RX);
  775. (void) inb(info->ioaddr + UART_IIR);
  776. (void) inb(info->ioaddr + UART_MSR);
  777. /*
  778. * Now, initialize the UART
  779. */
  780. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  781. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  782. outb(info->MCR, info->ioaddr + UART_MCR);
  783. /*
  784. * Finally, enable interrupts
  785. */
  786. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  787. if (info->board->chip_flag)
  788. info->IER |= MOXA_MUST_IER_EGDAI;
  789. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  790. /*
  791. * And clear the interrupt registers again for luck.
  792. */
  793. (void) inb(info->ioaddr + UART_LSR);
  794. (void) inb(info->ioaddr + UART_RX);
  795. (void) inb(info->ioaddr + UART_IIR);
  796. (void) inb(info->ioaddr + UART_MSR);
  797. clear_bit(TTY_IO_ERROR, &tty->flags);
  798. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  799. /*
  800. * and set the speed of the serial port
  801. */
  802. mxser_change_speed(tty);
  803. spin_unlock_irqrestore(&info->slock, flags);
  804. return 0;
  805. err_free_xmit:
  806. free_page(page);
  807. info->port.xmit_buf = NULL;
  808. return ret;
  809. }
  810. /*
  811. * This routine will shutdown a serial port
  812. */
  813. static void mxser_shutdown_port(struct tty_port *port)
  814. {
  815. struct mxser_port *info = container_of(port, struct mxser_port, port);
  816. unsigned long flags;
  817. spin_lock_irqsave(&info->slock, flags);
  818. /*
  819. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  820. * here so the queue might never be waken up
  821. */
  822. wake_up_interruptible(&info->port.delta_msr_wait);
  823. /*
  824. * Free the xmit buffer, if necessary
  825. */
  826. if (info->port.xmit_buf) {
  827. free_page((unsigned long) info->port.xmit_buf);
  828. info->port.xmit_buf = NULL;
  829. }
  830. info->IER = 0;
  831. outb(0x00, info->ioaddr + UART_IER);
  832. /* clear Rx/Tx FIFO's */
  833. if (info->board->chip_flag)
  834. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  835. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  836. info->ioaddr + UART_FCR);
  837. else
  838. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  839. info->ioaddr + UART_FCR);
  840. /* read data port to reset things */
  841. (void) inb(info->ioaddr + UART_RX);
  842. if (info->board->chip_flag)
  843. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  844. spin_unlock_irqrestore(&info->slock, flags);
  845. }
  846. /*
  847. * This routine is called whenever a serial port is opened. It
  848. * enables interrupts for a serial port, linking in its async structure into
  849. * the IRQ chain. It also performs the serial-specific
  850. * initialization for the tty structure.
  851. */
  852. static int mxser_open(struct tty_struct *tty, struct file *filp)
  853. {
  854. struct mxser_port *info;
  855. int line;
  856. line = tty->index;
  857. if (line == MXSER_PORTS)
  858. return 0;
  859. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  860. if (!info->ioaddr)
  861. return -ENODEV;
  862. tty->driver_data = info;
  863. return tty_port_open(&info->port, tty, filp);
  864. }
  865. static void mxser_flush_buffer(struct tty_struct *tty)
  866. {
  867. struct mxser_port *info = tty->driver_data;
  868. char fcr;
  869. unsigned long flags;
  870. spin_lock_irqsave(&info->slock, flags);
  871. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  872. fcr = inb(info->ioaddr + UART_FCR);
  873. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  874. info->ioaddr + UART_FCR);
  875. outb(fcr, info->ioaddr + UART_FCR);
  876. spin_unlock_irqrestore(&info->slock, flags);
  877. tty_wakeup(tty);
  878. }
  879. static void mxser_close_port(struct tty_port *port)
  880. {
  881. struct mxser_port *info = container_of(port, struct mxser_port, port);
  882. unsigned long timeout;
  883. /*
  884. * At this point we stop accepting input. To do this, we
  885. * disable the receive line status interrupts, and tell the
  886. * interrupt driver to stop checking the data ready bit in the
  887. * line status register.
  888. */
  889. info->IER &= ~UART_IER_RLSI;
  890. if (info->board->chip_flag)
  891. info->IER &= ~MOXA_MUST_RECV_ISR;
  892. outb(info->IER, info->ioaddr + UART_IER);
  893. /*
  894. * Before we drop DTR, make sure the UART transmitter
  895. * has completely drained; this is especially
  896. * important if there is a transmit FIFO!
  897. */
  898. timeout = jiffies + HZ;
  899. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  900. schedule_timeout_interruptible(5);
  901. if (time_after(jiffies, timeout))
  902. break;
  903. }
  904. }
  905. /*
  906. * This routine is called when the serial port gets closed. First, we
  907. * wait for the last remaining data to be sent. Then, we unlink its
  908. * async structure from the interrupt chain if necessary, and we free
  909. * that IRQ if nothing is left in the chain.
  910. */
  911. static void mxser_close(struct tty_struct *tty, struct file *filp)
  912. {
  913. struct mxser_port *info = tty->driver_data;
  914. struct tty_port *port = &info->port;
  915. if (tty->index == MXSER_PORTS || info == NULL)
  916. return;
  917. if (tty_port_close_start(port, tty, filp) == 0)
  918. return;
  919. info->closing = 1;
  920. mutex_lock(&port->mutex);
  921. mxser_close_port(port);
  922. mxser_flush_buffer(tty);
  923. if (tty_port_initialized(port) && C_HUPCL(tty))
  924. tty_port_lower_dtr_rts(port);
  925. mxser_shutdown_port(port);
  926. tty_port_set_initialized(port, 0);
  927. mutex_unlock(&port->mutex);
  928. info->closing = 0;
  929. /* Right now the tty_port set is done outside of the close_end helper
  930. as we don't yet have everyone using refcounts */
  931. tty_port_close_end(port, tty);
  932. tty_port_tty_set(port, NULL);
  933. }
  934. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  935. {
  936. int c, total = 0;
  937. struct mxser_port *info = tty->driver_data;
  938. unsigned long flags;
  939. if (!info->port.xmit_buf)
  940. return 0;
  941. while (1) {
  942. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  943. SERIAL_XMIT_SIZE - info->xmit_head));
  944. if (c <= 0)
  945. break;
  946. memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
  947. spin_lock_irqsave(&info->slock, flags);
  948. info->xmit_head = (info->xmit_head + c) &
  949. (SERIAL_XMIT_SIZE - 1);
  950. info->xmit_cnt += c;
  951. spin_unlock_irqrestore(&info->slock, flags);
  952. buf += c;
  953. count -= c;
  954. total += c;
  955. }
  956. if (info->xmit_cnt && !tty->stopped) {
  957. if (!tty->hw_stopped ||
  958. (info->type == PORT_16550A) ||
  959. (info->board->chip_flag)) {
  960. spin_lock_irqsave(&info->slock, flags);
  961. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  962. UART_IER);
  963. info->IER |= UART_IER_THRI;
  964. outb(info->IER, info->ioaddr + UART_IER);
  965. spin_unlock_irqrestore(&info->slock, flags);
  966. }
  967. }
  968. return total;
  969. }
  970. static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
  971. {
  972. struct mxser_port *info = tty->driver_data;
  973. unsigned long flags;
  974. if (!info->port.xmit_buf)
  975. return 0;
  976. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  977. return 0;
  978. spin_lock_irqsave(&info->slock, flags);
  979. info->port.xmit_buf[info->xmit_head++] = ch;
  980. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  981. info->xmit_cnt++;
  982. spin_unlock_irqrestore(&info->slock, flags);
  983. if (!tty->stopped) {
  984. if (!tty->hw_stopped ||
  985. (info->type == PORT_16550A) ||
  986. info->board->chip_flag) {
  987. spin_lock_irqsave(&info->slock, flags);
  988. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  989. info->IER |= UART_IER_THRI;
  990. outb(info->IER, info->ioaddr + UART_IER);
  991. spin_unlock_irqrestore(&info->slock, flags);
  992. }
  993. }
  994. return 1;
  995. }
  996. static void mxser_flush_chars(struct tty_struct *tty)
  997. {
  998. struct mxser_port *info = tty->driver_data;
  999. unsigned long flags;
  1000. if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
  1001. (tty->hw_stopped && info->type != PORT_16550A &&
  1002. !info->board->chip_flag))
  1003. return;
  1004. spin_lock_irqsave(&info->slock, flags);
  1005. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1006. info->IER |= UART_IER_THRI;
  1007. outb(info->IER, info->ioaddr + UART_IER);
  1008. spin_unlock_irqrestore(&info->slock, flags);
  1009. }
  1010. static int mxser_write_room(struct tty_struct *tty)
  1011. {
  1012. struct mxser_port *info = tty->driver_data;
  1013. int ret;
  1014. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1015. return ret < 0 ? 0 : ret;
  1016. }
  1017. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1018. {
  1019. struct mxser_port *info = tty->driver_data;
  1020. return info->xmit_cnt;
  1021. }
  1022. /*
  1023. * ------------------------------------------------------------
  1024. * friends of mxser_ioctl()
  1025. * ------------------------------------------------------------
  1026. */
  1027. static int mxser_get_serial_info(struct tty_struct *tty,
  1028. struct serial_struct *ss)
  1029. {
  1030. struct mxser_port *info = tty->driver_data;
  1031. struct tty_port *port = &info->port;
  1032. if (tty->index == MXSER_PORTS)
  1033. return -ENOTTY;
  1034. mutex_lock(&port->mutex);
  1035. ss->type = info->type,
  1036. ss->line = tty->index,
  1037. ss->port = info->ioaddr,
  1038. ss->irq = info->board->irq,
  1039. ss->flags = info->port.flags,
  1040. ss->baud_base = info->baud_base,
  1041. ss->close_delay = info->port.close_delay,
  1042. ss->closing_wait = info->port.closing_wait,
  1043. ss->custom_divisor = info->custom_divisor,
  1044. mutex_unlock(&port->mutex);
  1045. return 0;
  1046. }
  1047. static int mxser_set_serial_info(struct tty_struct *tty,
  1048. struct serial_struct *ss)
  1049. {
  1050. struct mxser_port *info = tty->driver_data;
  1051. struct tty_port *port = &info->port;
  1052. speed_t baud;
  1053. unsigned long sl_flags;
  1054. unsigned int flags;
  1055. int retval = 0;
  1056. if (tty->index == MXSER_PORTS)
  1057. return -ENOTTY;
  1058. if (tty_io_error(tty))
  1059. return -EIO;
  1060. mutex_lock(&port->mutex);
  1061. if (!info->ioaddr) {
  1062. mutex_unlock(&port->mutex);
  1063. return -ENODEV;
  1064. }
  1065. if (ss->irq != info->board->irq ||
  1066. ss->port != info->ioaddr) {
  1067. mutex_unlock(&port->mutex);
  1068. return -EINVAL;
  1069. }
  1070. flags = port->flags & ASYNC_SPD_MASK;
  1071. if (!capable(CAP_SYS_ADMIN)) {
  1072. if ((ss->baud_base != info->baud_base) ||
  1073. (ss->close_delay != info->port.close_delay) ||
  1074. ((ss->flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) {
  1075. mutex_unlock(&port->mutex);
  1076. return -EPERM;
  1077. }
  1078. info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
  1079. (ss->flags & ASYNC_USR_MASK));
  1080. } else {
  1081. /*
  1082. * OK, past this point, all the error checking has been done.
  1083. * At this point, we start making changes.....
  1084. */
  1085. port->flags = ((port->flags & ~ASYNC_FLAGS) |
  1086. (ss->flags & ASYNC_FLAGS));
  1087. port->close_delay = ss->close_delay * HZ / 100;
  1088. port->closing_wait = ss->closing_wait * HZ / 100;
  1089. port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  1090. if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
  1091. (ss->baud_base != info->baud_base ||
  1092. ss->custom_divisor !=
  1093. info->custom_divisor)) {
  1094. if (ss->custom_divisor == 0) {
  1095. mutex_unlock(&port->mutex);
  1096. return -EINVAL;
  1097. }
  1098. baud = ss->baud_base / ss->custom_divisor;
  1099. tty_encode_baud_rate(tty, baud, baud);
  1100. }
  1101. }
  1102. info->type = ss->type;
  1103. process_txrx_fifo(info);
  1104. if (tty_port_initialized(port)) {
  1105. if (flags != (port->flags & ASYNC_SPD_MASK)) {
  1106. spin_lock_irqsave(&info->slock, sl_flags);
  1107. mxser_change_speed(tty);
  1108. spin_unlock_irqrestore(&info->slock, sl_flags);
  1109. }
  1110. } else {
  1111. retval = mxser_activate(port, tty);
  1112. if (retval == 0)
  1113. tty_port_set_initialized(port, 1);
  1114. }
  1115. mutex_unlock(&port->mutex);
  1116. return retval;
  1117. }
  1118. /*
  1119. * mxser_get_lsr_info - get line status register info
  1120. *
  1121. * Purpose: Let user call ioctl() to get info when the UART physically
  1122. * is emptied. On bus types like RS485, the transmitter must
  1123. * release the bus after transmitting. This must be done when
  1124. * the transmit shift register is empty, not be done when the
  1125. * transmit holding register is empty. This functionality
  1126. * allows an RS485 driver to be written in user space.
  1127. */
  1128. static int mxser_get_lsr_info(struct mxser_port *info,
  1129. unsigned int __user *value)
  1130. {
  1131. unsigned char status;
  1132. unsigned int result;
  1133. unsigned long flags;
  1134. spin_lock_irqsave(&info->slock, flags);
  1135. status = inb(info->ioaddr + UART_LSR);
  1136. spin_unlock_irqrestore(&info->slock, flags);
  1137. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1138. return put_user(result, value);
  1139. }
  1140. static int mxser_tiocmget(struct tty_struct *tty)
  1141. {
  1142. struct mxser_port *info = tty->driver_data;
  1143. unsigned char control, status;
  1144. unsigned long flags;
  1145. if (tty->index == MXSER_PORTS)
  1146. return -ENOIOCTLCMD;
  1147. if (tty_io_error(tty))
  1148. return -EIO;
  1149. control = info->MCR;
  1150. spin_lock_irqsave(&info->slock, flags);
  1151. status = inb(info->ioaddr + UART_MSR);
  1152. if (status & UART_MSR_ANY_DELTA)
  1153. mxser_check_modem_status(tty, info, status);
  1154. spin_unlock_irqrestore(&info->slock, flags);
  1155. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1156. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1157. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1158. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1159. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1160. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1161. }
  1162. static int mxser_tiocmset(struct tty_struct *tty,
  1163. unsigned int set, unsigned int clear)
  1164. {
  1165. struct mxser_port *info = tty->driver_data;
  1166. unsigned long flags;
  1167. if (tty->index == MXSER_PORTS)
  1168. return -ENOIOCTLCMD;
  1169. if (tty_io_error(tty))
  1170. return -EIO;
  1171. spin_lock_irqsave(&info->slock, flags);
  1172. if (set & TIOCM_RTS)
  1173. info->MCR |= UART_MCR_RTS;
  1174. if (set & TIOCM_DTR)
  1175. info->MCR |= UART_MCR_DTR;
  1176. if (clear & TIOCM_RTS)
  1177. info->MCR &= ~UART_MCR_RTS;
  1178. if (clear & TIOCM_DTR)
  1179. info->MCR &= ~UART_MCR_DTR;
  1180. outb(info->MCR, info->ioaddr + UART_MCR);
  1181. spin_unlock_irqrestore(&info->slock, flags);
  1182. return 0;
  1183. }
  1184. static int __init mxser_program_mode(int port)
  1185. {
  1186. int id, i, j, n;
  1187. outb(0, port);
  1188. outb(0, port);
  1189. outb(0, port);
  1190. (void)inb(port);
  1191. (void)inb(port);
  1192. outb(0, port);
  1193. (void)inb(port);
  1194. id = inb(port + 1) & 0x1F;
  1195. if ((id != C168_ASIC_ID) &&
  1196. (id != C104_ASIC_ID) &&
  1197. (id != C102_ASIC_ID) &&
  1198. (id != CI132_ASIC_ID) &&
  1199. (id != CI134_ASIC_ID) &&
  1200. (id != CI104J_ASIC_ID))
  1201. return -1;
  1202. for (i = 0, j = 0; i < 4; i++) {
  1203. n = inb(port + 2);
  1204. if (n == 'M') {
  1205. j = 1;
  1206. } else if ((j == 1) && (n == 1)) {
  1207. j = 2;
  1208. break;
  1209. } else
  1210. j = 0;
  1211. }
  1212. if (j != 2)
  1213. id = -2;
  1214. return id;
  1215. }
  1216. static void __init mxser_normal_mode(int port)
  1217. {
  1218. int i, n;
  1219. outb(0xA5, port + 1);
  1220. outb(0x80, port + 3);
  1221. outb(12, port + 0); /* 9600 bps */
  1222. outb(0, port + 1);
  1223. outb(0x03, port + 3); /* 8 data bits */
  1224. outb(0x13, port + 4); /* loop back mode */
  1225. for (i = 0; i < 16; i++) {
  1226. n = inb(port + 5);
  1227. if ((n & 0x61) == 0x60)
  1228. break;
  1229. if ((n & 1) == 1)
  1230. (void)inb(port);
  1231. }
  1232. outb(0x00, port + 4);
  1233. }
  1234. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1235. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1236. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1237. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1238. #define EN_CCMD 0x000 /* Chip's command register */
  1239. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1240. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1241. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1242. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1243. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1244. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1245. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1246. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1247. static int __init mxser_read_register(int port, unsigned short *regs)
  1248. {
  1249. int i, k, value, id;
  1250. unsigned int j;
  1251. id = mxser_program_mode(port);
  1252. if (id < 0)
  1253. return id;
  1254. for (i = 0; i < 14; i++) {
  1255. k = (i & 0x3F) | 0x180;
  1256. for (j = 0x100; j > 0; j >>= 1) {
  1257. outb(CHIP_CS, port);
  1258. if (k & j) {
  1259. outb(CHIP_CS | CHIP_DO, port);
  1260. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1261. } else {
  1262. outb(CHIP_CS, port);
  1263. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1264. }
  1265. }
  1266. (void)inb(port);
  1267. value = 0;
  1268. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1269. outb(CHIP_CS, port);
  1270. outb(CHIP_CS | CHIP_SK, port);
  1271. if (inb(port) & CHIP_DI)
  1272. value |= j;
  1273. }
  1274. regs[i] = value;
  1275. outb(0, port);
  1276. }
  1277. mxser_normal_mode(port);
  1278. return id;
  1279. }
  1280. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1281. {
  1282. struct mxser_port *ip;
  1283. struct tty_port *port;
  1284. struct tty_struct *tty;
  1285. int result, status;
  1286. unsigned int i, j;
  1287. int ret = 0;
  1288. switch (cmd) {
  1289. case MOXA_GET_MAJOR:
  1290. printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
  1291. "%x (GET_MAJOR), fix your userspace\n",
  1292. current->comm, cmd);
  1293. return put_user(ttymajor, (int __user *)argp);
  1294. case MOXA_CHKPORTENABLE:
  1295. result = 0;
  1296. for (i = 0; i < MXSER_BOARDS; i++)
  1297. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1298. if (mxser_boards[i].ports[j].ioaddr)
  1299. result |= (1 << i);
  1300. return put_user(result, (unsigned long __user *)argp);
  1301. case MOXA_GETDATACOUNT:
  1302. /* The receive side is locked by port->slock but it isn't
  1303. clear that an exact snapshot is worth copying here */
  1304. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1305. ret = -EFAULT;
  1306. return ret;
  1307. case MOXA_GETMSTATUS: {
  1308. struct mxser_mstatus ms, __user *msu = argp;
  1309. for (i = 0; i < MXSER_BOARDS; i++)
  1310. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1311. ip = &mxser_boards[i].ports[j];
  1312. port = &ip->port;
  1313. memset(&ms, 0, sizeof(ms));
  1314. mutex_lock(&port->mutex);
  1315. if (!ip->ioaddr)
  1316. goto copy;
  1317. tty = tty_port_tty_get(port);
  1318. if (!tty)
  1319. ms.cflag = ip->normal_termios.c_cflag;
  1320. else
  1321. ms.cflag = tty->termios.c_cflag;
  1322. tty_kref_put(tty);
  1323. spin_lock_irq(&ip->slock);
  1324. status = inb(ip->ioaddr + UART_MSR);
  1325. spin_unlock_irq(&ip->slock);
  1326. if (status & UART_MSR_DCD)
  1327. ms.dcd = 1;
  1328. if (status & UART_MSR_DSR)
  1329. ms.dsr = 1;
  1330. if (status & UART_MSR_CTS)
  1331. ms.cts = 1;
  1332. copy:
  1333. mutex_unlock(&port->mutex);
  1334. if (copy_to_user(msu, &ms, sizeof(ms)))
  1335. return -EFAULT;
  1336. msu++;
  1337. }
  1338. return 0;
  1339. }
  1340. case MOXA_ASPP_MON_EXT: {
  1341. struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
  1342. unsigned int cflag, iflag, p;
  1343. u8 opmode;
  1344. me = kzalloc(sizeof(*me), GFP_KERNEL);
  1345. if (!me)
  1346. return -ENOMEM;
  1347. for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
  1348. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
  1349. if (p >= ARRAY_SIZE(me->rx_cnt)) {
  1350. i = MXSER_BOARDS;
  1351. break;
  1352. }
  1353. ip = &mxser_boards[i].ports[j];
  1354. port = &ip->port;
  1355. mutex_lock(&port->mutex);
  1356. if (!ip->ioaddr) {
  1357. mutex_unlock(&port->mutex);
  1358. continue;
  1359. }
  1360. spin_lock_irq(&ip->slock);
  1361. status = mxser_get_msr(ip->ioaddr, 0, p);
  1362. if (status & UART_MSR_TERI)
  1363. ip->icount.rng++;
  1364. if (status & UART_MSR_DDSR)
  1365. ip->icount.dsr++;
  1366. if (status & UART_MSR_DDCD)
  1367. ip->icount.dcd++;
  1368. if (status & UART_MSR_DCTS)
  1369. ip->icount.cts++;
  1370. ip->mon_data.modem_status = status;
  1371. me->rx_cnt[p] = ip->mon_data.rxcnt;
  1372. me->tx_cnt[p] = ip->mon_data.txcnt;
  1373. me->up_rxcnt[p] = ip->mon_data.up_rxcnt;
  1374. me->up_txcnt[p] = ip->mon_data.up_txcnt;
  1375. me->modem_status[p] =
  1376. ip->mon_data.modem_status;
  1377. spin_unlock_irq(&ip->slock);
  1378. tty = tty_port_tty_get(&ip->port);
  1379. if (!tty) {
  1380. cflag = ip->normal_termios.c_cflag;
  1381. iflag = ip->normal_termios.c_iflag;
  1382. me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios);
  1383. } else {
  1384. cflag = tty->termios.c_cflag;
  1385. iflag = tty->termios.c_iflag;
  1386. me->baudrate[p] = tty_get_baud_rate(tty);
  1387. }
  1388. tty_kref_put(tty);
  1389. me->databits[p] = cflag & CSIZE;
  1390. me->stopbits[p] = cflag & CSTOPB;
  1391. me->parity[p] = cflag & (PARENB | PARODD |
  1392. CMSPAR);
  1393. if (cflag & CRTSCTS)
  1394. me->flowctrl[p] |= 0x03;
  1395. if (iflag & (IXON | IXOFF))
  1396. me->flowctrl[p] |= 0x0C;
  1397. if (ip->type == PORT_16550A)
  1398. me->fifo[p] = 1;
  1399. if (ip->board->chip_flag == MOXA_MUST_MU860_HWID) {
  1400. opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2);
  1401. opmode &= OP_MODE_MASK;
  1402. } else {
  1403. opmode = RS232_MODE;
  1404. }
  1405. me->iftype[p] = opmode;
  1406. mutex_unlock(&port->mutex);
  1407. }
  1408. }
  1409. if (copy_to_user(argp, me, sizeof(*me)))
  1410. ret = -EFAULT;
  1411. kfree(me);
  1412. return ret;
  1413. }
  1414. default:
  1415. return -ENOIOCTLCMD;
  1416. }
  1417. return 0;
  1418. }
  1419. static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
  1420. struct async_icount *cprev)
  1421. {
  1422. struct async_icount cnow;
  1423. unsigned long flags;
  1424. int ret;
  1425. spin_lock_irqsave(&info->slock, flags);
  1426. cnow = info->icount; /* atomic copy */
  1427. spin_unlock_irqrestore(&info->slock, flags);
  1428. ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
  1429. ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
  1430. ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
  1431. ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
  1432. *cprev = cnow;
  1433. return ret;
  1434. }
  1435. static int mxser_ioctl(struct tty_struct *tty,
  1436. unsigned int cmd, unsigned long arg)
  1437. {
  1438. struct mxser_port *info = tty->driver_data;
  1439. struct async_icount cnow;
  1440. unsigned long flags;
  1441. void __user *argp = (void __user *)arg;
  1442. if (tty->index == MXSER_PORTS)
  1443. return mxser_ioctl_special(cmd, argp);
  1444. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1445. int p;
  1446. unsigned long opmode;
  1447. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1448. int shiftbit;
  1449. unsigned char val, mask;
  1450. if (info->board->chip_flag != MOXA_MUST_MU860_HWID)
  1451. return -EFAULT;
  1452. p = tty->index % 4;
  1453. if (cmd == MOXA_SET_OP_MODE) {
  1454. if (get_user(opmode, (int __user *) argp))
  1455. return -EFAULT;
  1456. if (opmode != RS232_MODE &&
  1457. opmode != RS485_2WIRE_MODE &&
  1458. opmode != RS422_MODE &&
  1459. opmode != RS485_4WIRE_MODE)
  1460. return -EFAULT;
  1461. mask = ModeMask[p];
  1462. shiftbit = p * 2;
  1463. spin_lock_irq(&info->slock);
  1464. val = inb(info->opmode_ioaddr);
  1465. val &= mask;
  1466. val |= (opmode << shiftbit);
  1467. outb(val, info->opmode_ioaddr);
  1468. spin_unlock_irq(&info->slock);
  1469. } else {
  1470. shiftbit = p * 2;
  1471. spin_lock_irq(&info->slock);
  1472. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1473. spin_unlock_irq(&info->slock);
  1474. opmode &= OP_MODE_MASK;
  1475. if (put_user(opmode, (int __user *)argp))
  1476. return -EFAULT;
  1477. }
  1478. return 0;
  1479. }
  1480. if (cmd != TIOCMIWAIT && tty_io_error(tty))
  1481. return -EIO;
  1482. switch (cmd) {
  1483. case TIOCSERGETLSR: /* Get line status register */
  1484. return mxser_get_lsr_info(info, argp);
  1485. /*
  1486. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1487. * - mask passed in arg for lines of interest
  1488. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1489. * Caller should use TIOCGICOUNT to see which one it was
  1490. */
  1491. case TIOCMIWAIT:
  1492. spin_lock_irqsave(&info->slock, flags);
  1493. cnow = info->icount; /* note the counters on entry */
  1494. spin_unlock_irqrestore(&info->slock, flags);
  1495. return wait_event_interruptible(info->port.delta_msr_wait,
  1496. mxser_cflags_changed(info, arg, &cnow));
  1497. case MOXA_HighSpeedOn:
  1498. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1499. case MOXA_SDS_RSTICOUNTER:
  1500. spin_lock_irq(&info->slock);
  1501. info->mon_data.rxcnt = 0;
  1502. info->mon_data.txcnt = 0;
  1503. spin_unlock_irq(&info->slock);
  1504. return 0;
  1505. case MOXA_ASPP_OQUEUE:{
  1506. int len, lsr;
  1507. len = mxser_chars_in_buffer(tty);
  1508. spin_lock_irq(&info->slock);
  1509. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
  1510. spin_unlock_irq(&info->slock);
  1511. len += (lsr ? 0 : 1);
  1512. return put_user(len, (int __user *)argp);
  1513. }
  1514. case MOXA_ASPP_MON: {
  1515. int mcr, status;
  1516. spin_lock_irq(&info->slock);
  1517. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1518. mxser_check_modem_status(tty, info, status);
  1519. mcr = inb(info->ioaddr + UART_MCR);
  1520. spin_unlock_irq(&info->slock);
  1521. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1522. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1523. else
  1524. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1525. if (mcr & MOXA_MUST_MCR_TX_XON)
  1526. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1527. else
  1528. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1529. if (tty->hw_stopped)
  1530. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1531. else
  1532. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1533. if (copy_to_user(argp, &info->mon_data,
  1534. sizeof(struct mxser_mon)))
  1535. return -EFAULT;
  1536. return 0;
  1537. }
  1538. case MOXA_ASPP_LSTATUS: {
  1539. if (put_user(info->err_shadow, (unsigned char __user *)argp))
  1540. return -EFAULT;
  1541. info->err_shadow = 0;
  1542. return 0;
  1543. }
  1544. case MOXA_SET_BAUD_METHOD: {
  1545. int method;
  1546. if (get_user(method, (int __user *)argp))
  1547. return -EFAULT;
  1548. mxser_set_baud_method[tty->index] = method;
  1549. return put_user(method, (int __user *)argp);
  1550. }
  1551. default:
  1552. return -ENOIOCTLCMD;
  1553. }
  1554. return 0;
  1555. }
  1556. /*
  1557. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1558. * Return: write counters to the user passed counter struct
  1559. * NB: both 1->0 and 0->1 transitions are counted except for
  1560. * RI where only 0->1 is counted.
  1561. */
  1562. static int mxser_get_icount(struct tty_struct *tty,
  1563. struct serial_icounter_struct *icount)
  1564. {
  1565. struct mxser_port *info = tty->driver_data;
  1566. struct async_icount cnow;
  1567. unsigned long flags;
  1568. spin_lock_irqsave(&info->slock, flags);
  1569. cnow = info->icount;
  1570. spin_unlock_irqrestore(&info->slock, flags);
  1571. icount->frame = cnow.frame;
  1572. icount->brk = cnow.brk;
  1573. icount->overrun = cnow.overrun;
  1574. icount->buf_overrun = cnow.buf_overrun;
  1575. icount->parity = cnow.parity;
  1576. icount->rx = cnow.rx;
  1577. icount->tx = cnow.tx;
  1578. icount->cts = cnow.cts;
  1579. icount->dsr = cnow.dsr;
  1580. icount->rng = cnow.rng;
  1581. icount->dcd = cnow.dcd;
  1582. return 0;
  1583. }
  1584. static void mxser_stoprx(struct tty_struct *tty)
  1585. {
  1586. struct mxser_port *info = tty->driver_data;
  1587. info->ldisc_stop_rx = 1;
  1588. if (I_IXOFF(tty)) {
  1589. if (info->board->chip_flag) {
  1590. info->IER &= ~MOXA_MUST_RECV_ISR;
  1591. outb(info->IER, info->ioaddr + UART_IER);
  1592. } else {
  1593. info->x_char = STOP_CHAR(tty);
  1594. outb(0, info->ioaddr + UART_IER);
  1595. info->IER |= UART_IER_THRI;
  1596. outb(info->IER, info->ioaddr + UART_IER);
  1597. }
  1598. }
  1599. if (C_CRTSCTS(tty)) {
  1600. info->MCR &= ~UART_MCR_RTS;
  1601. outb(info->MCR, info->ioaddr + UART_MCR);
  1602. }
  1603. }
  1604. /*
  1605. * This routine is called by the upper-layer tty layer to signal that
  1606. * incoming characters should be throttled.
  1607. */
  1608. static void mxser_throttle(struct tty_struct *tty)
  1609. {
  1610. mxser_stoprx(tty);
  1611. }
  1612. static void mxser_unthrottle(struct tty_struct *tty)
  1613. {
  1614. struct mxser_port *info = tty->driver_data;
  1615. /* startrx */
  1616. info->ldisc_stop_rx = 0;
  1617. if (I_IXOFF(tty)) {
  1618. if (info->x_char)
  1619. info->x_char = 0;
  1620. else {
  1621. if (info->board->chip_flag) {
  1622. info->IER |= MOXA_MUST_RECV_ISR;
  1623. outb(info->IER, info->ioaddr + UART_IER);
  1624. } else {
  1625. info->x_char = START_CHAR(tty);
  1626. outb(0, info->ioaddr + UART_IER);
  1627. info->IER |= UART_IER_THRI;
  1628. outb(info->IER, info->ioaddr + UART_IER);
  1629. }
  1630. }
  1631. }
  1632. if (C_CRTSCTS(tty)) {
  1633. info->MCR |= UART_MCR_RTS;
  1634. outb(info->MCR, info->ioaddr + UART_MCR);
  1635. }
  1636. }
  1637. /*
  1638. * mxser_stop() and mxser_start()
  1639. *
  1640. * This routines are called before setting or resetting tty->stopped.
  1641. * They enable or disable transmitter interrupts, as necessary.
  1642. */
  1643. static void mxser_stop(struct tty_struct *tty)
  1644. {
  1645. struct mxser_port *info = tty->driver_data;
  1646. unsigned long flags;
  1647. spin_lock_irqsave(&info->slock, flags);
  1648. if (info->IER & UART_IER_THRI) {
  1649. info->IER &= ~UART_IER_THRI;
  1650. outb(info->IER, info->ioaddr + UART_IER);
  1651. }
  1652. spin_unlock_irqrestore(&info->slock, flags);
  1653. }
  1654. static void mxser_start(struct tty_struct *tty)
  1655. {
  1656. struct mxser_port *info = tty->driver_data;
  1657. unsigned long flags;
  1658. spin_lock_irqsave(&info->slock, flags);
  1659. if (info->xmit_cnt && info->port.xmit_buf) {
  1660. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1661. info->IER |= UART_IER_THRI;
  1662. outb(info->IER, info->ioaddr + UART_IER);
  1663. }
  1664. spin_unlock_irqrestore(&info->slock, flags);
  1665. }
  1666. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1667. {
  1668. struct mxser_port *info = tty->driver_data;
  1669. unsigned long flags;
  1670. spin_lock_irqsave(&info->slock, flags);
  1671. mxser_change_speed(tty);
  1672. spin_unlock_irqrestore(&info->slock, flags);
  1673. if ((old_termios->c_cflag & CRTSCTS) && !C_CRTSCTS(tty)) {
  1674. tty->hw_stopped = 0;
  1675. mxser_start(tty);
  1676. }
  1677. /* Handle sw stopped */
  1678. if ((old_termios->c_iflag & IXON) && !I_IXON(tty)) {
  1679. tty->stopped = 0;
  1680. if (info->board->chip_flag) {
  1681. spin_lock_irqsave(&info->slock, flags);
  1682. mxser_disable_must_rx_software_flow_control(
  1683. info->ioaddr);
  1684. spin_unlock_irqrestore(&info->slock, flags);
  1685. }
  1686. mxser_start(tty);
  1687. }
  1688. }
  1689. /*
  1690. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1691. */
  1692. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1693. {
  1694. struct mxser_port *info = tty->driver_data;
  1695. unsigned long orig_jiffies, char_time;
  1696. unsigned long flags;
  1697. int lsr;
  1698. if (info->type == PORT_UNKNOWN)
  1699. return;
  1700. if (info->xmit_fifo_size == 0)
  1701. return; /* Just in case.... */
  1702. orig_jiffies = jiffies;
  1703. /*
  1704. * Set the check interval to be 1/5 of the estimated time to
  1705. * send a single character, and make it at least 1. The check
  1706. * interval should also be less than the timeout.
  1707. *
  1708. * Note: we have to use pretty tight timings here to satisfy
  1709. * the NIST-PCTS.
  1710. */
  1711. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1712. char_time = char_time / 5;
  1713. if (char_time == 0)
  1714. char_time = 1;
  1715. if (timeout && timeout < char_time)
  1716. char_time = timeout;
  1717. /*
  1718. * If the transmitter hasn't cleared in twice the approximate
  1719. * amount of time to send the entire FIFO, it probably won't
  1720. * ever clear. This assumes the UART isn't doing flow
  1721. * control, which is currently the case. Hence, if it ever
  1722. * takes longer than info->timeout, this is probably due to a
  1723. * UART bug of some kind. So, we clamp the timeout parameter at
  1724. * 2*info->timeout.
  1725. */
  1726. if (!timeout || timeout > 2 * info->timeout)
  1727. timeout = 2 * info->timeout;
  1728. spin_lock_irqsave(&info->slock, flags);
  1729. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1730. spin_unlock_irqrestore(&info->slock, flags);
  1731. schedule_timeout_interruptible(char_time);
  1732. spin_lock_irqsave(&info->slock, flags);
  1733. if (signal_pending(current))
  1734. break;
  1735. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1736. break;
  1737. }
  1738. spin_unlock_irqrestore(&info->slock, flags);
  1739. set_current_state(TASK_RUNNING);
  1740. }
  1741. /*
  1742. * This routine is called by tty_hangup() when a hangup is signaled.
  1743. */
  1744. static void mxser_hangup(struct tty_struct *tty)
  1745. {
  1746. struct mxser_port *info = tty->driver_data;
  1747. mxser_flush_buffer(tty);
  1748. tty_port_hangup(&info->port);
  1749. }
  1750. /*
  1751. * mxser_rs_break() --- routine which turns the break handling on or off
  1752. */
  1753. static int mxser_rs_break(struct tty_struct *tty, int break_state)
  1754. {
  1755. struct mxser_port *info = tty->driver_data;
  1756. unsigned long flags;
  1757. spin_lock_irqsave(&info->slock, flags);
  1758. if (break_state == -1)
  1759. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1760. info->ioaddr + UART_LCR);
  1761. else
  1762. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1763. info->ioaddr + UART_LCR);
  1764. spin_unlock_irqrestore(&info->slock, flags);
  1765. return 0;
  1766. }
  1767. static void mxser_receive_chars(struct tty_struct *tty,
  1768. struct mxser_port *port, int *status)
  1769. {
  1770. unsigned char ch, gdl;
  1771. int ignored = 0;
  1772. int cnt = 0;
  1773. int recv_room;
  1774. int max = 256;
  1775. recv_room = tty->receive_room;
  1776. if (recv_room == 0 && !port->ldisc_stop_rx)
  1777. mxser_stoprx(tty);
  1778. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1779. if (*status & UART_LSR_SPECIAL)
  1780. goto intr_old;
  1781. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1782. (*status & MOXA_MUST_LSR_RERR))
  1783. goto intr_old;
  1784. if (*status & MOXA_MUST_LSR_RERR)
  1785. goto intr_old;
  1786. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1787. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1788. gdl &= MOXA_MUST_GDL_MASK;
  1789. if (gdl >= recv_room) {
  1790. if (!port->ldisc_stop_rx)
  1791. mxser_stoprx(tty);
  1792. }
  1793. while (gdl--) {
  1794. ch = inb(port->ioaddr + UART_RX);
  1795. tty_insert_flip_char(&port->port, ch, 0);
  1796. cnt++;
  1797. }
  1798. goto end_intr;
  1799. }
  1800. intr_old:
  1801. do {
  1802. if (max-- < 0)
  1803. break;
  1804. ch = inb(port->ioaddr + UART_RX);
  1805. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1806. outb(0x23, port->ioaddr + UART_FCR);
  1807. *status &= port->read_status_mask;
  1808. if (*status & port->ignore_status_mask) {
  1809. if (++ignored > 100)
  1810. break;
  1811. } else {
  1812. char flag = 0;
  1813. if (*status & UART_LSR_SPECIAL) {
  1814. if (*status & UART_LSR_BI) {
  1815. flag = TTY_BREAK;
  1816. port->icount.brk++;
  1817. if (port->port.flags & ASYNC_SAK)
  1818. do_SAK(tty);
  1819. } else if (*status & UART_LSR_PE) {
  1820. flag = TTY_PARITY;
  1821. port->icount.parity++;
  1822. } else if (*status & UART_LSR_FE) {
  1823. flag = TTY_FRAME;
  1824. port->icount.frame++;
  1825. } else if (*status & UART_LSR_OE) {
  1826. flag = TTY_OVERRUN;
  1827. port->icount.overrun++;
  1828. } else
  1829. flag = TTY_BREAK;
  1830. }
  1831. tty_insert_flip_char(&port->port, ch, flag);
  1832. cnt++;
  1833. if (cnt >= recv_room) {
  1834. if (!port->ldisc_stop_rx)
  1835. mxser_stoprx(tty);
  1836. break;
  1837. }
  1838. }
  1839. if (port->board->chip_flag)
  1840. break;
  1841. *status = inb(port->ioaddr + UART_LSR);
  1842. } while (*status & UART_LSR_DR);
  1843. end_intr:
  1844. mxvar_log.rxcnt[tty->index] += cnt;
  1845. port->mon_data.rxcnt += cnt;
  1846. port->mon_data.up_rxcnt += cnt;
  1847. /*
  1848. * We are called from an interrupt context with &port->slock
  1849. * being held. Drop it temporarily in order to prevent
  1850. * recursive locking.
  1851. */
  1852. spin_unlock(&port->slock);
  1853. tty_flip_buffer_push(&port->port);
  1854. spin_lock(&port->slock);
  1855. }
  1856. static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
  1857. {
  1858. int count, cnt;
  1859. if (port->x_char) {
  1860. outb(port->x_char, port->ioaddr + UART_TX);
  1861. port->x_char = 0;
  1862. mxvar_log.txcnt[tty->index]++;
  1863. port->mon_data.txcnt++;
  1864. port->mon_data.up_txcnt++;
  1865. port->icount.tx++;
  1866. return;
  1867. }
  1868. if (port->port.xmit_buf == NULL)
  1869. return;
  1870. if (port->xmit_cnt <= 0 || tty->stopped ||
  1871. (tty->hw_stopped &&
  1872. (port->type != PORT_16550A) &&
  1873. (!port->board->chip_flag))) {
  1874. port->IER &= ~UART_IER_THRI;
  1875. outb(port->IER, port->ioaddr + UART_IER);
  1876. return;
  1877. }
  1878. cnt = port->xmit_cnt;
  1879. count = port->xmit_fifo_size;
  1880. do {
  1881. outb(port->port.xmit_buf[port->xmit_tail++],
  1882. port->ioaddr + UART_TX);
  1883. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  1884. if (--port->xmit_cnt <= 0)
  1885. break;
  1886. } while (--count > 0);
  1887. mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
  1888. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  1889. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  1890. port->icount.tx += (cnt - port->xmit_cnt);
  1891. if (port->xmit_cnt < WAKEUP_CHARS)
  1892. tty_wakeup(tty);
  1893. if (port->xmit_cnt <= 0) {
  1894. port->IER &= ~UART_IER_THRI;
  1895. outb(port->IER, port->ioaddr + UART_IER);
  1896. }
  1897. }
  1898. /*
  1899. * This is the serial driver's generic interrupt routine
  1900. */
  1901. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  1902. {
  1903. int status, iir, i;
  1904. struct mxser_board *brd = NULL;
  1905. struct mxser_port *port;
  1906. int max, irqbits, bits, msr;
  1907. unsigned int int_cnt, pass_counter = 0;
  1908. int handled = IRQ_NONE;
  1909. struct tty_struct *tty;
  1910. for (i = 0; i < MXSER_BOARDS; i++)
  1911. if (dev_id == &mxser_boards[i]) {
  1912. brd = dev_id;
  1913. break;
  1914. }
  1915. if (i == MXSER_BOARDS)
  1916. goto irq_stop;
  1917. if (brd == NULL)
  1918. goto irq_stop;
  1919. max = brd->info->nports;
  1920. while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
  1921. irqbits = inb(brd->vector) & brd->vector_mask;
  1922. if (irqbits == brd->vector_mask)
  1923. break;
  1924. handled = IRQ_HANDLED;
  1925. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  1926. if (irqbits == brd->vector_mask)
  1927. break;
  1928. if (bits & irqbits)
  1929. continue;
  1930. port = &brd->ports[i];
  1931. int_cnt = 0;
  1932. spin_lock(&port->slock);
  1933. do {
  1934. iir = inb(port->ioaddr + UART_IIR);
  1935. if (iir & UART_IIR_NO_INT)
  1936. break;
  1937. iir &= MOXA_MUST_IIR_MASK;
  1938. tty = tty_port_tty_get(&port->port);
  1939. if (!tty || port->closing ||
  1940. !tty_port_initialized(&port->port)) {
  1941. status = inb(port->ioaddr + UART_LSR);
  1942. outb(0x27, port->ioaddr + UART_FCR);
  1943. inb(port->ioaddr + UART_MSR);
  1944. tty_kref_put(tty);
  1945. break;
  1946. }
  1947. status = inb(port->ioaddr + UART_LSR);
  1948. if (status & UART_LSR_PE)
  1949. port->err_shadow |= NPPI_NOTIFY_PARITY;
  1950. if (status & UART_LSR_FE)
  1951. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  1952. if (status & UART_LSR_OE)
  1953. port->err_shadow |=
  1954. NPPI_NOTIFY_HW_OVERRUN;
  1955. if (status & UART_LSR_BI)
  1956. port->err_shadow |= NPPI_NOTIFY_BREAK;
  1957. if (port->board->chip_flag) {
  1958. if (iir == MOXA_MUST_IIR_GDA ||
  1959. iir == MOXA_MUST_IIR_RDA ||
  1960. iir == MOXA_MUST_IIR_RTO ||
  1961. iir == MOXA_MUST_IIR_LSR)
  1962. mxser_receive_chars(tty, port,
  1963. &status);
  1964. } else {
  1965. status &= port->read_status_mask;
  1966. if (status & UART_LSR_DR)
  1967. mxser_receive_chars(tty, port,
  1968. &status);
  1969. }
  1970. msr = inb(port->ioaddr + UART_MSR);
  1971. if (msr & UART_MSR_ANY_DELTA)
  1972. mxser_check_modem_status(tty, port, msr);
  1973. if (port->board->chip_flag) {
  1974. if (iir == 0x02 && (status &
  1975. UART_LSR_THRE))
  1976. mxser_transmit_chars(tty, port);
  1977. } else {
  1978. if (status & UART_LSR_THRE)
  1979. mxser_transmit_chars(tty, port);
  1980. }
  1981. tty_kref_put(tty);
  1982. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  1983. spin_unlock(&port->slock);
  1984. }
  1985. }
  1986. irq_stop:
  1987. return handled;
  1988. }
  1989. static const struct tty_operations mxser_ops = {
  1990. .open = mxser_open,
  1991. .close = mxser_close,
  1992. .write = mxser_write,
  1993. .put_char = mxser_put_char,
  1994. .flush_chars = mxser_flush_chars,
  1995. .write_room = mxser_write_room,
  1996. .chars_in_buffer = mxser_chars_in_buffer,
  1997. .flush_buffer = mxser_flush_buffer,
  1998. .ioctl = mxser_ioctl,
  1999. .throttle = mxser_throttle,
  2000. .unthrottle = mxser_unthrottle,
  2001. .set_termios = mxser_set_termios,
  2002. .stop = mxser_stop,
  2003. .start = mxser_start,
  2004. .hangup = mxser_hangup,
  2005. .break_ctl = mxser_rs_break,
  2006. .wait_until_sent = mxser_wait_until_sent,
  2007. .tiocmget = mxser_tiocmget,
  2008. .tiocmset = mxser_tiocmset,
  2009. .set_serial = mxser_set_serial_info,
  2010. .get_serial = mxser_get_serial_info,
  2011. .get_icount = mxser_get_icount,
  2012. };
  2013. static const struct tty_port_operations mxser_port_ops = {
  2014. .carrier_raised = mxser_carrier_raised,
  2015. .dtr_rts = mxser_dtr_rts,
  2016. .activate = mxser_activate,
  2017. .shutdown = mxser_shutdown_port,
  2018. };
  2019. /*
  2020. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2021. */
  2022. static bool allow_overlapping_vector;
  2023. module_param(allow_overlapping_vector, bool, S_IRUGO);
  2024. MODULE_PARM_DESC(allow_overlapping_vector, "whether we allow ISA cards to be configured such that vector overlabs IO ports (default=no)");
  2025. static bool mxser_overlapping_vector(struct mxser_board *brd)
  2026. {
  2027. return allow_overlapping_vector &&
  2028. brd->vector >= brd->ports[0].ioaddr &&
  2029. brd->vector < brd->ports[0].ioaddr + 8 * brd->info->nports;
  2030. }
  2031. static int mxser_request_vector(struct mxser_board *brd)
  2032. {
  2033. if (mxser_overlapping_vector(brd))
  2034. return 0;
  2035. return request_region(brd->vector, 1, "mxser(vector)") ? 0 : -EIO;
  2036. }
  2037. static void mxser_release_vector(struct mxser_board *brd)
  2038. {
  2039. if (mxser_overlapping_vector(brd))
  2040. return;
  2041. release_region(brd->vector, 1);
  2042. }
  2043. static void mxser_release_ISA_res(struct mxser_board *brd)
  2044. {
  2045. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2046. mxser_release_vector(brd);
  2047. }
  2048. static int mxser_initbrd(struct mxser_board *brd)
  2049. {
  2050. struct mxser_port *info;
  2051. unsigned int i;
  2052. int retval;
  2053. printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
  2054. brd->ports[0].max_baud);
  2055. for (i = 0; i < brd->info->nports; i++) {
  2056. info = &brd->ports[i];
  2057. tty_port_init(&info->port);
  2058. info->port.ops = &mxser_port_ops;
  2059. info->board = brd;
  2060. info->stop_rx = 0;
  2061. info->ldisc_stop_rx = 0;
  2062. /* Enhance mode enabled here */
  2063. if (brd->chip_flag != MOXA_OTHER_UART)
  2064. mxser_enable_must_enchance_mode(info->ioaddr);
  2065. info->type = brd->uart_type;
  2066. process_txrx_fifo(info);
  2067. info->custom_divisor = info->baud_base * 16;
  2068. info->port.close_delay = 5 * HZ / 10;
  2069. info->port.closing_wait = 30 * HZ;
  2070. info->normal_termios = mxvar_sdriver->init_termios;
  2071. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2072. info->err_shadow = 0;
  2073. spin_lock_init(&info->slock);
  2074. /* before set INT ISR, disable all int */
  2075. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2076. info->ioaddr + UART_IER);
  2077. }
  2078. retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
  2079. brd);
  2080. if (retval) {
  2081. for (i = 0; i < brd->info->nports; i++)
  2082. tty_port_destroy(&brd->ports[i].port);
  2083. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2084. "conflict with another device.\n",
  2085. brd->info->name, brd->irq);
  2086. }
  2087. return retval;
  2088. }
  2089. static void mxser_board_remove(struct mxser_board *brd)
  2090. {
  2091. unsigned int i;
  2092. for (i = 0; i < brd->info->nports; i++) {
  2093. tty_unregister_device(mxvar_sdriver, brd->idx + i);
  2094. tty_port_destroy(&brd->ports[i].port);
  2095. }
  2096. free_irq(brd->irq, brd);
  2097. }
  2098. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2099. {
  2100. int id, i, bits, ret;
  2101. unsigned short regs[16], irq;
  2102. unsigned char scratch, scratch2;
  2103. brd->chip_flag = MOXA_OTHER_UART;
  2104. id = mxser_read_register(cap, regs);
  2105. switch (id) {
  2106. case C168_ASIC_ID:
  2107. brd->info = &mxser_cards[0];
  2108. break;
  2109. case C104_ASIC_ID:
  2110. brd->info = &mxser_cards[1];
  2111. break;
  2112. case CI104J_ASIC_ID:
  2113. brd->info = &mxser_cards[2];
  2114. break;
  2115. case C102_ASIC_ID:
  2116. brd->info = &mxser_cards[5];
  2117. break;
  2118. case CI132_ASIC_ID:
  2119. brd->info = &mxser_cards[6];
  2120. break;
  2121. case CI134_ASIC_ID:
  2122. brd->info = &mxser_cards[7];
  2123. break;
  2124. default:
  2125. return 0;
  2126. }
  2127. irq = 0;
  2128. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2129. Flag-hack checks if configuration should be read as 2-port here. */
  2130. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2131. irq = regs[9] & 0xF000;
  2132. irq = irq | (irq >> 4);
  2133. if (irq != (regs[9] & 0xFF00))
  2134. goto err_irqconflict;
  2135. } else if (brd->info->nports == 4) {
  2136. irq = regs[9] & 0xF000;
  2137. irq = irq | (irq >> 4);
  2138. irq = irq | (irq >> 8);
  2139. if (irq != regs[9])
  2140. goto err_irqconflict;
  2141. } else if (brd->info->nports == 8) {
  2142. irq = regs[9] & 0xF000;
  2143. irq = irq | (irq >> 4);
  2144. irq = irq | (irq >> 8);
  2145. if ((irq != regs[9]) || (irq != regs[10]))
  2146. goto err_irqconflict;
  2147. }
  2148. if (!irq) {
  2149. printk(KERN_ERR "mxser: interrupt number unset\n");
  2150. return -EIO;
  2151. }
  2152. brd->irq = ((int)(irq & 0xF000) >> 12);
  2153. for (i = 0; i < 8; i++)
  2154. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2155. if ((regs[12] & 0x80) == 0) {
  2156. printk(KERN_ERR "mxser: invalid interrupt vector\n");
  2157. return -EIO;
  2158. }
  2159. brd->vector = (int)regs[11]; /* interrupt vector */
  2160. if (id == 1)
  2161. brd->vector_mask = 0x00FF;
  2162. else
  2163. brd->vector_mask = 0x000F;
  2164. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2165. if (regs[12] & bits) {
  2166. brd->ports[i].baud_base = 921600;
  2167. brd->ports[i].max_baud = 921600;
  2168. } else {
  2169. brd->ports[i].baud_base = 115200;
  2170. brd->ports[i].max_baud = 115200;
  2171. }
  2172. }
  2173. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2174. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2175. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2176. outb(scratch2, cap + UART_LCR);
  2177. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2178. scratch = inb(cap + UART_IIR);
  2179. if (scratch & 0xC0)
  2180. brd->uart_type = PORT_16550A;
  2181. else
  2182. brd->uart_type = PORT_16450;
  2183. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2184. "mxser(IO)")) {
  2185. printk(KERN_ERR "mxser: can't request ports I/O region: "
  2186. "0x%.8lx-0x%.8lx\n",
  2187. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2188. 8 * brd->info->nports - 1);
  2189. return -EIO;
  2190. }
  2191. ret = mxser_request_vector(brd);
  2192. if (ret) {
  2193. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2194. printk(KERN_ERR "mxser: can't request interrupt vector region: "
  2195. "0x%.8lx-0x%.8lx\n",
  2196. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2197. 8 * brd->info->nports - 1);
  2198. return ret;
  2199. }
  2200. return brd->info->nports;
  2201. err_irqconflict:
  2202. printk(KERN_ERR "mxser: invalid interrupt number\n");
  2203. return -EIO;
  2204. }
  2205. static int mxser_probe(struct pci_dev *pdev,
  2206. const struct pci_device_id *ent)
  2207. {
  2208. #ifdef CONFIG_PCI
  2209. struct mxser_board *brd;
  2210. unsigned int i, j;
  2211. unsigned long ioaddress;
  2212. struct device *tty_dev;
  2213. int retval = -EINVAL;
  2214. for (i = 0; i < MXSER_BOARDS; i++)
  2215. if (mxser_boards[i].info == NULL)
  2216. break;
  2217. if (i >= MXSER_BOARDS) {
  2218. dev_err(&pdev->dev, "too many boards found (maximum %d), board "
  2219. "not configured\n", MXSER_BOARDS);
  2220. goto err;
  2221. }
  2222. brd = &mxser_boards[i];
  2223. brd->idx = i * MXSER_PORTS_PER_BOARD;
  2224. dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
  2225. mxser_cards[ent->driver_data].name,
  2226. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2227. retval = pci_enable_device(pdev);
  2228. if (retval) {
  2229. dev_err(&pdev->dev, "PCI enable failed\n");
  2230. goto err;
  2231. }
  2232. /* io address */
  2233. ioaddress = pci_resource_start(pdev, 2);
  2234. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2235. if (retval)
  2236. goto err_dis;
  2237. brd->info = &mxser_cards[ent->driver_data];
  2238. for (i = 0; i < brd->info->nports; i++)
  2239. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2240. /* vector */
  2241. ioaddress = pci_resource_start(pdev, 3);
  2242. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2243. if (retval)
  2244. goto err_zero;
  2245. brd->vector = ioaddress;
  2246. /* irq */
  2247. brd->irq = pdev->irq;
  2248. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2249. brd->uart_type = PORT_16550A;
  2250. brd->vector_mask = 0;
  2251. for (i = 0; i < brd->info->nports; i++) {
  2252. for (j = 0; j < UART_INFO_NUM; j++) {
  2253. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2254. brd->ports[i].max_baud =
  2255. Gpci_uart_info[j].max_baud;
  2256. /* exception....CP-102 */
  2257. if (brd->info->flags & MXSER_HIGHBAUD)
  2258. brd->ports[i].max_baud = 921600;
  2259. break;
  2260. }
  2261. }
  2262. }
  2263. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2264. for (i = 0; i < brd->info->nports; i++) {
  2265. if (i < 4)
  2266. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2267. else
  2268. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2269. }
  2270. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2271. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2272. }
  2273. for (i = 0; i < brd->info->nports; i++) {
  2274. brd->vector_mask |= (1 << i);
  2275. brd->ports[i].baud_base = 921600;
  2276. }
  2277. /* mxser_initbrd will hook ISR. */
  2278. retval = mxser_initbrd(brd);
  2279. if (retval)
  2280. goto err_rel3;
  2281. for (i = 0; i < brd->info->nports; i++) {
  2282. tty_dev = tty_port_register_device(&brd->ports[i].port,
  2283. mxvar_sdriver, brd->idx + i, &pdev->dev);
  2284. if (IS_ERR(tty_dev)) {
  2285. retval = PTR_ERR(tty_dev);
  2286. for (; i > 0; i--)
  2287. tty_unregister_device(mxvar_sdriver,
  2288. brd->idx + i - 1);
  2289. goto err_relbrd;
  2290. }
  2291. }
  2292. pci_set_drvdata(pdev, brd);
  2293. return 0;
  2294. err_relbrd:
  2295. for (i = 0; i < brd->info->nports; i++)
  2296. tty_port_destroy(&brd->ports[i].port);
  2297. free_irq(brd->irq, brd);
  2298. err_rel3:
  2299. pci_release_region(pdev, 3);
  2300. err_zero:
  2301. brd->info = NULL;
  2302. pci_release_region(pdev, 2);
  2303. err_dis:
  2304. pci_disable_device(pdev);
  2305. err:
  2306. return retval;
  2307. #else
  2308. return -ENODEV;
  2309. #endif
  2310. }
  2311. static void mxser_remove(struct pci_dev *pdev)
  2312. {
  2313. #ifdef CONFIG_PCI
  2314. struct mxser_board *brd = pci_get_drvdata(pdev);
  2315. mxser_board_remove(brd);
  2316. pci_release_region(pdev, 2);
  2317. pci_release_region(pdev, 3);
  2318. pci_disable_device(pdev);
  2319. brd->info = NULL;
  2320. #endif
  2321. }
  2322. static struct pci_driver mxser_driver = {
  2323. .name = "mxser",
  2324. .id_table = mxser_pcibrds,
  2325. .probe = mxser_probe,
  2326. .remove = mxser_remove
  2327. };
  2328. static int __init mxser_module_init(void)
  2329. {
  2330. struct mxser_board *brd;
  2331. struct device *tty_dev;
  2332. unsigned int b, i, m;
  2333. int retval;
  2334. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2335. if (!mxvar_sdriver)
  2336. return -ENOMEM;
  2337. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2338. MXSER_VERSION);
  2339. /* Initialize the tty_driver structure */
  2340. mxvar_sdriver->name = "ttyMI";
  2341. mxvar_sdriver->major = ttymajor;
  2342. mxvar_sdriver->minor_start = 0;
  2343. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2344. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2345. mxvar_sdriver->init_termios = tty_std_termios;
  2346. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2347. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2348. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2349. retval = tty_register_driver(mxvar_sdriver);
  2350. if (retval) {
  2351. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2352. "tty driver !\n");
  2353. goto err_put;
  2354. }
  2355. /* Start finding ISA boards here */
  2356. for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
  2357. if (!ioaddr[b])
  2358. continue;
  2359. brd = &mxser_boards[m];
  2360. retval = mxser_get_ISA_conf(ioaddr[b], brd);
  2361. if (retval <= 0) {
  2362. brd->info = NULL;
  2363. continue;
  2364. }
  2365. printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
  2366. brd->info->name, ioaddr[b]);
  2367. /* mxser_initbrd will hook ISR. */
  2368. if (mxser_initbrd(brd) < 0) {
  2369. mxser_release_ISA_res(brd);
  2370. brd->info = NULL;
  2371. continue;
  2372. }
  2373. brd->idx = m * MXSER_PORTS_PER_BOARD;
  2374. for (i = 0; i < brd->info->nports; i++) {
  2375. tty_dev = tty_port_register_device(&brd->ports[i].port,
  2376. mxvar_sdriver, brd->idx + i, NULL);
  2377. if (IS_ERR(tty_dev)) {
  2378. for (; i > 0; i--)
  2379. tty_unregister_device(mxvar_sdriver,
  2380. brd->idx + i - 1);
  2381. for (i = 0; i < brd->info->nports; i++)
  2382. tty_port_destroy(&brd->ports[i].port);
  2383. free_irq(brd->irq, brd);
  2384. mxser_release_ISA_res(brd);
  2385. brd->info = NULL;
  2386. break;
  2387. }
  2388. }
  2389. if (brd->info == NULL)
  2390. continue;
  2391. m++;
  2392. }
  2393. retval = pci_register_driver(&mxser_driver);
  2394. if (retval) {
  2395. printk(KERN_ERR "mxser: can't register pci driver\n");
  2396. if (!m) {
  2397. retval = -ENODEV;
  2398. goto err_unr;
  2399. } /* else: we have some ISA cards under control */
  2400. }
  2401. return 0;
  2402. err_unr:
  2403. tty_unregister_driver(mxvar_sdriver);
  2404. err_put:
  2405. put_tty_driver(mxvar_sdriver);
  2406. return retval;
  2407. }
  2408. static void __exit mxser_module_exit(void)
  2409. {
  2410. unsigned int i;
  2411. pci_unregister_driver(&mxser_driver);
  2412. for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
  2413. if (mxser_boards[i].info != NULL)
  2414. mxser_board_remove(&mxser_boards[i]);
  2415. tty_unregister_driver(mxvar_sdriver);
  2416. put_tty_driver(mxvar_sdriver);
  2417. for (i = 0; i < MXSER_BOARDS; i++)
  2418. if (mxser_boards[i].info != NULL)
  2419. mxser_release_ISA_res(&mxser_boards[i]);
  2420. }
  2421. module_init(mxser_module_init);
  2422. module_exit(mxser_module_exit);