eeprom.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Thunderbolt driver - eeprom access
  4. *
  5. * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
  6. * Copyright (C) 2018, Intel Corporation
  7. */
  8. #include <linux/crc32.h>
  9. #include <linux/delay.h>
  10. #include <linux/property.h>
  11. #include <linux/slab.h>
  12. #include "tb.h"
  13. /**
  14. * tb_eeprom_ctl_write() - write control word
  15. */
  16. static int tb_eeprom_ctl_write(struct tb_switch *sw, struct tb_eeprom_ctl *ctl)
  17. {
  18. return tb_sw_write(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + 4, 1);
  19. }
  20. /**
  21. * tb_eeprom_ctl_write() - read control word
  22. */
  23. static int tb_eeprom_ctl_read(struct tb_switch *sw, struct tb_eeprom_ctl *ctl)
  24. {
  25. return tb_sw_read(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + 4, 1);
  26. }
  27. enum tb_eeprom_transfer {
  28. TB_EEPROM_IN,
  29. TB_EEPROM_OUT,
  30. };
  31. /**
  32. * tb_eeprom_active - enable rom access
  33. *
  34. * WARNING: Always disable access after usage. Otherwise the controller will
  35. * fail to reprobe.
  36. */
  37. static int tb_eeprom_active(struct tb_switch *sw, bool enable)
  38. {
  39. struct tb_eeprom_ctl ctl;
  40. int res = tb_eeprom_ctl_read(sw, &ctl);
  41. if (res)
  42. return res;
  43. if (enable) {
  44. ctl.access_high = 1;
  45. res = tb_eeprom_ctl_write(sw, &ctl);
  46. if (res)
  47. return res;
  48. ctl.access_low = 0;
  49. return tb_eeprom_ctl_write(sw, &ctl);
  50. } else {
  51. ctl.access_low = 1;
  52. res = tb_eeprom_ctl_write(sw, &ctl);
  53. if (res)
  54. return res;
  55. ctl.access_high = 0;
  56. return tb_eeprom_ctl_write(sw, &ctl);
  57. }
  58. }
  59. /**
  60. * tb_eeprom_transfer - transfer one bit
  61. *
  62. * If TB_EEPROM_IN is passed, then the bit can be retrieved from ctl->data_in.
  63. * If TB_EEPROM_OUT is passed, then ctl->data_out will be written.
  64. */
  65. static int tb_eeprom_transfer(struct tb_switch *sw, struct tb_eeprom_ctl *ctl,
  66. enum tb_eeprom_transfer direction)
  67. {
  68. int res;
  69. if (direction == TB_EEPROM_OUT) {
  70. res = tb_eeprom_ctl_write(sw, ctl);
  71. if (res)
  72. return res;
  73. }
  74. ctl->clock = 1;
  75. res = tb_eeprom_ctl_write(sw, ctl);
  76. if (res)
  77. return res;
  78. if (direction == TB_EEPROM_IN) {
  79. res = tb_eeprom_ctl_read(sw, ctl);
  80. if (res)
  81. return res;
  82. }
  83. ctl->clock = 0;
  84. return tb_eeprom_ctl_write(sw, ctl);
  85. }
  86. /**
  87. * tb_eeprom_out - write one byte to the bus
  88. */
  89. static int tb_eeprom_out(struct tb_switch *sw, u8 val)
  90. {
  91. struct tb_eeprom_ctl ctl;
  92. int i;
  93. int res = tb_eeprom_ctl_read(sw, &ctl);
  94. if (res)
  95. return res;
  96. for (i = 0; i < 8; i++) {
  97. ctl.data_out = val & 0x80;
  98. res = tb_eeprom_transfer(sw, &ctl, TB_EEPROM_OUT);
  99. if (res)
  100. return res;
  101. val <<= 1;
  102. }
  103. return 0;
  104. }
  105. /**
  106. * tb_eeprom_in - read one byte from the bus
  107. */
  108. static int tb_eeprom_in(struct tb_switch *sw, u8 *val)
  109. {
  110. struct tb_eeprom_ctl ctl;
  111. int i;
  112. int res = tb_eeprom_ctl_read(sw, &ctl);
  113. if (res)
  114. return res;
  115. *val = 0;
  116. for (i = 0; i < 8; i++) {
  117. *val <<= 1;
  118. res = tb_eeprom_transfer(sw, &ctl, TB_EEPROM_IN);
  119. if (res)
  120. return res;
  121. *val |= ctl.data_in;
  122. }
  123. return 0;
  124. }
  125. /**
  126. * tb_eeprom_get_drom_offset - get drom offset within eeprom
  127. */
  128. static int tb_eeprom_get_drom_offset(struct tb_switch *sw, u16 *offset)
  129. {
  130. struct tb_cap_plug_events cap;
  131. int res;
  132. if (!sw->cap_plug_events) {
  133. tb_sw_warn(sw, "no TB_CAP_PLUG_EVENTS, cannot read eeprom\n");
  134. return -ENODEV;
  135. }
  136. res = tb_sw_read(sw, &cap, TB_CFG_SWITCH, sw->cap_plug_events,
  137. sizeof(cap) / 4);
  138. if (res)
  139. return res;
  140. if (!cap.eeprom_ctl.present || cap.eeprom_ctl.not_present) {
  141. tb_sw_warn(sw, "no NVM\n");
  142. return -ENODEV;
  143. }
  144. if (cap.drom_offset > 0xffff) {
  145. tb_sw_warn(sw, "drom offset is larger than 0xffff: %#x\n",
  146. cap.drom_offset);
  147. return -ENXIO;
  148. }
  149. *offset = cap.drom_offset;
  150. return 0;
  151. }
  152. /**
  153. * tb_eeprom_read_n - read count bytes from offset into val
  154. */
  155. static int tb_eeprom_read_n(struct tb_switch *sw, u16 offset, u8 *val,
  156. size_t count)
  157. {
  158. u16 drom_offset;
  159. int i, res;
  160. res = tb_eeprom_get_drom_offset(sw, &drom_offset);
  161. if (res)
  162. return res;
  163. offset += drom_offset;
  164. res = tb_eeprom_active(sw, true);
  165. if (res)
  166. return res;
  167. res = tb_eeprom_out(sw, 3);
  168. if (res)
  169. return res;
  170. res = tb_eeprom_out(sw, offset >> 8);
  171. if (res)
  172. return res;
  173. res = tb_eeprom_out(sw, offset);
  174. if (res)
  175. return res;
  176. for (i = 0; i < count; i++) {
  177. res = tb_eeprom_in(sw, val + i);
  178. if (res)
  179. return res;
  180. }
  181. return tb_eeprom_active(sw, false);
  182. }
  183. static u8 tb_crc8(u8 *data, int len)
  184. {
  185. int i, j;
  186. u8 val = 0xff;
  187. for (i = 0; i < len; i++) {
  188. val ^= data[i];
  189. for (j = 0; j < 8; j++)
  190. val = (val << 1) ^ ((val & 0x80) ? 7 : 0);
  191. }
  192. return val;
  193. }
  194. static u32 tb_crc32(void *data, size_t len)
  195. {
  196. return ~__crc32c_le(~0, data, len);
  197. }
  198. #define TB_DROM_DATA_START 13
  199. struct tb_drom_header {
  200. /* BYTE 0 */
  201. u8 uid_crc8; /* checksum for uid */
  202. /* BYTES 1-8 */
  203. u64 uid;
  204. /* BYTES 9-12 */
  205. u32 data_crc32; /* checksum for data_len bytes starting at byte 13 */
  206. /* BYTE 13 */
  207. u8 device_rom_revision; /* should be <= 1 */
  208. u16 data_len:10;
  209. u8 __unknown1:6;
  210. /* BYTES 16-21 */
  211. u16 vendor_id;
  212. u16 model_id;
  213. u8 model_rev;
  214. u8 eeprom_rev;
  215. } __packed;
  216. enum tb_drom_entry_type {
  217. /* force unsigned to prevent "one-bit signed bitfield" warning */
  218. TB_DROM_ENTRY_GENERIC = 0U,
  219. TB_DROM_ENTRY_PORT,
  220. };
  221. struct tb_drom_entry_header {
  222. u8 len;
  223. u8 index:6;
  224. bool port_disabled:1; /* only valid if type is TB_DROM_ENTRY_PORT */
  225. enum tb_drom_entry_type type:1;
  226. } __packed;
  227. struct tb_drom_entry_generic {
  228. struct tb_drom_entry_header header;
  229. u8 data[];
  230. } __packed;
  231. struct tb_drom_entry_port {
  232. /* BYTES 0-1 */
  233. struct tb_drom_entry_header header;
  234. /* BYTE 2 */
  235. u8 dual_link_port_rid:4;
  236. u8 link_nr:1;
  237. u8 unknown1:2;
  238. bool has_dual_link_port:1;
  239. /* BYTE 3 */
  240. u8 dual_link_port_nr:6;
  241. u8 unknown2:2;
  242. /* BYTES 4 - 5 TODO decode */
  243. u8 micro2:4;
  244. u8 micro1:4;
  245. u8 micro3;
  246. /* BYTES 6-7, TODO: verify (find hardware that has these set) */
  247. u8 peer_port_rid:4;
  248. u8 unknown3:3;
  249. bool has_peer_port:1;
  250. u8 peer_port_nr:6;
  251. u8 unknown4:2;
  252. } __packed;
  253. /**
  254. * tb_drom_read_uid_only - read uid directly from drom
  255. *
  256. * Does not use the cached copy in sw->drom. Used during resume to check switch
  257. * identity.
  258. */
  259. int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid)
  260. {
  261. u8 data[9];
  262. u8 crc;
  263. int res;
  264. /* read uid */
  265. res = tb_eeprom_read_n(sw, 0, data, 9);
  266. if (res)
  267. return res;
  268. crc = tb_crc8(data + 1, 8);
  269. if (crc != data[0]) {
  270. tb_sw_warn(sw, "uid crc8 mismatch (expected: %#x, got: %#x)\n",
  271. data[0], crc);
  272. return -EIO;
  273. }
  274. *uid = *(u64 *)(data+1);
  275. return 0;
  276. }
  277. static int tb_drom_parse_entry_generic(struct tb_switch *sw,
  278. struct tb_drom_entry_header *header)
  279. {
  280. const struct tb_drom_entry_generic *entry =
  281. (const struct tb_drom_entry_generic *)header;
  282. switch (header->index) {
  283. case 1:
  284. /* Length includes 2 bytes header so remove it before copy */
  285. sw->vendor_name = kstrndup(entry->data,
  286. header->len - sizeof(*header), GFP_KERNEL);
  287. if (!sw->vendor_name)
  288. return -ENOMEM;
  289. break;
  290. case 2:
  291. sw->device_name = kstrndup(entry->data,
  292. header->len - sizeof(*header), GFP_KERNEL);
  293. if (!sw->device_name)
  294. return -ENOMEM;
  295. break;
  296. }
  297. return 0;
  298. }
  299. static int tb_drom_parse_entry_port(struct tb_switch *sw,
  300. struct tb_drom_entry_header *header)
  301. {
  302. struct tb_port *port;
  303. int res;
  304. enum tb_port_type type;
  305. /*
  306. * Some DROMs list more ports than the controller actually has
  307. * so we skip those but allow the parser to continue.
  308. */
  309. if (header->index > sw->config.max_port_number) {
  310. dev_info_once(&sw->dev, "ignoring unnecessary extra entries in DROM\n");
  311. return 0;
  312. }
  313. port = &sw->ports[header->index];
  314. port->disabled = header->port_disabled;
  315. if (port->disabled)
  316. return 0;
  317. res = tb_port_read(port, &type, TB_CFG_PORT, 2, 1);
  318. if (res)
  319. return res;
  320. type &= 0xffffff;
  321. if (type == TB_TYPE_PORT) {
  322. struct tb_drom_entry_port *entry = (void *) header;
  323. if (header->len != sizeof(*entry)) {
  324. tb_sw_warn(sw,
  325. "port entry has size %#x (expected %#zx)\n",
  326. header->len, sizeof(struct tb_drom_entry_port));
  327. return -EIO;
  328. }
  329. port->link_nr = entry->link_nr;
  330. if (entry->has_dual_link_port)
  331. port->dual_link_port =
  332. &port->sw->ports[entry->dual_link_port_nr];
  333. }
  334. return 0;
  335. }
  336. /**
  337. * tb_drom_parse_entries - parse the linked list of drom entries
  338. *
  339. * Drom must have been copied to sw->drom.
  340. */
  341. static int tb_drom_parse_entries(struct tb_switch *sw)
  342. {
  343. struct tb_drom_header *header = (void *) sw->drom;
  344. u16 pos = sizeof(*header);
  345. u16 drom_size = header->data_len + TB_DROM_DATA_START;
  346. int res;
  347. while (pos < drom_size) {
  348. struct tb_drom_entry_header *entry = (void *) (sw->drom + pos);
  349. if (pos + 1 == drom_size || pos + entry->len > drom_size
  350. || !entry->len) {
  351. tb_sw_warn(sw, "DROM buffer overrun\n");
  352. return -EILSEQ;
  353. }
  354. switch (entry->type) {
  355. case TB_DROM_ENTRY_GENERIC:
  356. res = tb_drom_parse_entry_generic(sw, entry);
  357. break;
  358. case TB_DROM_ENTRY_PORT:
  359. res = tb_drom_parse_entry_port(sw, entry);
  360. break;
  361. }
  362. if (res)
  363. return res;
  364. pos += entry->len;
  365. }
  366. return 0;
  367. }
  368. /**
  369. * tb_drom_copy_efi - copy drom supplied by EFI to sw->drom if present
  370. */
  371. static int tb_drom_copy_efi(struct tb_switch *sw, u16 *size)
  372. {
  373. struct device *dev = &sw->tb->nhi->pdev->dev;
  374. int len, res;
  375. len = device_property_count_u8(dev, "ThunderboltDROM");
  376. if (len < 0 || len < sizeof(struct tb_drom_header))
  377. return -EINVAL;
  378. sw->drom = kmalloc(len, GFP_KERNEL);
  379. if (!sw->drom)
  380. return -ENOMEM;
  381. res = device_property_read_u8_array(dev, "ThunderboltDROM", sw->drom,
  382. len);
  383. if (res)
  384. goto err;
  385. *size = ((struct tb_drom_header *)sw->drom)->data_len +
  386. TB_DROM_DATA_START;
  387. if (*size > len)
  388. goto err;
  389. return 0;
  390. err:
  391. kfree(sw->drom);
  392. sw->drom = NULL;
  393. return -EINVAL;
  394. }
  395. static int tb_drom_copy_nvm(struct tb_switch *sw, u16 *size)
  396. {
  397. u32 drom_offset;
  398. int ret;
  399. if (!sw->dma_port)
  400. return -ENODEV;
  401. ret = tb_sw_read(sw, &drom_offset, TB_CFG_SWITCH,
  402. sw->cap_plug_events + 12, 1);
  403. if (ret)
  404. return ret;
  405. if (!drom_offset)
  406. return -ENODEV;
  407. ret = dma_port_flash_read(sw->dma_port, drom_offset + 14, size,
  408. sizeof(*size));
  409. if (ret)
  410. return ret;
  411. /* Size includes CRC8 + UID + CRC32 */
  412. *size += 1 + 8 + 4;
  413. sw->drom = kzalloc(*size, GFP_KERNEL);
  414. if (!sw->drom)
  415. return -ENOMEM;
  416. ret = dma_port_flash_read(sw->dma_port, drom_offset, sw->drom, *size);
  417. if (ret)
  418. goto err_free;
  419. /*
  420. * Read UID from the minimal DROM because the one in NVM is just
  421. * a placeholder.
  422. */
  423. tb_drom_read_uid_only(sw, &sw->uid);
  424. return 0;
  425. err_free:
  426. kfree(sw->drom);
  427. sw->drom = NULL;
  428. return ret;
  429. }
  430. static int usb4_copy_host_drom(struct tb_switch *sw, u16 *size)
  431. {
  432. int ret;
  433. ret = usb4_switch_drom_read(sw, 14, size, sizeof(*size));
  434. if (ret)
  435. return ret;
  436. /* Size includes CRC8 + UID + CRC32 */
  437. *size += 1 + 8 + 4;
  438. sw->drom = kzalloc(*size, GFP_KERNEL);
  439. if (!sw->drom)
  440. return -ENOMEM;
  441. ret = usb4_switch_drom_read(sw, 0, sw->drom, *size);
  442. if (ret) {
  443. kfree(sw->drom);
  444. sw->drom = NULL;
  445. }
  446. return ret;
  447. }
  448. static int tb_drom_read_n(struct tb_switch *sw, u16 offset, u8 *val,
  449. size_t count)
  450. {
  451. if (tb_switch_is_usb4(sw))
  452. return usb4_switch_drom_read(sw, offset, val, count);
  453. return tb_eeprom_read_n(sw, offset, val, count);
  454. }
  455. /**
  456. * tb_drom_read - copy drom to sw->drom and parse it
  457. */
  458. int tb_drom_read(struct tb_switch *sw)
  459. {
  460. u16 size;
  461. u32 crc;
  462. struct tb_drom_header *header;
  463. int res, retries = 1;
  464. if (sw->drom)
  465. return 0;
  466. if (tb_route(sw) == 0) {
  467. /*
  468. * Apple's NHI EFI driver supplies a DROM for the root switch
  469. * in a device property. Use it if available.
  470. */
  471. if (tb_drom_copy_efi(sw, &size) == 0)
  472. goto parse;
  473. /* Non-Apple hardware has the DROM as part of NVM */
  474. if (tb_drom_copy_nvm(sw, &size) == 0)
  475. goto parse;
  476. /*
  477. * USB4 hosts may support reading DROM through router
  478. * operations.
  479. */
  480. if (tb_switch_is_usb4(sw)) {
  481. usb4_switch_read_uid(sw, &sw->uid);
  482. if (!usb4_copy_host_drom(sw, &size))
  483. goto parse;
  484. } else {
  485. /*
  486. * The root switch contains only a dummy drom
  487. * (header only, no entries). Hardcode the
  488. * configuration here.
  489. */
  490. tb_drom_read_uid_only(sw, &sw->uid);
  491. }
  492. return 0;
  493. }
  494. res = tb_drom_read_n(sw, 14, (u8 *) &size, 2);
  495. if (res)
  496. return res;
  497. size &= 0x3ff;
  498. size += TB_DROM_DATA_START;
  499. tb_sw_dbg(sw, "reading drom (length: %#x)\n", size);
  500. if (size < sizeof(*header)) {
  501. tb_sw_warn(sw, "drom too small, aborting\n");
  502. return -EIO;
  503. }
  504. sw->drom = kzalloc(size, GFP_KERNEL);
  505. if (!sw->drom)
  506. return -ENOMEM;
  507. res = tb_drom_read_n(sw, 0, sw->drom, size);
  508. if (res)
  509. goto err;
  510. parse:
  511. header = (void *) sw->drom;
  512. if (header->data_len + TB_DROM_DATA_START != size) {
  513. tb_sw_warn(sw, "drom size mismatch, aborting\n");
  514. goto err;
  515. }
  516. crc = tb_crc8((u8 *) &header->uid, 8);
  517. if (crc != header->uid_crc8) {
  518. tb_sw_warn(sw,
  519. "drom uid crc8 mismatch (expected: %#x, got: %#x), aborting\n",
  520. header->uid_crc8, crc);
  521. goto err;
  522. }
  523. if (!sw->uid)
  524. sw->uid = header->uid;
  525. sw->vendor = header->vendor_id;
  526. sw->device = header->model_id;
  527. tb_check_quirks(sw);
  528. crc = tb_crc32(sw->drom + TB_DROM_DATA_START, header->data_len);
  529. if (crc != header->data_crc32) {
  530. tb_sw_warn(sw,
  531. "drom data crc32 mismatch (expected: %#x, got: %#x), continuing\n",
  532. header->data_crc32, crc);
  533. }
  534. if (header->device_rom_revision > 2)
  535. tb_sw_warn(sw, "drom device_rom_revision %#x unknown\n",
  536. header->device_rom_revision);
  537. res = tb_drom_parse_entries(sw);
  538. /* If the DROM parsing fails, wait a moment and retry once */
  539. if (res == -EILSEQ && retries--) {
  540. tb_sw_warn(sw, "parsing DROM failed, retrying\n");
  541. msleep(100);
  542. res = tb_drom_read_n(sw, 0, sw->drom, size);
  543. if (!res)
  544. goto parse;
  545. }
  546. return res;
  547. err:
  548. kfree(sw->drom);
  549. sw->drom = NULL;
  550. return -EIO;
  551. }