tsens-v1.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2019, Linaro Limited
  4. */
  5. #include <linux/bitops.h>
  6. #include <linux/regmap.h>
  7. #include <linux/delay.h>
  8. #include <linux/slab.h>
  9. #include "tsens.h"
  10. /* ----- SROT ------ */
  11. #define SROT_HW_VER_OFF 0x0000
  12. #define SROT_CTRL_OFF 0x0004
  13. /* ----- TM ------ */
  14. #define TM_INT_EN_OFF 0x0000
  15. #define TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF 0x0004
  16. #define TM_Sn_STATUS_OFF 0x0044
  17. #define TM_TRDY_OFF 0x0084
  18. #define TM_HIGH_LOW_INT_STATUS_OFF 0x0088
  19. #define TM_HIGH_LOW_Sn_INT_THRESHOLD_OFF 0x0090
  20. /* eeprom layout data for msm8956/76 (v1) */
  21. #define MSM8976_BASE0_MASK 0xff
  22. #define MSM8976_BASE1_MASK 0xff
  23. #define MSM8976_BASE1_SHIFT 8
  24. #define MSM8976_S0_P1_MASK 0x3f00
  25. #define MSM8976_S1_P1_MASK 0x3f00000
  26. #define MSM8976_S2_P1_MASK 0x3f
  27. #define MSM8976_S3_P1_MASK 0x3f000
  28. #define MSM8976_S4_P1_MASK 0x3f00
  29. #define MSM8976_S5_P1_MASK 0x3f00000
  30. #define MSM8976_S6_P1_MASK 0x3f
  31. #define MSM8976_S7_P1_MASK 0x3f000
  32. #define MSM8976_S8_P1_MASK 0x1f8
  33. #define MSM8976_S9_P1_MASK 0x1f8000
  34. #define MSM8976_S10_P1_MASK 0xf8000000
  35. #define MSM8976_S10_P1_MASK_1 0x1
  36. #define MSM8976_S0_P2_MASK 0xfc000
  37. #define MSM8976_S1_P2_MASK 0xfc000000
  38. #define MSM8976_S2_P2_MASK 0xfc0
  39. #define MSM8976_S3_P2_MASK 0xfc0000
  40. #define MSM8976_S4_P2_MASK 0xfc000
  41. #define MSM8976_S5_P2_MASK 0xfc000000
  42. #define MSM8976_S6_P2_MASK 0xfc0
  43. #define MSM8976_S7_P2_MASK 0xfc0000
  44. #define MSM8976_S8_P2_MASK 0x7e00
  45. #define MSM8976_S9_P2_MASK 0x7e00000
  46. #define MSM8976_S10_P2_MASK 0x7e
  47. #define MSM8976_S0_P1_SHIFT 8
  48. #define MSM8976_S1_P1_SHIFT 20
  49. #define MSM8976_S2_P1_SHIFT 0
  50. #define MSM8976_S3_P1_SHIFT 12
  51. #define MSM8976_S4_P1_SHIFT 8
  52. #define MSM8976_S5_P1_SHIFT 20
  53. #define MSM8976_S6_P1_SHIFT 0
  54. #define MSM8976_S7_P1_SHIFT 12
  55. #define MSM8976_S8_P1_SHIFT 3
  56. #define MSM8976_S9_P1_SHIFT 15
  57. #define MSM8976_S10_P1_SHIFT 27
  58. #define MSM8976_S10_P1_SHIFT_1 0
  59. #define MSM8976_S0_P2_SHIFT 14
  60. #define MSM8976_S1_P2_SHIFT 26
  61. #define MSM8976_S2_P2_SHIFT 6
  62. #define MSM8976_S3_P2_SHIFT 18
  63. #define MSM8976_S4_P2_SHIFT 14
  64. #define MSM8976_S5_P2_SHIFT 26
  65. #define MSM8976_S6_P2_SHIFT 6
  66. #define MSM8976_S7_P2_SHIFT 18
  67. #define MSM8976_S8_P2_SHIFT 9
  68. #define MSM8976_S9_P2_SHIFT 21
  69. #define MSM8976_S10_P2_SHIFT 1
  70. #define MSM8976_CAL_SEL_MASK 0x3
  71. #define MSM8976_CAL_DEGC_PT1 30
  72. #define MSM8976_CAL_DEGC_PT2 120
  73. #define MSM8976_SLOPE_FACTOR 1000
  74. #define MSM8976_SLOPE_DEFAULT 3200
  75. /* eeprom layout data for qcs404/405 (v1) */
  76. #define BASE0_MASK 0x000007f8
  77. #define BASE1_MASK 0x0007f800
  78. #define BASE0_SHIFT 3
  79. #define BASE1_SHIFT 11
  80. #define S0_P1_MASK 0x0000003f
  81. #define S1_P1_MASK 0x0003f000
  82. #define S2_P1_MASK 0x3f000000
  83. #define S3_P1_MASK 0x000003f0
  84. #define S4_P1_MASK 0x003f0000
  85. #define S5_P1_MASK 0x0000003f
  86. #define S6_P1_MASK 0x0003f000
  87. #define S7_P1_MASK 0x3f000000
  88. #define S8_P1_MASK 0x000003f0
  89. #define S9_P1_MASK 0x003f0000
  90. #define S0_P2_MASK 0x00000fc0
  91. #define S1_P2_MASK 0x00fc0000
  92. #define S2_P2_MASK_1_0 0xc0000000
  93. #define S2_P2_MASK_5_2 0x0000000f
  94. #define S3_P2_MASK 0x0000fc00
  95. #define S4_P2_MASK 0x0fc00000
  96. #define S5_P2_MASK 0x00000fc0
  97. #define S6_P2_MASK 0x00fc0000
  98. #define S7_P2_MASK_1_0 0xc0000000
  99. #define S7_P2_MASK_5_2 0x0000000f
  100. #define S8_P2_MASK 0x0000fc00
  101. #define S9_P2_MASK 0x0fc00000
  102. #define S0_P1_SHIFT 0
  103. #define S0_P2_SHIFT 6
  104. #define S1_P1_SHIFT 12
  105. #define S1_P2_SHIFT 18
  106. #define S2_P1_SHIFT 24
  107. #define S2_P2_SHIFT_1_0 30
  108. #define S2_P2_SHIFT_5_2 0
  109. #define S3_P1_SHIFT 4
  110. #define S3_P2_SHIFT 10
  111. #define S4_P1_SHIFT 16
  112. #define S4_P2_SHIFT 22
  113. #define S5_P1_SHIFT 0
  114. #define S5_P2_SHIFT 6
  115. #define S6_P1_SHIFT 12
  116. #define S6_P2_SHIFT 18
  117. #define S7_P1_SHIFT 24
  118. #define S7_P2_SHIFT_1_0 30
  119. #define S7_P2_SHIFT_5_2 0
  120. #define S8_P1_SHIFT 4
  121. #define S8_P2_SHIFT 10
  122. #define S9_P1_SHIFT 16
  123. #define S9_P2_SHIFT 22
  124. #define CAL_SEL_MASK 7
  125. #define CAL_SEL_SHIFT 0
  126. static void compute_intercept_slope_8976(struct tsens_priv *priv,
  127. u32 *p1, u32 *p2, u32 mode)
  128. {
  129. int i;
  130. priv->sensor[0].slope = 3313;
  131. priv->sensor[1].slope = 3275;
  132. priv->sensor[2].slope = 3320;
  133. priv->sensor[3].slope = 3246;
  134. priv->sensor[4].slope = 3279;
  135. priv->sensor[5].slope = 3257;
  136. priv->sensor[6].slope = 3234;
  137. priv->sensor[7].slope = 3269;
  138. priv->sensor[8].slope = 3255;
  139. priv->sensor[9].slope = 3239;
  140. priv->sensor[10].slope = 3286;
  141. for (i = 0; i < priv->num_sensors; i++) {
  142. priv->sensor[i].offset = (p1[i] * MSM8976_SLOPE_FACTOR) -
  143. (MSM8976_CAL_DEGC_PT1 *
  144. priv->sensor[i].slope);
  145. }
  146. }
  147. static int calibrate_v1(struct tsens_priv *priv)
  148. {
  149. u32 base0 = 0, base1 = 0;
  150. u32 p1[10], p2[10];
  151. u32 mode = 0, lsb = 0, msb = 0;
  152. u32 *qfprom_cdata;
  153. int i;
  154. qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib");
  155. if (IS_ERR(qfprom_cdata))
  156. return PTR_ERR(qfprom_cdata);
  157. mode = (qfprom_cdata[4] & CAL_SEL_MASK) >> CAL_SEL_SHIFT;
  158. dev_dbg(priv->dev, "calibration mode is %d\n", mode);
  159. switch (mode) {
  160. case TWO_PT_CALIB:
  161. base1 = (qfprom_cdata[4] & BASE1_MASK) >> BASE1_SHIFT;
  162. p2[0] = (qfprom_cdata[0] & S0_P2_MASK) >> S0_P2_SHIFT;
  163. p2[1] = (qfprom_cdata[0] & S1_P2_MASK) >> S1_P2_SHIFT;
  164. /* This value is split over two registers, 2 bits and 4 bits */
  165. lsb = (qfprom_cdata[0] & S2_P2_MASK_1_0) >> S2_P2_SHIFT_1_0;
  166. msb = (qfprom_cdata[1] & S2_P2_MASK_5_2) >> S2_P2_SHIFT_5_2;
  167. p2[2] = msb << 2 | lsb;
  168. p2[3] = (qfprom_cdata[1] & S3_P2_MASK) >> S3_P2_SHIFT;
  169. p2[4] = (qfprom_cdata[1] & S4_P2_MASK) >> S4_P2_SHIFT;
  170. p2[5] = (qfprom_cdata[2] & S5_P2_MASK) >> S5_P2_SHIFT;
  171. p2[6] = (qfprom_cdata[2] & S6_P2_MASK) >> S6_P2_SHIFT;
  172. /* This value is split over two registers, 2 bits and 4 bits */
  173. lsb = (qfprom_cdata[2] & S7_P2_MASK_1_0) >> S7_P2_SHIFT_1_0;
  174. msb = (qfprom_cdata[3] & S7_P2_MASK_5_2) >> S7_P2_SHIFT_5_2;
  175. p2[7] = msb << 2 | lsb;
  176. p2[8] = (qfprom_cdata[3] & S8_P2_MASK) >> S8_P2_SHIFT;
  177. p2[9] = (qfprom_cdata[3] & S9_P2_MASK) >> S9_P2_SHIFT;
  178. for (i = 0; i < priv->num_sensors; i++)
  179. p2[i] = ((base1 + p2[i]) << 2);
  180. fallthrough;
  181. case ONE_PT_CALIB2:
  182. base0 = (qfprom_cdata[4] & BASE0_MASK) >> BASE0_SHIFT;
  183. p1[0] = (qfprom_cdata[0] & S0_P1_MASK) >> S0_P1_SHIFT;
  184. p1[1] = (qfprom_cdata[0] & S1_P1_MASK) >> S1_P1_SHIFT;
  185. p1[2] = (qfprom_cdata[0] & S2_P1_MASK) >> S2_P1_SHIFT;
  186. p1[3] = (qfprom_cdata[1] & S3_P1_MASK) >> S3_P1_SHIFT;
  187. p1[4] = (qfprom_cdata[1] & S4_P1_MASK) >> S4_P1_SHIFT;
  188. p1[5] = (qfprom_cdata[2] & S5_P1_MASK) >> S5_P1_SHIFT;
  189. p1[6] = (qfprom_cdata[2] & S6_P1_MASK) >> S6_P1_SHIFT;
  190. p1[7] = (qfprom_cdata[2] & S7_P1_MASK) >> S7_P1_SHIFT;
  191. p1[8] = (qfprom_cdata[3] & S8_P1_MASK) >> S8_P1_SHIFT;
  192. p1[9] = (qfprom_cdata[3] & S9_P1_MASK) >> S9_P1_SHIFT;
  193. for (i = 0; i < priv->num_sensors; i++)
  194. p1[i] = (((base0) + p1[i]) << 2);
  195. break;
  196. default:
  197. for (i = 0; i < priv->num_sensors; i++) {
  198. p1[i] = 500;
  199. p2[i] = 780;
  200. }
  201. break;
  202. }
  203. compute_intercept_slope(priv, p1, p2, mode);
  204. kfree(qfprom_cdata);
  205. return 0;
  206. }
  207. static int calibrate_8976(struct tsens_priv *priv)
  208. {
  209. int base0 = 0, base1 = 0, i;
  210. u32 p1[11], p2[11];
  211. int mode = 0, tmp = 0;
  212. u32 *qfprom_cdata;
  213. qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib");
  214. if (IS_ERR(qfprom_cdata))
  215. return PTR_ERR(qfprom_cdata);
  216. mode = (qfprom_cdata[4] & MSM8976_CAL_SEL_MASK);
  217. dev_dbg(priv->dev, "calibration mode is %d\n", mode);
  218. switch (mode) {
  219. case TWO_PT_CALIB:
  220. base1 = (qfprom_cdata[2] & MSM8976_BASE1_MASK) >> MSM8976_BASE1_SHIFT;
  221. p2[0] = (qfprom_cdata[0] & MSM8976_S0_P2_MASK) >> MSM8976_S0_P2_SHIFT;
  222. p2[1] = (qfprom_cdata[0] & MSM8976_S1_P2_MASK) >> MSM8976_S1_P2_SHIFT;
  223. p2[2] = (qfprom_cdata[1] & MSM8976_S2_P2_MASK) >> MSM8976_S2_P2_SHIFT;
  224. p2[3] = (qfprom_cdata[1] & MSM8976_S3_P2_MASK) >> MSM8976_S3_P2_SHIFT;
  225. p2[4] = (qfprom_cdata[2] & MSM8976_S4_P2_MASK) >> MSM8976_S4_P2_SHIFT;
  226. p2[5] = (qfprom_cdata[2] & MSM8976_S5_P2_MASK) >> MSM8976_S5_P2_SHIFT;
  227. p2[6] = (qfprom_cdata[3] & MSM8976_S6_P2_MASK) >> MSM8976_S6_P2_SHIFT;
  228. p2[7] = (qfprom_cdata[3] & MSM8976_S7_P2_MASK) >> MSM8976_S7_P2_SHIFT;
  229. p2[8] = (qfprom_cdata[4] & MSM8976_S8_P2_MASK) >> MSM8976_S8_P2_SHIFT;
  230. p2[9] = (qfprom_cdata[4] & MSM8976_S9_P2_MASK) >> MSM8976_S9_P2_SHIFT;
  231. p2[10] = (qfprom_cdata[5] & MSM8976_S10_P2_MASK) >> MSM8976_S10_P2_SHIFT;
  232. for (i = 0; i < priv->num_sensors; i++)
  233. p2[i] = ((base1 + p2[i]) << 2);
  234. fallthrough;
  235. case ONE_PT_CALIB2:
  236. base0 = qfprom_cdata[0] & MSM8976_BASE0_MASK;
  237. p1[0] = (qfprom_cdata[0] & MSM8976_S0_P1_MASK) >> MSM8976_S0_P1_SHIFT;
  238. p1[1] = (qfprom_cdata[0] & MSM8976_S1_P1_MASK) >> MSM8976_S1_P1_SHIFT;
  239. p1[2] = (qfprom_cdata[1] & MSM8976_S2_P1_MASK) >> MSM8976_S2_P1_SHIFT;
  240. p1[3] = (qfprom_cdata[1] & MSM8976_S3_P1_MASK) >> MSM8976_S3_P1_SHIFT;
  241. p1[4] = (qfprom_cdata[2] & MSM8976_S4_P1_MASK) >> MSM8976_S4_P1_SHIFT;
  242. p1[5] = (qfprom_cdata[2] & MSM8976_S5_P1_MASK) >> MSM8976_S5_P1_SHIFT;
  243. p1[6] = (qfprom_cdata[3] & MSM8976_S6_P1_MASK) >> MSM8976_S6_P1_SHIFT;
  244. p1[7] = (qfprom_cdata[3] & MSM8976_S7_P1_MASK) >> MSM8976_S7_P1_SHIFT;
  245. p1[8] = (qfprom_cdata[4] & MSM8976_S8_P1_MASK) >> MSM8976_S8_P1_SHIFT;
  246. p1[9] = (qfprom_cdata[4] & MSM8976_S9_P1_MASK) >> MSM8976_S9_P1_SHIFT;
  247. p1[10] = (qfprom_cdata[4] & MSM8976_S10_P1_MASK) >> MSM8976_S10_P1_SHIFT;
  248. tmp = (qfprom_cdata[5] & MSM8976_S10_P1_MASK_1) << MSM8976_S10_P1_SHIFT_1;
  249. p1[10] |= tmp;
  250. for (i = 0; i < priv->num_sensors; i++)
  251. p1[i] = (((base0) + p1[i]) << 2);
  252. break;
  253. default:
  254. for (i = 0; i < priv->num_sensors; i++) {
  255. p1[i] = 500;
  256. p2[i] = 780;
  257. }
  258. break;
  259. }
  260. compute_intercept_slope_8976(priv, p1, p2, mode);
  261. kfree(qfprom_cdata);
  262. return 0;
  263. }
  264. /* v1.x: msm8956,8976,qcs404,405 */
  265. static struct tsens_features tsens_v1_feat = {
  266. .ver_major = VER_1_X,
  267. .crit_int = 0,
  268. .adc = 1,
  269. .srot_split = 1,
  270. .max_sensors = 11,
  271. };
  272. static const struct reg_field tsens_v1_regfields[MAX_REGFIELDS] = {
  273. /* ----- SROT ------ */
  274. /* VERSION */
  275. [VER_MAJOR] = REG_FIELD(SROT_HW_VER_OFF, 28, 31),
  276. [VER_MINOR] = REG_FIELD(SROT_HW_VER_OFF, 16, 27),
  277. [VER_STEP] = REG_FIELD(SROT_HW_VER_OFF, 0, 15),
  278. /* CTRL_OFFSET */
  279. [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0),
  280. [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1),
  281. [SENSOR_EN] = REG_FIELD(SROT_CTRL_OFF, 3, 13),
  282. /* ----- TM ------ */
  283. /* INTERRUPT ENABLE */
  284. [INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 0),
  285. /* UPPER/LOWER TEMPERATURE THRESHOLDS */
  286. REG_FIELD_FOR_EACH_SENSOR11(LOW_THRESH, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 0, 9),
  287. REG_FIELD_FOR_EACH_SENSOR11(UP_THRESH, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 10, 19),
  288. /* UPPER/LOWER INTERRUPTS [CLEAR/STATUS] */
  289. REG_FIELD_FOR_EACH_SENSOR11(LOW_INT_CLEAR, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 20, 20),
  290. REG_FIELD_FOR_EACH_SENSOR11(UP_INT_CLEAR, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 21, 21),
  291. [LOW_INT_STATUS_0] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 0, 0),
  292. [LOW_INT_STATUS_1] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 1, 1),
  293. [LOW_INT_STATUS_2] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 2, 2),
  294. [LOW_INT_STATUS_3] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 3, 3),
  295. [LOW_INT_STATUS_4] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 4, 4),
  296. [LOW_INT_STATUS_5] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 5, 5),
  297. [LOW_INT_STATUS_6] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 6, 6),
  298. [LOW_INT_STATUS_7] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 7, 7),
  299. [UP_INT_STATUS_0] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 8, 8),
  300. [UP_INT_STATUS_1] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 9, 9),
  301. [UP_INT_STATUS_2] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 10, 10),
  302. [UP_INT_STATUS_3] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 11, 11),
  303. [UP_INT_STATUS_4] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 12, 12),
  304. [UP_INT_STATUS_5] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 13, 13),
  305. [UP_INT_STATUS_6] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 14, 14),
  306. [UP_INT_STATUS_7] = REG_FIELD(TM_HIGH_LOW_INT_STATUS_OFF, 15, 15),
  307. /* NO CRITICAL INTERRUPT SUPPORT on v1 */
  308. /* Sn_STATUS */
  309. REG_FIELD_FOR_EACH_SENSOR11(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 9),
  310. REG_FIELD_FOR_EACH_SENSOR11(VALID, TM_Sn_STATUS_OFF, 14, 14),
  311. /* xxx_STATUS bits: 1 == threshold violated */
  312. REG_FIELD_FOR_EACH_SENSOR11(MIN_STATUS, TM_Sn_STATUS_OFF, 10, 10),
  313. REG_FIELD_FOR_EACH_SENSOR11(LOWER_STATUS, TM_Sn_STATUS_OFF, 11, 11),
  314. REG_FIELD_FOR_EACH_SENSOR11(UPPER_STATUS, TM_Sn_STATUS_OFF, 12, 12),
  315. /* No CRITICAL field on v1.x */
  316. REG_FIELD_FOR_EACH_SENSOR11(MAX_STATUS, TM_Sn_STATUS_OFF, 13, 13),
  317. /* TRDY: 1=ready, 0=in progress */
  318. [TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
  319. };
  320. static const struct tsens_ops ops_generic_v1 = {
  321. .init = init_common,
  322. .calibrate = calibrate_v1,
  323. .get_temp = get_temp_tsens_valid,
  324. };
  325. struct tsens_plat_data data_tsens_v1 = {
  326. .ops = &ops_generic_v1,
  327. .feat = &tsens_v1_feat,
  328. .fields = tsens_v1_regfields,
  329. };
  330. static const struct tsens_ops ops_8976 = {
  331. .init = init_common,
  332. .calibrate = calibrate_8976,
  333. .get_temp = get_temp_tsens_valid,
  334. };
  335. /* Valid for both MSM8956 and MSM8976. Sensor ID 3 is unused. */
  336. struct tsens_plat_data data_8976 = {
  337. .num_sensors = 11,
  338. .ops = &ops_8976,
  339. .hw_ids = (unsigned int[]){0, 1, 2, 4, 5, 6, 7, 8, 9, 10},
  340. .feat = &tsens_v1_feat,
  341. .fields = tsens_v1_regfields,
  342. };