qcom-spmi-temp-alarm.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2011-2015, 2017, 2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/bitops.h>
  6. #include <linux/delay.h>
  7. #include <linux/err.h>
  8. #include <linux/iio/consumer.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/regmap.h>
  15. #include <linux/thermal.h>
  16. #include "../thermal_core.h"
  17. #define QPNP_TM_REG_TYPE 0x04
  18. #define QPNP_TM_REG_SUBTYPE 0x05
  19. #define QPNP_TM_REG_STATUS 0x08
  20. #define QPNP_TM_REG_SHUTDOWN_CTRL1 0x40
  21. #define QPNP_TM_REG_ALARM_CTRL 0x46
  22. #define QPNP_TM_TYPE 0x09
  23. #define QPNP_TM_SUBTYPE_GEN1 0x08
  24. #define QPNP_TM_SUBTYPE_GEN2 0x09
  25. #define STATUS_GEN1_STAGE_MASK GENMASK(1, 0)
  26. #define STATUS_GEN2_STATE_MASK GENMASK(6, 4)
  27. #define STATUS_GEN2_STATE_SHIFT 4
  28. #define SHUTDOWN_CTRL1_OVERRIDE_S2 BIT(6)
  29. #define SHUTDOWN_CTRL1_THRESHOLD_MASK GENMASK(1, 0)
  30. #define SHUTDOWN_CTRL1_RATE_25HZ BIT(3)
  31. #define ALARM_CTRL_FORCE_ENABLE BIT(7)
  32. /*
  33. * Trip point values based on threshold control
  34. * 0 = {105 C, 125 C, 145 C}
  35. * 1 = {110 C, 130 C, 150 C}
  36. * 2 = {115 C, 135 C, 155 C}
  37. * 3 = {120 C, 140 C, 160 C}
  38. */
  39. #define TEMP_STAGE_STEP 20000 /* Stage step: 20.000 C */
  40. #define TEMP_STAGE_HYSTERESIS 2000
  41. #define TEMP_THRESH_MIN 105000 /* Threshold Min: 105 C */
  42. #define TEMP_THRESH_STEP 5000 /* Threshold step: 5 C */
  43. #define THRESH_MIN 0
  44. #define THRESH_MAX 3
  45. /* Stage 2 Threshold Min: 125 C */
  46. #define STAGE2_THRESHOLD_MIN 125000
  47. /* Stage 2 Threshold Max: 140 C */
  48. #define STAGE2_THRESHOLD_MAX 140000
  49. /* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
  50. #define DEFAULT_TEMP 37000
  51. struct qpnp_tm_chip {
  52. struct regmap *map;
  53. struct device *dev;
  54. struct thermal_zone_device *tz_dev;
  55. unsigned int subtype;
  56. long temp;
  57. unsigned int thresh;
  58. unsigned int stage;
  59. unsigned int prev_stage;
  60. unsigned int base;
  61. /* protects .thresh, .stage and chip registers */
  62. struct mutex lock;
  63. bool initialized;
  64. struct iio_channel *adc;
  65. };
  66. /* This array maps from GEN2 alarm state to GEN1 alarm stage */
  67. static const unsigned int alarm_state_map[8] = {0, 1, 1, 2, 2, 3, 3, 3};
  68. static int qpnp_tm_read(struct qpnp_tm_chip *chip, u16 addr, u8 *data)
  69. {
  70. unsigned int val;
  71. int ret;
  72. ret = regmap_read(chip->map, chip->base + addr, &val);
  73. if (ret < 0)
  74. return ret;
  75. *data = val;
  76. return 0;
  77. }
  78. static int qpnp_tm_write(struct qpnp_tm_chip *chip, u16 addr, u8 data)
  79. {
  80. return regmap_write(chip->map, chip->base + addr, data);
  81. }
  82. /**
  83. * qpnp_tm_get_temp_stage() - return over-temperature stage
  84. * @chip: Pointer to the qpnp_tm chip
  85. *
  86. * Return: stage (GEN1) or state (GEN2) on success, or errno on failure.
  87. */
  88. static int qpnp_tm_get_temp_stage(struct qpnp_tm_chip *chip)
  89. {
  90. int ret;
  91. u8 reg = 0;
  92. ret = qpnp_tm_read(chip, QPNP_TM_REG_STATUS, &reg);
  93. if (ret < 0)
  94. return ret;
  95. if (chip->subtype == QPNP_TM_SUBTYPE_GEN1)
  96. ret = reg & STATUS_GEN1_STAGE_MASK;
  97. else
  98. ret = (reg & STATUS_GEN2_STATE_MASK) >> STATUS_GEN2_STATE_SHIFT;
  99. return ret;
  100. }
  101. /*
  102. * This function updates the internal temp value based on the
  103. * current thermal stage and threshold as well as the previous stage
  104. */
  105. static int qpnp_tm_update_temp_no_adc(struct qpnp_tm_chip *chip)
  106. {
  107. unsigned int stage, stage_new, stage_old;
  108. int ret;
  109. WARN_ON(!mutex_is_locked(&chip->lock));
  110. ret = qpnp_tm_get_temp_stage(chip);
  111. if (ret < 0)
  112. return ret;
  113. stage = ret;
  114. if (chip->subtype == QPNP_TM_SUBTYPE_GEN1) {
  115. stage_new = stage;
  116. stage_old = chip->stage;
  117. } else {
  118. stage_new = alarm_state_map[stage];
  119. stage_old = alarm_state_map[chip->stage];
  120. }
  121. if (stage_new > stage_old) {
  122. /* increasing stage, use lower bound */
  123. chip->temp = (stage_new - 1) * TEMP_STAGE_STEP +
  124. chip->thresh * TEMP_THRESH_STEP +
  125. TEMP_STAGE_HYSTERESIS + TEMP_THRESH_MIN;
  126. } else if (stage_new < stage_old) {
  127. /* decreasing stage, use upper bound */
  128. chip->temp = stage_new * TEMP_STAGE_STEP +
  129. chip->thresh * TEMP_THRESH_STEP -
  130. TEMP_STAGE_HYSTERESIS + TEMP_THRESH_MIN;
  131. }
  132. chip->stage = stage;
  133. return 0;
  134. }
  135. static int qpnp_tm_get_temp(void *data, int *temp)
  136. {
  137. struct qpnp_tm_chip *chip = data;
  138. int ret, mili_celsius;
  139. if (!temp)
  140. return -EINVAL;
  141. if (!chip->initialized) {
  142. *temp = DEFAULT_TEMP;
  143. return 0;
  144. }
  145. if (!chip->adc) {
  146. mutex_lock(&chip->lock);
  147. ret = qpnp_tm_update_temp_no_adc(chip);
  148. mutex_unlock(&chip->lock);
  149. if (ret < 0)
  150. return ret;
  151. } else {
  152. ret = iio_read_channel_processed(chip->adc, &mili_celsius);
  153. if (ret < 0)
  154. return ret;
  155. chip->temp = mili_celsius;
  156. }
  157. *temp = chip->temp;
  158. return 0;
  159. }
  160. static int qpnp_tm_update_critical_trip_temp(struct qpnp_tm_chip *chip,
  161. int temp)
  162. {
  163. u8 reg;
  164. bool disable_s2_shutdown = false;
  165. WARN_ON(!mutex_is_locked(&chip->lock));
  166. /*
  167. * Default: S2 and S3 shutdown enabled, thresholds at
  168. * 105C/125C/145C, monitoring at 25Hz
  169. */
  170. reg = SHUTDOWN_CTRL1_RATE_25HZ;
  171. if (temp == THERMAL_TEMP_INVALID ||
  172. temp < STAGE2_THRESHOLD_MIN) {
  173. chip->thresh = THRESH_MIN;
  174. goto skip;
  175. }
  176. if (temp <= STAGE2_THRESHOLD_MAX) {
  177. chip->thresh = THRESH_MAX -
  178. ((STAGE2_THRESHOLD_MAX - temp) /
  179. TEMP_THRESH_STEP);
  180. disable_s2_shutdown = true;
  181. } else {
  182. chip->thresh = THRESH_MAX;
  183. if (chip->adc)
  184. disable_s2_shutdown = true;
  185. else
  186. dev_warn(chip->dev,
  187. "No ADC is configured and critical temperature is above the maximum stage 2 threshold of 140 C! Configuring stage 2 shutdown at 140 C.\n");
  188. }
  189. skip:
  190. reg |= chip->thresh;
  191. if (disable_s2_shutdown)
  192. reg |= SHUTDOWN_CTRL1_OVERRIDE_S2;
  193. return qpnp_tm_write(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, reg);
  194. }
  195. static int qpnp_tm_set_trip_temp(void *data, int trip, int temp)
  196. {
  197. struct qpnp_tm_chip *chip = data;
  198. const struct thermal_trip *trip_points;
  199. int ret;
  200. trip_points = of_thermal_get_trip_points(chip->tz_dev);
  201. if (!trip_points)
  202. return -EINVAL;
  203. if (trip_points[trip].type != THERMAL_TRIP_CRITICAL)
  204. return 0;
  205. mutex_lock(&chip->lock);
  206. ret = qpnp_tm_update_critical_trip_temp(chip, temp);
  207. mutex_unlock(&chip->lock);
  208. return ret;
  209. }
  210. static const struct thermal_zone_of_device_ops qpnp_tm_sensor_ops = {
  211. .get_temp = qpnp_tm_get_temp,
  212. .set_trip_temp = qpnp_tm_set_trip_temp,
  213. };
  214. static irqreturn_t qpnp_tm_isr(int irq, void *data)
  215. {
  216. struct qpnp_tm_chip *chip = data;
  217. thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED);
  218. return IRQ_HANDLED;
  219. }
  220. static int qpnp_tm_get_critical_trip_temp(struct qpnp_tm_chip *chip)
  221. {
  222. int ntrips;
  223. const struct thermal_trip *trips;
  224. int i;
  225. ntrips = of_thermal_get_ntrips(chip->tz_dev);
  226. if (ntrips <= 0)
  227. return THERMAL_TEMP_INVALID;
  228. trips = of_thermal_get_trip_points(chip->tz_dev);
  229. if (!trips)
  230. return THERMAL_TEMP_INVALID;
  231. for (i = 0; i < ntrips; i++) {
  232. if (of_thermal_is_trip_valid(chip->tz_dev, i) &&
  233. trips[i].type == THERMAL_TRIP_CRITICAL)
  234. return trips[i].temperature;
  235. }
  236. return THERMAL_TEMP_INVALID;
  237. }
  238. /*
  239. * This function initializes the internal temp value based on only the
  240. * current thermal stage and threshold. Setup threshold control and
  241. * disable shutdown override.
  242. */
  243. static int qpnp_tm_init(struct qpnp_tm_chip *chip)
  244. {
  245. unsigned int stage;
  246. int ret;
  247. u8 reg = 0;
  248. int crit_temp;
  249. mutex_lock(&chip->lock);
  250. ret = qpnp_tm_read(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, &reg);
  251. if (ret < 0)
  252. goto out;
  253. chip->thresh = reg & SHUTDOWN_CTRL1_THRESHOLD_MASK;
  254. chip->temp = DEFAULT_TEMP;
  255. ret = qpnp_tm_get_temp_stage(chip);
  256. if (ret < 0)
  257. goto out;
  258. chip->stage = ret;
  259. stage = chip->subtype == QPNP_TM_SUBTYPE_GEN1
  260. ? chip->stage : alarm_state_map[chip->stage];
  261. if (stage)
  262. chip->temp = chip->thresh * TEMP_THRESH_STEP +
  263. (stage - 1) * TEMP_STAGE_STEP +
  264. TEMP_THRESH_MIN;
  265. crit_temp = qpnp_tm_get_critical_trip_temp(chip);
  266. ret = qpnp_tm_update_critical_trip_temp(chip, crit_temp);
  267. if (ret < 0)
  268. goto out;
  269. /* Enable the thermal alarm PMIC module in always-on mode. */
  270. reg = ALARM_CTRL_FORCE_ENABLE;
  271. ret = qpnp_tm_write(chip, QPNP_TM_REG_ALARM_CTRL, reg);
  272. chip->initialized = true;
  273. out:
  274. mutex_unlock(&chip->lock);
  275. return ret;
  276. }
  277. static int qpnp_tm_probe(struct platform_device *pdev)
  278. {
  279. struct qpnp_tm_chip *chip;
  280. struct device_node *node;
  281. u8 type, subtype;
  282. u32 res;
  283. int ret, irq;
  284. node = pdev->dev.of_node;
  285. chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
  286. if (!chip)
  287. return -ENOMEM;
  288. dev_set_drvdata(&pdev->dev, chip);
  289. chip->dev = &pdev->dev;
  290. mutex_init(&chip->lock);
  291. chip->map = dev_get_regmap(pdev->dev.parent, NULL);
  292. if (!chip->map)
  293. return -ENXIO;
  294. ret = of_property_read_u32(node, "reg", &res);
  295. if (ret < 0)
  296. return ret;
  297. irq = platform_get_irq(pdev, 0);
  298. if (irq < 0)
  299. return irq;
  300. /* ADC based measurements are optional */
  301. chip->adc = devm_iio_channel_get(&pdev->dev, "thermal");
  302. if (IS_ERR(chip->adc)) {
  303. ret = PTR_ERR(chip->adc);
  304. chip->adc = NULL;
  305. if (ret == -EPROBE_DEFER)
  306. return ret;
  307. }
  308. chip->base = res;
  309. ret = qpnp_tm_read(chip, QPNP_TM_REG_TYPE, &type);
  310. if (ret < 0) {
  311. dev_err(&pdev->dev, "could not read type\n");
  312. return ret;
  313. }
  314. ret = qpnp_tm_read(chip, QPNP_TM_REG_SUBTYPE, &subtype);
  315. if (ret < 0) {
  316. dev_err(&pdev->dev, "could not read subtype\n");
  317. return ret;
  318. }
  319. if (type != QPNP_TM_TYPE || (subtype != QPNP_TM_SUBTYPE_GEN1
  320. && subtype != QPNP_TM_SUBTYPE_GEN2)) {
  321. dev_err(&pdev->dev, "invalid type 0x%02x or subtype 0x%02x\n",
  322. type, subtype);
  323. return -ENODEV;
  324. }
  325. chip->subtype = subtype;
  326. /*
  327. * Register the sensor before initializing the hardware to be able to
  328. * read the trip points. get_temp() returns the default temperature
  329. * before the hardware initialization is completed.
  330. */
  331. chip->tz_dev = devm_thermal_zone_of_sensor_register(
  332. &pdev->dev, 0, chip, &qpnp_tm_sensor_ops);
  333. if (IS_ERR(chip->tz_dev)) {
  334. dev_err(&pdev->dev, "failed to register sensor\n");
  335. return PTR_ERR(chip->tz_dev);
  336. }
  337. ret = qpnp_tm_init(chip);
  338. if (ret < 0) {
  339. dev_err(&pdev->dev, "init failed\n");
  340. return ret;
  341. }
  342. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, qpnp_tm_isr,
  343. IRQF_ONESHOT, node->name, chip);
  344. if (ret < 0)
  345. return ret;
  346. thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED);
  347. return 0;
  348. }
  349. static const struct of_device_id qpnp_tm_match_table[] = {
  350. { .compatible = "qcom,spmi-temp-alarm" },
  351. { }
  352. };
  353. MODULE_DEVICE_TABLE(of, qpnp_tm_match_table);
  354. static struct platform_driver qpnp_tm_driver = {
  355. .driver = {
  356. .name = "spmi-temp-alarm",
  357. .of_match_table = qpnp_tm_match_table,
  358. },
  359. .probe = qpnp_tm_probe,
  360. };
  361. module_platform_driver(qpnp_tm_driver);
  362. MODULE_ALIAS("platform:spmi-temp-alarm");
  363. MODULE_DESCRIPTION("QPNP PMIC Temperature Alarm driver");
  364. MODULE_LICENSE("GPL v2");