driver_gpio.c 12 KB

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  1. /*
  2. * Sonics Silicon Backplane
  3. * GPIO driver
  4. *
  5. * Copyright 2011, Broadcom Corporation
  6. * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
  7. *
  8. * Licensed under the GNU/GPL. See COPYING for details.
  9. */
  10. #include "ssb_private.h"
  11. #include <linux/gpio/driver.h>
  12. #include <linux/irq.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/irqdomain.h>
  15. #include <linux/export.h>
  16. #include <linux/ssb/ssb.h>
  17. /**************************************************
  18. * Shared
  19. **************************************************/
  20. #if IS_ENABLED(CONFIG_SSB_EMBEDDED)
  21. static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned int gpio)
  22. {
  23. struct ssb_bus *bus = gpiochip_get_data(chip);
  24. if (bus->bustype == SSB_BUSTYPE_SSB)
  25. return irq_find_mapping(bus->irq_domain, gpio);
  26. else
  27. return -EINVAL;
  28. }
  29. #endif
  30. /**************************************************
  31. * ChipCommon
  32. **************************************************/
  33. static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned int gpio)
  34. {
  35. struct ssb_bus *bus = gpiochip_get_data(chip);
  36. return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio);
  37. }
  38. static void ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned int gpio,
  39. int value)
  40. {
  41. struct ssb_bus *bus = gpiochip_get_data(chip);
  42. ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
  43. }
  44. static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip,
  45. unsigned int gpio)
  46. {
  47. struct ssb_bus *bus = gpiochip_get_data(chip);
  48. ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 0);
  49. return 0;
  50. }
  51. static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip,
  52. unsigned int gpio, int value)
  53. {
  54. struct ssb_bus *bus = gpiochip_get_data(chip);
  55. ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 1 << gpio);
  56. ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
  57. return 0;
  58. }
  59. static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned int gpio)
  60. {
  61. struct ssb_bus *bus = gpiochip_get_data(chip);
  62. ssb_chipco_gpio_control(&bus->chipco, 1 << gpio, 0);
  63. /* clear pulldown */
  64. ssb_chipco_gpio_pulldown(&bus->chipco, 1 << gpio, 0);
  65. /* Set pullup */
  66. ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 1 << gpio);
  67. return 0;
  68. }
  69. static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned int gpio)
  70. {
  71. struct ssb_bus *bus = gpiochip_get_data(chip);
  72. /* clear pullup */
  73. ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
  74. }
  75. #if IS_ENABLED(CONFIG_SSB_EMBEDDED)
  76. static void ssb_gpio_irq_chipco_mask(struct irq_data *d)
  77. {
  78. struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
  79. int gpio = irqd_to_hwirq(d);
  80. ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), 0);
  81. }
  82. static void ssb_gpio_irq_chipco_unmask(struct irq_data *d)
  83. {
  84. struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
  85. int gpio = irqd_to_hwirq(d);
  86. u32 val = ssb_chipco_gpio_in(&bus->chipco, BIT(gpio));
  87. ssb_chipco_gpio_polarity(&bus->chipco, BIT(gpio), val);
  88. ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), BIT(gpio));
  89. }
  90. static struct irq_chip ssb_gpio_irq_chipco_chip = {
  91. .name = "SSB-GPIO-CC",
  92. .irq_mask = ssb_gpio_irq_chipco_mask,
  93. .irq_unmask = ssb_gpio_irq_chipco_unmask,
  94. };
  95. static irqreturn_t ssb_gpio_irq_chipco_handler(int irq, void *dev_id)
  96. {
  97. struct ssb_bus *bus = dev_id;
  98. struct ssb_chipcommon *chipco = &bus->chipco;
  99. u32 val = chipco_read32(chipco, SSB_CHIPCO_GPIOIN);
  100. u32 mask = chipco_read32(chipco, SSB_CHIPCO_GPIOIRQ);
  101. u32 pol = chipco_read32(chipco, SSB_CHIPCO_GPIOPOL);
  102. unsigned long irqs = (val ^ pol) & mask;
  103. int gpio;
  104. if (!irqs)
  105. return IRQ_NONE;
  106. for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
  107. generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
  108. ssb_chipco_gpio_polarity(chipco, irqs, val & irqs);
  109. return IRQ_HANDLED;
  110. }
  111. static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
  112. {
  113. struct ssb_chipcommon *chipco = &bus->chipco;
  114. struct gpio_chip *chip = &bus->gpio;
  115. int gpio, hwirq, err;
  116. if (bus->bustype != SSB_BUSTYPE_SSB)
  117. return 0;
  118. bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
  119. &irq_domain_simple_ops, chipco);
  120. if (!bus->irq_domain) {
  121. err = -ENODEV;
  122. goto err_irq_domain;
  123. }
  124. for (gpio = 0; gpio < chip->ngpio; gpio++) {
  125. int irq = irq_create_mapping(bus->irq_domain, gpio);
  126. irq_set_chip_data(irq, bus);
  127. irq_set_chip_and_handler(irq, &ssb_gpio_irq_chipco_chip,
  128. handle_simple_irq);
  129. }
  130. hwirq = ssb_mips_irq(bus->chipco.dev) + 2;
  131. err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED,
  132. "gpio", bus);
  133. if (err)
  134. goto err_req_irq;
  135. ssb_chipco_gpio_intmask(&bus->chipco, ~0, 0);
  136. chipco_set32(chipco, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO);
  137. return 0;
  138. err_req_irq:
  139. for (gpio = 0; gpio < chip->ngpio; gpio++) {
  140. int irq = irq_find_mapping(bus->irq_domain, gpio);
  141. irq_dispose_mapping(irq);
  142. }
  143. irq_domain_remove(bus->irq_domain);
  144. err_irq_domain:
  145. return err;
  146. }
  147. static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
  148. {
  149. struct ssb_chipcommon *chipco = &bus->chipco;
  150. struct gpio_chip *chip = &bus->gpio;
  151. int gpio;
  152. if (bus->bustype != SSB_BUSTYPE_SSB)
  153. return;
  154. chipco_mask32(chipco, SSB_CHIPCO_IRQMASK, ~SSB_CHIPCO_IRQ_GPIO);
  155. free_irq(ssb_mips_irq(bus->chipco.dev) + 2, chipco);
  156. for (gpio = 0; gpio < chip->ngpio; gpio++) {
  157. int irq = irq_find_mapping(bus->irq_domain, gpio);
  158. irq_dispose_mapping(irq);
  159. }
  160. irq_domain_remove(bus->irq_domain);
  161. }
  162. #else
  163. static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
  164. {
  165. return 0;
  166. }
  167. static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
  168. {
  169. }
  170. #endif
  171. static int ssb_gpio_chipco_init(struct ssb_bus *bus)
  172. {
  173. struct gpio_chip *chip = &bus->gpio;
  174. int err;
  175. chip->label = "ssb_chipco_gpio";
  176. chip->owner = THIS_MODULE;
  177. chip->request = ssb_gpio_chipco_request;
  178. chip->free = ssb_gpio_chipco_free;
  179. chip->get = ssb_gpio_chipco_get_value;
  180. chip->set = ssb_gpio_chipco_set_value;
  181. chip->direction_input = ssb_gpio_chipco_direction_input;
  182. chip->direction_output = ssb_gpio_chipco_direction_output;
  183. #if IS_ENABLED(CONFIG_SSB_EMBEDDED)
  184. chip->to_irq = ssb_gpio_to_irq;
  185. #endif
  186. chip->ngpio = 16;
  187. /* There is just one SoC in one device and its GPIO addresses should be
  188. * deterministic to address them more easily. The other buses could get
  189. * a random base number. */
  190. if (bus->bustype == SSB_BUSTYPE_SSB)
  191. chip->base = 0;
  192. else
  193. chip->base = -1;
  194. err = ssb_gpio_irq_chipco_domain_init(bus);
  195. if (err)
  196. return err;
  197. err = gpiochip_add_data(chip, bus);
  198. if (err) {
  199. ssb_gpio_irq_chipco_domain_exit(bus);
  200. return err;
  201. }
  202. return 0;
  203. }
  204. /**************************************************
  205. * EXTIF
  206. **************************************************/
  207. #ifdef CONFIG_SSB_DRIVER_EXTIF
  208. static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned int gpio)
  209. {
  210. struct ssb_bus *bus = gpiochip_get_data(chip);
  211. return !!ssb_extif_gpio_in(&bus->extif, 1 << gpio);
  212. }
  213. static void ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned int gpio,
  214. int value)
  215. {
  216. struct ssb_bus *bus = gpiochip_get_data(chip);
  217. ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
  218. }
  219. static int ssb_gpio_extif_direction_input(struct gpio_chip *chip,
  220. unsigned int gpio)
  221. {
  222. struct ssb_bus *bus = gpiochip_get_data(chip);
  223. ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 0);
  224. return 0;
  225. }
  226. static int ssb_gpio_extif_direction_output(struct gpio_chip *chip,
  227. unsigned int gpio, int value)
  228. {
  229. struct ssb_bus *bus = gpiochip_get_data(chip);
  230. ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 1 << gpio);
  231. ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
  232. return 0;
  233. }
  234. #if IS_ENABLED(CONFIG_SSB_EMBEDDED)
  235. static void ssb_gpio_irq_extif_mask(struct irq_data *d)
  236. {
  237. struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
  238. int gpio = irqd_to_hwirq(d);
  239. ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), 0);
  240. }
  241. static void ssb_gpio_irq_extif_unmask(struct irq_data *d)
  242. {
  243. struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
  244. int gpio = irqd_to_hwirq(d);
  245. u32 val = ssb_extif_gpio_in(&bus->extif, BIT(gpio));
  246. ssb_extif_gpio_polarity(&bus->extif, BIT(gpio), val);
  247. ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), BIT(gpio));
  248. }
  249. static struct irq_chip ssb_gpio_irq_extif_chip = {
  250. .name = "SSB-GPIO-EXTIF",
  251. .irq_mask = ssb_gpio_irq_extif_mask,
  252. .irq_unmask = ssb_gpio_irq_extif_unmask,
  253. };
  254. static irqreturn_t ssb_gpio_irq_extif_handler(int irq, void *dev_id)
  255. {
  256. struct ssb_bus *bus = dev_id;
  257. struct ssb_extif *extif = &bus->extif;
  258. u32 val = ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN);
  259. u32 mask = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTMASK);
  260. u32 pol = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTPOL);
  261. unsigned long irqs = (val ^ pol) & mask;
  262. int gpio;
  263. if (!irqs)
  264. return IRQ_NONE;
  265. for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
  266. generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
  267. ssb_extif_gpio_polarity(extif, irqs, val & irqs);
  268. return IRQ_HANDLED;
  269. }
  270. static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
  271. {
  272. struct ssb_extif *extif = &bus->extif;
  273. struct gpio_chip *chip = &bus->gpio;
  274. int gpio, hwirq, err;
  275. if (bus->bustype != SSB_BUSTYPE_SSB)
  276. return 0;
  277. bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
  278. &irq_domain_simple_ops, extif);
  279. if (!bus->irq_domain) {
  280. err = -ENODEV;
  281. goto err_irq_domain;
  282. }
  283. for (gpio = 0; gpio < chip->ngpio; gpio++) {
  284. int irq = irq_create_mapping(bus->irq_domain, gpio);
  285. irq_set_chip_data(irq, bus);
  286. irq_set_chip_and_handler(irq, &ssb_gpio_irq_extif_chip,
  287. handle_simple_irq);
  288. }
  289. hwirq = ssb_mips_irq(bus->extif.dev) + 2;
  290. err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED,
  291. "gpio", bus);
  292. if (err)
  293. goto err_req_irq;
  294. ssb_extif_gpio_intmask(&bus->extif, ~0, 0);
  295. return 0;
  296. err_req_irq:
  297. for (gpio = 0; gpio < chip->ngpio; gpio++) {
  298. int irq = irq_find_mapping(bus->irq_domain, gpio);
  299. irq_dispose_mapping(irq);
  300. }
  301. irq_domain_remove(bus->irq_domain);
  302. err_irq_domain:
  303. return err;
  304. }
  305. static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
  306. {
  307. struct ssb_extif *extif = &bus->extif;
  308. struct gpio_chip *chip = &bus->gpio;
  309. int gpio;
  310. if (bus->bustype != SSB_BUSTYPE_SSB)
  311. return;
  312. free_irq(ssb_mips_irq(bus->extif.dev) + 2, extif);
  313. for (gpio = 0; gpio < chip->ngpio; gpio++) {
  314. int irq = irq_find_mapping(bus->irq_domain, gpio);
  315. irq_dispose_mapping(irq);
  316. }
  317. irq_domain_remove(bus->irq_domain);
  318. }
  319. #else
  320. static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
  321. {
  322. return 0;
  323. }
  324. static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
  325. {
  326. }
  327. #endif
  328. static int ssb_gpio_extif_init(struct ssb_bus *bus)
  329. {
  330. struct gpio_chip *chip = &bus->gpio;
  331. int err;
  332. chip->label = "ssb_extif_gpio";
  333. chip->owner = THIS_MODULE;
  334. chip->get = ssb_gpio_extif_get_value;
  335. chip->set = ssb_gpio_extif_set_value;
  336. chip->direction_input = ssb_gpio_extif_direction_input;
  337. chip->direction_output = ssb_gpio_extif_direction_output;
  338. #if IS_ENABLED(CONFIG_SSB_EMBEDDED)
  339. chip->to_irq = ssb_gpio_to_irq;
  340. #endif
  341. chip->ngpio = 5;
  342. /* There is just one SoC in one device and its GPIO addresses should be
  343. * deterministic to address them more easily. The other buses could get
  344. * a random base number. */
  345. if (bus->bustype == SSB_BUSTYPE_SSB)
  346. chip->base = 0;
  347. else
  348. chip->base = -1;
  349. err = ssb_gpio_irq_extif_domain_init(bus);
  350. if (err)
  351. return err;
  352. err = gpiochip_add_data(chip, bus);
  353. if (err) {
  354. ssb_gpio_irq_extif_domain_exit(bus);
  355. return err;
  356. }
  357. return 0;
  358. }
  359. #else
  360. static int ssb_gpio_extif_init(struct ssb_bus *bus)
  361. {
  362. return -ENOTSUPP;
  363. }
  364. #endif
  365. /**************************************************
  366. * Init
  367. **************************************************/
  368. int ssb_gpio_init(struct ssb_bus *bus)
  369. {
  370. if (ssb_chipco_available(&bus->chipco))
  371. return ssb_gpio_chipco_init(bus);
  372. else if (ssb_extif_available(&bus->extif))
  373. return ssb_gpio_extif_init(bus);
  374. return -1;
  375. }
  376. int ssb_gpio_unregister(struct ssb_bus *bus)
  377. {
  378. if (ssb_chipco_available(&bus->chipco) ||
  379. ssb_extif_available(&bus->extif)) {
  380. gpiochip_remove(&bus->gpio);
  381. return 0;
  382. }
  383. return -1;
  384. }