spi-gpio.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * SPI master driver using generic bitbanged GPIO
  4. *
  5. * Copyright (C) 2006,2008 David Brownell
  6. * Copyright (C) 2017 Linus Walleij
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/gpio/consumer.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/spi_bitbang.h>
  16. #include <linux/spi/spi_gpio.h>
  17. /*
  18. * This bitbanging SPI master driver should help make systems usable
  19. * when a native hardware SPI engine is not available, perhaps because
  20. * its driver isn't yet working or because the I/O pins it requires
  21. * are used for other purposes.
  22. *
  23. * platform_device->driver_data ... points to spi_gpio
  24. *
  25. * spi->controller_state ... reserved for bitbang framework code
  26. *
  27. * spi->master->dev.driver_data ... points to spi_gpio->bitbang
  28. */
  29. struct spi_gpio {
  30. struct spi_bitbang bitbang;
  31. struct gpio_desc *sck;
  32. struct gpio_desc *miso;
  33. struct gpio_desc *mosi;
  34. struct gpio_desc **cs_gpios;
  35. };
  36. /*----------------------------------------------------------------------*/
  37. /*
  38. * Because the overhead of going through four GPIO procedure calls
  39. * per transferred bit can make performance a problem, this code
  40. * is set up so that you can use it in either of two ways:
  41. *
  42. * - The slow generic way: set up platform_data to hold the GPIO
  43. * numbers used for MISO/MOSI/SCK, and issue procedure calls for
  44. * each of them. This driver can handle several such busses.
  45. *
  46. * - The quicker inlined way: only helps with platform GPIO code
  47. * that inlines operations for constant GPIOs. This can give
  48. * you tight (fast!) inner loops, but each such bus needs a
  49. * new driver. You'll define a new C file, with Makefile and
  50. * Kconfig support; the C code can be a total of six lines:
  51. *
  52. * #define DRIVER_NAME "myboard_spi2"
  53. * #define SPI_MISO_GPIO 119
  54. * #define SPI_MOSI_GPIO 120
  55. * #define SPI_SCK_GPIO 121
  56. * #define SPI_N_CHIPSEL 4
  57. * #include "spi-gpio.c"
  58. */
  59. #ifndef DRIVER_NAME
  60. #define DRIVER_NAME "spi_gpio"
  61. #define GENERIC_BITBANG /* vs tight inlines */
  62. #endif
  63. /*----------------------------------------------------------------------*/
  64. static inline struct spi_gpio *__pure
  65. spi_to_spi_gpio(const struct spi_device *spi)
  66. {
  67. const struct spi_bitbang *bang;
  68. struct spi_gpio *spi_gpio;
  69. bang = spi_master_get_devdata(spi->master);
  70. spi_gpio = container_of(bang, struct spi_gpio, bitbang);
  71. return spi_gpio;
  72. }
  73. /* These helpers are in turn called by the bitbang inlines */
  74. static inline void setsck(const struct spi_device *spi, int is_on)
  75. {
  76. struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  77. gpiod_set_value_cansleep(spi_gpio->sck, is_on);
  78. }
  79. static inline void setmosi(const struct spi_device *spi, int is_on)
  80. {
  81. struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  82. gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
  83. }
  84. static inline int getmiso(const struct spi_device *spi)
  85. {
  86. struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  87. if (spi->mode & SPI_3WIRE)
  88. return !!gpiod_get_value_cansleep(spi_gpio->mosi);
  89. else
  90. return !!gpiod_get_value_cansleep(spi_gpio->miso);
  91. }
  92. /*
  93. * NOTE: this clocks "as fast as we can". It "should" be a function of the
  94. * requested device clock. Software overhead means we usually have trouble
  95. * reaching even one Mbit/sec (except when we can inline bitops), so for now
  96. * we'll just assume we never need additional per-bit slowdowns.
  97. */
  98. #define spidelay(nsecs) do {} while (0)
  99. #include "spi-bitbang-txrx.h"
  100. /*
  101. * These functions can leverage inline expansion of GPIO calls to shrink
  102. * costs for a txrx bit, often by factors of around ten (by instruction
  103. * count). That is particularly visible for larger word sizes, but helps
  104. * even with default 8-bit words.
  105. *
  106. * REVISIT overheads calling these functions for each word also have
  107. * significant performance costs. Having txrx_bufs() calls that inline
  108. * the txrx_word() logic would help performance, e.g. on larger blocks
  109. * used with flash storage or MMC/SD. There should also be ways to make
  110. * GCC be less stupid about reloading registers inside the I/O loops,
  111. * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
  112. */
  113. static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
  114. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  115. {
  116. return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
  117. }
  118. static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
  119. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  120. {
  121. return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
  122. }
  123. static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
  124. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  125. {
  126. return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
  127. }
  128. static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
  129. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  130. {
  131. return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
  132. }
  133. /*
  134. * These functions do not call setmosi or getmiso if respective flag
  135. * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
  136. * call when such pin is not present or defined in the controller.
  137. * A separate set of callbacks is defined to get highest possible
  138. * speed in the generic case (when both MISO and MOSI lines are
  139. * available), as optimiser will remove the checks when argument is
  140. * constant.
  141. */
  142. static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
  143. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  144. {
  145. flags = spi->master->flags;
  146. return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
  147. }
  148. static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
  149. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  150. {
  151. flags = spi->master->flags;
  152. return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
  153. }
  154. static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
  155. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  156. {
  157. flags = spi->master->flags;
  158. return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
  159. }
  160. static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
  161. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  162. {
  163. flags = spi->master->flags;
  164. return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
  165. }
  166. /*----------------------------------------------------------------------*/
  167. static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
  168. {
  169. struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  170. /* set initial clock line level */
  171. if (is_active)
  172. gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
  173. /* Drive chip select line, if we have one */
  174. if (spi_gpio->cs_gpios) {
  175. struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
  176. /* SPI chip selects are normally active-low */
  177. gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
  178. }
  179. }
  180. static int spi_gpio_setup(struct spi_device *spi)
  181. {
  182. struct gpio_desc *cs;
  183. int status = 0;
  184. struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  185. /*
  186. * The CS GPIOs have already been
  187. * initialized from the descriptor lookup.
  188. */
  189. if (spi_gpio->cs_gpios) {
  190. cs = spi_gpio->cs_gpios[spi->chip_select];
  191. if (!spi->controller_state && cs)
  192. status = gpiod_direction_output(cs,
  193. !(spi->mode & SPI_CS_HIGH));
  194. }
  195. if (!status)
  196. status = spi_bitbang_setup(spi);
  197. return status;
  198. }
  199. static int spi_gpio_set_direction(struct spi_device *spi, bool output)
  200. {
  201. struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  202. int ret;
  203. if (output)
  204. return gpiod_direction_output(spi_gpio->mosi, 1);
  205. ret = gpiod_direction_input(spi_gpio->mosi);
  206. if (ret)
  207. return ret;
  208. /*
  209. * Send a turnaround high impedance cycle when switching
  210. * from output to input. Theoretically there should be
  211. * a clock delay here, but as has been noted above, the
  212. * nsec delay function for bit-banged GPIO is simply
  213. * {} because bit-banging just doesn't get fast enough
  214. * anyway.
  215. */
  216. if (spi->mode & SPI_3WIRE_HIZ) {
  217. gpiod_set_value_cansleep(spi_gpio->sck,
  218. !(spi->mode & SPI_CPOL));
  219. gpiod_set_value_cansleep(spi_gpio->sck,
  220. !!(spi->mode & SPI_CPOL));
  221. }
  222. return 0;
  223. }
  224. static void spi_gpio_cleanup(struct spi_device *spi)
  225. {
  226. spi_bitbang_cleanup(spi);
  227. }
  228. /*
  229. * It can be convenient to use this driver with pins that have alternate
  230. * functions associated with a "native" SPI controller if a driver for that
  231. * controller is not available, or is missing important functionality.
  232. *
  233. * On platforms which can do so, configure MISO with a weak pullup unless
  234. * there's an external pullup on that signal. That saves power by avoiding
  235. * floating signals. (A weak pulldown would save power too, but many
  236. * drivers expect to see all-ones data as the no slave "response".)
  237. */
  238. static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
  239. {
  240. spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
  241. if (IS_ERR(spi_gpio->mosi))
  242. return PTR_ERR(spi_gpio->mosi);
  243. spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
  244. if (IS_ERR(spi_gpio->miso))
  245. return PTR_ERR(spi_gpio->miso);
  246. spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
  247. return PTR_ERR_OR_ZERO(spi_gpio->sck);
  248. }
  249. #ifdef CONFIG_OF
  250. static const struct of_device_id spi_gpio_dt_ids[] = {
  251. { .compatible = "spi-gpio" },
  252. {}
  253. };
  254. MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
  255. static int spi_gpio_probe_dt(struct platform_device *pdev,
  256. struct spi_master *master)
  257. {
  258. master->dev.of_node = pdev->dev.of_node;
  259. master->use_gpio_descriptors = true;
  260. return 0;
  261. }
  262. #else
  263. static inline int spi_gpio_probe_dt(struct platform_device *pdev,
  264. struct spi_master *master)
  265. {
  266. return 0;
  267. }
  268. #endif
  269. static int spi_gpio_probe_pdata(struct platform_device *pdev,
  270. struct spi_master *master)
  271. {
  272. struct device *dev = &pdev->dev;
  273. struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
  274. struct spi_gpio *spi_gpio = spi_master_get_devdata(master);
  275. int i;
  276. #ifdef GENERIC_BITBANG
  277. if (!pdata || !pdata->num_chipselect)
  278. return -ENODEV;
  279. #endif
  280. /*
  281. * The master needs to think there is a chipselect even if not
  282. * connected
  283. */
  284. master->num_chipselect = pdata->num_chipselect ?: 1;
  285. spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect,
  286. sizeof(*spi_gpio->cs_gpios),
  287. GFP_KERNEL);
  288. if (!spi_gpio->cs_gpios)
  289. return -ENOMEM;
  290. for (i = 0; i < master->num_chipselect; i++) {
  291. spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
  292. GPIOD_OUT_HIGH);
  293. if (IS_ERR(spi_gpio->cs_gpios[i]))
  294. return PTR_ERR(spi_gpio->cs_gpios[i]);
  295. }
  296. return 0;
  297. }
  298. static int spi_gpio_probe(struct platform_device *pdev)
  299. {
  300. int status;
  301. struct spi_master *master;
  302. struct spi_gpio *spi_gpio;
  303. struct device *dev = &pdev->dev;
  304. struct spi_bitbang *bb;
  305. master = devm_spi_alloc_master(dev, sizeof(*spi_gpio));
  306. if (!master)
  307. return -ENOMEM;
  308. if (pdev->dev.of_node)
  309. status = spi_gpio_probe_dt(pdev, master);
  310. else
  311. status = spi_gpio_probe_pdata(pdev, master);
  312. if (status)
  313. return status;
  314. spi_gpio = spi_master_get_devdata(master);
  315. status = spi_gpio_request(dev, spi_gpio);
  316. if (status)
  317. return status;
  318. master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
  319. master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
  320. SPI_CS_HIGH;
  321. if (!spi_gpio->mosi) {
  322. /* HW configuration without MOSI pin
  323. *
  324. * No setting SPI_MASTER_NO_RX here - if there is only
  325. * a MOSI pin connected the host can still do RX by
  326. * changing the direction of the line.
  327. */
  328. master->flags = SPI_MASTER_NO_TX;
  329. }
  330. master->bus_num = pdev->id;
  331. master->setup = spi_gpio_setup;
  332. master->cleanup = spi_gpio_cleanup;
  333. bb = &spi_gpio->bitbang;
  334. bb->master = master;
  335. /*
  336. * There is some additional business, apart from driving the CS GPIO
  337. * line, that we need to do on selection. This makes the local
  338. * callback for chipselect always get called.
  339. */
  340. master->flags |= SPI_MASTER_GPIO_SS;
  341. bb->chipselect = spi_gpio_chipselect;
  342. bb->set_line_direction = spi_gpio_set_direction;
  343. if (master->flags & SPI_MASTER_NO_TX) {
  344. bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
  345. bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
  346. bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
  347. bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
  348. } else {
  349. bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
  350. bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
  351. bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
  352. bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
  353. }
  354. bb->setup_transfer = spi_bitbang_setup_transfer;
  355. status = spi_bitbang_init(&spi_gpio->bitbang);
  356. if (status)
  357. return status;
  358. return devm_spi_register_master(&pdev->dev, master);
  359. }
  360. MODULE_ALIAS("platform:" DRIVER_NAME);
  361. static struct platform_driver spi_gpio_driver = {
  362. .driver = {
  363. .name = DRIVER_NAME,
  364. .of_match_table = of_match_ptr(spi_gpio_dt_ids),
  365. },
  366. .probe = spi_gpio_probe,
  367. };
  368. module_platform_driver(spi_gpio_driver);
  369. MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
  370. MODULE_AUTHOR("David Brownell");
  371. MODULE_LICENSE("GPL");