spi-cavium.c 3.5 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2011, 2012 Cavium, Inc.
  7. */
  8. #include <linux/spi/spi.h>
  9. #include <linux/module.h>
  10. #include <linux/delay.h>
  11. #include <linux/io.h>
  12. #include "spi-cavium.h"
  13. static void octeon_spi_wait_ready(struct octeon_spi *p)
  14. {
  15. union cvmx_mpi_sts mpi_sts;
  16. unsigned int loops = 0;
  17. do {
  18. if (loops++)
  19. __delay(500);
  20. mpi_sts.u64 = readq(p->register_base + OCTEON_SPI_STS(p));
  21. } while (mpi_sts.s.busy);
  22. }
  23. static int octeon_spi_do_transfer(struct octeon_spi *p,
  24. struct spi_message *msg,
  25. struct spi_transfer *xfer,
  26. bool last_xfer)
  27. {
  28. struct spi_device *spi = msg->spi;
  29. union cvmx_mpi_cfg mpi_cfg;
  30. union cvmx_mpi_tx mpi_tx;
  31. unsigned int clkdiv;
  32. int mode;
  33. bool cpha, cpol;
  34. const u8 *tx_buf;
  35. u8 *rx_buf;
  36. int len;
  37. int i;
  38. mode = spi->mode;
  39. cpha = mode & SPI_CPHA;
  40. cpol = mode & SPI_CPOL;
  41. clkdiv = p->sys_freq / (2 * xfer->speed_hz);
  42. mpi_cfg.u64 = 0;
  43. mpi_cfg.s.clkdiv = clkdiv;
  44. mpi_cfg.s.cshi = (mode & SPI_CS_HIGH) ? 1 : 0;
  45. mpi_cfg.s.lsbfirst = (mode & SPI_LSB_FIRST) ? 1 : 0;
  46. mpi_cfg.s.wireor = (mode & SPI_3WIRE) ? 1 : 0;
  47. mpi_cfg.s.idlelo = cpha != cpol;
  48. mpi_cfg.s.cslate = cpha ? 1 : 0;
  49. mpi_cfg.s.enable = 1;
  50. if (spi->chip_select < 4)
  51. p->cs_enax |= 1ull << (12 + spi->chip_select);
  52. mpi_cfg.u64 |= p->cs_enax;
  53. if (mpi_cfg.u64 != p->last_cfg) {
  54. p->last_cfg = mpi_cfg.u64;
  55. writeq(mpi_cfg.u64, p->register_base + OCTEON_SPI_CFG(p));
  56. }
  57. tx_buf = xfer->tx_buf;
  58. rx_buf = xfer->rx_buf;
  59. len = xfer->len;
  60. while (len > OCTEON_SPI_MAX_BYTES) {
  61. for (i = 0; i < OCTEON_SPI_MAX_BYTES; i++) {
  62. u8 d;
  63. if (tx_buf)
  64. d = *tx_buf++;
  65. else
  66. d = 0;
  67. writeq(d, p->register_base + OCTEON_SPI_DAT0(p) + (8 * i));
  68. }
  69. mpi_tx.u64 = 0;
  70. mpi_tx.s.csid = spi->chip_select;
  71. mpi_tx.s.leavecs = 1;
  72. mpi_tx.s.txnum = tx_buf ? OCTEON_SPI_MAX_BYTES : 0;
  73. mpi_tx.s.totnum = OCTEON_SPI_MAX_BYTES;
  74. writeq(mpi_tx.u64, p->register_base + OCTEON_SPI_TX(p));
  75. octeon_spi_wait_ready(p);
  76. if (rx_buf)
  77. for (i = 0; i < OCTEON_SPI_MAX_BYTES; i++) {
  78. u64 v = readq(p->register_base + OCTEON_SPI_DAT0(p) + (8 * i));
  79. *rx_buf++ = (u8)v;
  80. }
  81. len -= OCTEON_SPI_MAX_BYTES;
  82. }
  83. for (i = 0; i < len; i++) {
  84. u8 d;
  85. if (tx_buf)
  86. d = *tx_buf++;
  87. else
  88. d = 0;
  89. writeq(d, p->register_base + OCTEON_SPI_DAT0(p) + (8 * i));
  90. }
  91. mpi_tx.u64 = 0;
  92. mpi_tx.s.csid = spi->chip_select;
  93. if (last_xfer)
  94. mpi_tx.s.leavecs = xfer->cs_change;
  95. else
  96. mpi_tx.s.leavecs = !xfer->cs_change;
  97. mpi_tx.s.txnum = tx_buf ? len : 0;
  98. mpi_tx.s.totnum = len;
  99. writeq(mpi_tx.u64, p->register_base + OCTEON_SPI_TX(p));
  100. octeon_spi_wait_ready(p);
  101. if (rx_buf)
  102. for (i = 0; i < len; i++) {
  103. u64 v = readq(p->register_base + OCTEON_SPI_DAT0(p) + (8 * i));
  104. *rx_buf++ = (u8)v;
  105. }
  106. spi_transfer_delay_exec(xfer);
  107. return xfer->len;
  108. }
  109. int octeon_spi_transfer_one_message(struct spi_master *master,
  110. struct spi_message *msg)
  111. {
  112. struct octeon_spi *p = spi_master_get_devdata(master);
  113. unsigned int total_len = 0;
  114. int status = 0;
  115. struct spi_transfer *xfer;
  116. list_for_each_entry(xfer, &msg->transfers, transfer_list) {
  117. bool last_xfer = list_is_last(&xfer->transfer_list,
  118. &msg->transfers);
  119. int r = octeon_spi_do_transfer(p, msg, xfer, last_xfer);
  120. if (r < 0) {
  121. status = r;
  122. goto err;
  123. }
  124. total_len += r;
  125. }
  126. err:
  127. msg->status = status;
  128. msg->actual_length = total_len;
  129. spi_finalize_current_message(master);
  130. return status;
  131. }