intel_init.c 11 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
  2. // Copyright(c) 2015-17 Intel Corporation.
  3. /*
  4. * SDW Intel Init Routines
  5. *
  6. * Initializes and creates SDW devices based on ACPI and Hardware values
  7. */
  8. #include <linux/acpi.h>
  9. #include <linux/export.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/pm_runtime.h>
  15. #include <linux/soundwire/sdw_intel.h>
  16. #include "cadence_master.h"
  17. #include "intel.h"
  18. #define SDW_LINK_TYPE 4 /* from Intel ACPI documentation */
  19. #define SDW_MAX_LINKS 4
  20. #define SDW_SHIM_LCAP 0x0
  21. #define SDW_SHIM_BASE 0x2C000
  22. #define SDW_ALH_BASE 0x2C800
  23. #define SDW_LINK_BASE 0x30000
  24. #define SDW_LINK_SIZE 0x10000
  25. static int ctrl_link_mask;
  26. module_param_named(sdw_link_mask, ctrl_link_mask, int, 0444);
  27. MODULE_PARM_DESC(sdw_link_mask, "Intel link mask (one bit per link)");
  28. static bool is_link_enabled(struct fwnode_handle *fw_node, int i)
  29. {
  30. struct fwnode_handle *link;
  31. char name[32];
  32. u32 quirk_mask = 0;
  33. /* Find master handle */
  34. snprintf(name, sizeof(name),
  35. "mipi-sdw-link-%d-subproperties", i);
  36. link = fwnode_get_named_child_node(fw_node, name);
  37. if (!link)
  38. return false;
  39. fwnode_property_read_u32(link,
  40. "intel-quirk-mask",
  41. &quirk_mask);
  42. if (quirk_mask & SDW_INTEL_QUIRK_MASK_BUS_DISABLE)
  43. return false;
  44. return true;
  45. }
  46. static int sdw_intel_cleanup(struct sdw_intel_ctx *ctx)
  47. {
  48. struct sdw_intel_link_res *link = ctx->links;
  49. u32 link_mask;
  50. int i;
  51. if (!link)
  52. return 0;
  53. link_mask = ctx->link_mask;
  54. for (i = 0; i < ctx->count; i++, link++) {
  55. if (!(link_mask & BIT(i)))
  56. continue;
  57. if (link->pdev) {
  58. pm_runtime_disable(&link->pdev->dev);
  59. platform_device_unregister(link->pdev);
  60. }
  61. if (!link->clock_stop_quirks)
  62. pm_runtime_put_noidle(link->dev);
  63. }
  64. return 0;
  65. }
  66. static int
  67. sdw_intel_scan_controller(struct sdw_intel_acpi_info *info)
  68. {
  69. struct acpi_device *adev;
  70. int ret, i;
  71. u8 count;
  72. if (acpi_bus_get_device(info->handle, &adev))
  73. return -EINVAL;
  74. /* Found controller, find links supported */
  75. count = 0;
  76. ret = fwnode_property_read_u8_array(acpi_fwnode_handle(adev),
  77. "mipi-sdw-master-count", &count, 1);
  78. /*
  79. * In theory we could check the number of links supported in
  80. * hardware, but in that step we cannot assume SoundWire IP is
  81. * powered.
  82. *
  83. * In addition, if the BIOS doesn't even provide this
  84. * 'master-count' property then all the inits based on link
  85. * masks will fail as well.
  86. *
  87. * We will check the hardware capabilities in the startup() step
  88. */
  89. if (ret) {
  90. dev_err(&adev->dev,
  91. "Failed to read mipi-sdw-master-count: %d\n", ret);
  92. return -EINVAL;
  93. }
  94. /* Check count is within bounds */
  95. if (count > SDW_MAX_LINKS) {
  96. dev_err(&adev->dev, "Link count %d exceeds max %d\n",
  97. count, SDW_MAX_LINKS);
  98. return -EINVAL;
  99. }
  100. if (!count) {
  101. dev_warn(&adev->dev, "No SoundWire links detected\n");
  102. return -EINVAL;
  103. }
  104. dev_dbg(&adev->dev, "ACPI reports %d SDW Link devices\n", count);
  105. info->count = count;
  106. info->link_mask = 0;
  107. for (i = 0; i < count; i++) {
  108. if (ctrl_link_mask && !(ctrl_link_mask & BIT(i))) {
  109. dev_dbg(&adev->dev,
  110. "Link %d masked, will not be enabled\n", i);
  111. continue;
  112. }
  113. if (!is_link_enabled(acpi_fwnode_handle(adev), i)) {
  114. dev_dbg(&adev->dev,
  115. "Link %d not selected in firmware\n", i);
  116. continue;
  117. }
  118. info->link_mask |= BIT(i);
  119. }
  120. return 0;
  121. }
  122. #define HDA_DSP_REG_ADSPIC2 (0x10)
  123. #define HDA_DSP_REG_ADSPIS2 (0x14)
  124. #define HDA_DSP_REG_ADSPIC2_SNDW BIT(5)
  125. /**
  126. * sdw_intel_enable_irq() - enable/disable Intel SoundWire IRQ
  127. * @mmio_base: The mmio base of the control register
  128. * @enable: true if enable
  129. */
  130. void sdw_intel_enable_irq(void __iomem *mmio_base, bool enable)
  131. {
  132. u32 val;
  133. val = readl(mmio_base + HDA_DSP_REG_ADSPIC2);
  134. if (enable)
  135. val |= HDA_DSP_REG_ADSPIC2_SNDW;
  136. else
  137. val &= ~HDA_DSP_REG_ADSPIC2_SNDW;
  138. writel(val, mmio_base + HDA_DSP_REG_ADSPIC2);
  139. }
  140. EXPORT_SYMBOL_NS(sdw_intel_enable_irq, SOUNDWIRE_INTEL_INIT);
  141. irqreturn_t sdw_intel_thread(int irq, void *dev_id)
  142. {
  143. struct sdw_intel_ctx *ctx = dev_id;
  144. struct sdw_intel_link_res *link;
  145. list_for_each_entry(link, &ctx->link_list, list)
  146. sdw_cdns_irq(irq, link->cdns);
  147. sdw_intel_enable_irq(ctx->mmio_base, true);
  148. return IRQ_HANDLED;
  149. }
  150. EXPORT_SYMBOL_NS(sdw_intel_thread, SOUNDWIRE_INTEL_INIT);
  151. static struct sdw_intel_ctx
  152. *sdw_intel_probe_controller(struct sdw_intel_res *res)
  153. {
  154. struct platform_device_info pdevinfo;
  155. struct platform_device *pdev;
  156. struct sdw_intel_link_res *link;
  157. struct sdw_intel_ctx *ctx;
  158. struct acpi_device *adev;
  159. struct sdw_slave *slave;
  160. struct list_head *node;
  161. struct sdw_bus *bus;
  162. u32 link_mask;
  163. int num_slaves = 0;
  164. int count;
  165. int i;
  166. if (!res)
  167. return NULL;
  168. if (acpi_bus_get_device(res->handle, &adev))
  169. return NULL;
  170. if (!res->count)
  171. return NULL;
  172. count = res->count;
  173. dev_dbg(&adev->dev, "Creating %d SDW Link devices\n", count);
  174. ctx = devm_kzalloc(&adev->dev, sizeof(*ctx), GFP_KERNEL);
  175. if (!ctx)
  176. return NULL;
  177. ctx->count = count;
  178. ctx->links = devm_kcalloc(&adev->dev, ctx->count,
  179. sizeof(*ctx->links), GFP_KERNEL);
  180. if (!ctx->links)
  181. return NULL;
  182. ctx->count = count;
  183. ctx->mmio_base = res->mmio_base;
  184. ctx->link_mask = res->link_mask;
  185. ctx->handle = res->handle;
  186. mutex_init(&ctx->shim_lock);
  187. link = ctx->links;
  188. link_mask = ctx->link_mask;
  189. INIT_LIST_HEAD(&ctx->link_list);
  190. /* Create SDW Master devices */
  191. for (i = 0; i < count; i++, link++) {
  192. if (!(link_mask & BIT(i))) {
  193. dev_dbg(&adev->dev,
  194. "Link %d masked, will not be enabled\n", i);
  195. continue;
  196. }
  197. link->mmio_base = res->mmio_base;
  198. link->registers = res->mmio_base + SDW_LINK_BASE
  199. + (SDW_LINK_SIZE * i);
  200. link->shim = res->mmio_base + SDW_SHIM_BASE;
  201. link->alh = res->mmio_base + SDW_ALH_BASE;
  202. link->ops = res->ops;
  203. link->dev = res->dev;
  204. link->clock_stop_quirks = res->clock_stop_quirks;
  205. link->shim_lock = &ctx->shim_lock;
  206. link->shim_mask = &ctx->shim_mask;
  207. link->link_mask = link_mask;
  208. memset(&pdevinfo, 0, sizeof(pdevinfo));
  209. pdevinfo.parent = res->parent;
  210. pdevinfo.name = "intel-sdw";
  211. pdevinfo.id = i;
  212. pdevinfo.fwnode = acpi_fwnode_handle(adev);
  213. pdevinfo.data = link;
  214. pdevinfo.size_data = sizeof(*link);
  215. pdev = platform_device_register_full(&pdevinfo);
  216. if (IS_ERR(pdev)) {
  217. dev_err(&adev->dev,
  218. "platform device creation failed: %ld\n",
  219. PTR_ERR(pdev));
  220. goto err;
  221. }
  222. link->pdev = pdev;
  223. link->cdns = platform_get_drvdata(pdev);
  224. list_add_tail(&link->list, &ctx->link_list);
  225. bus = &link->cdns->bus;
  226. /* Calculate number of slaves */
  227. list_for_each(node, &bus->slaves)
  228. num_slaves++;
  229. }
  230. ctx->ids = devm_kcalloc(&adev->dev, num_slaves,
  231. sizeof(*ctx->ids), GFP_KERNEL);
  232. if (!ctx->ids)
  233. goto err;
  234. ctx->num_slaves = num_slaves;
  235. i = 0;
  236. list_for_each_entry(link, &ctx->link_list, list) {
  237. bus = &link->cdns->bus;
  238. list_for_each_entry(slave, &bus->slaves, node) {
  239. ctx->ids[i].id = slave->id;
  240. ctx->ids[i].link_id = bus->link_id;
  241. i++;
  242. }
  243. }
  244. return ctx;
  245. err:
  246. ctx->count = i;
  247. sdw_intel_cleanup(ctx);
  248. return NULL;
  249. }
  250. static int
  251. sdw_intel_startup_controller(struct sdw_intel_ctx *ctx)
  252. {
  253. struct acpi_device *adev;
  254. struct sdw_intel_link_res *link;
  255. u32 caps;
  256. u32 link_mask;
  257. int i;
  258. if (acpi_bus_get_device(ctx->handle, &adev))
  259. return -EINVAL;
  260. /* Check SNDWLCAP.LCOUNT */
  261. caps = ioread32(ctx->mmio_base + SDW_SHIM_BASE + SDW_SHIM_LCAP);
  262. caps &= GENMASK(2, 0);
  263. /* Check HW supported vs property value */
  264. if (caps < ctx->count) {
  265. dev_err(&adev->dev,
  266. "BIOS master count is larger than hardware capabilities\n");
  267. return -EINVAL;
  268. }
  269. if (!ctx->links)
  270. return -EINVAL;
  271. link = ctx->links;
  272. link_mask = ctx->link_mask;
  273. /* Startup SDW Master devices */
  274. for (i = 0; i < ctx->count; i++, link++) {
  275. if (!(link_mask & BIT(i)))
  276. continue;
  277. intel_master_startup(link->pdev);
  278. if (!link->clock_stop_quirks) {
  279. /*
  280. * we need to prevent the parent PCI device
  281. * from entering pm_runtime suspend, so that
  282. * power rails to the SoundWire IP are not
  283. * turned off.
  284. */
  285. pm_runtime_get_noresume(link->dev);
  286. }
  287. }
  288. return 0;
  289. }
  290. static acpi_status sdw_intel_acpi_cb(acpi_handle handle, u32 level,
  291. void *cdata, void **return_value)
  292. {
  293. struct sdw_intel_acpi_info *info = cdata;
  294. struct acpi_device *adev;
  295. acpi_status status;
  296. u64 adr;
  297. status = acpi_evaluate_integer(handle, METHOD_NAME__ADR, NULL, &adr);
  298. if (ACPI_FAILURE(status))
  299. return AE_OK; /* keep going */
  300. if (acpi_bus_get_device(handle, &adev)) {
  301. pr_err("%s: Couldn't find ACPI handle\n", __func__);
  302. return AE_NOT_FOUND;
  303. }
  304. info->handle = handle;
  305. /*
  306. * On some Intel platforms, multiple children of the HDAS
  307. * device can be found, but only one of them is the SoundWire
  308. * controller. The SNDW device is always exposed with
  309. * Name(_ADR, 0x40000000), with bits 31..28 representing the
  310. * SoundWire link so filter accordingly
  311. */
  312. if (FIELD_GET(GENMASK(31, 28), adr) != SDW_LINK_TYPE)
  313. return AE_OK; /* keep going */
  314. /* device found, stop namespace walk */
  315. return AE_CTRL_TERMINATE;
  316. }
  317. /**
  318. * sdw_intel_acpi_scan() - SoundWire Intel init routine
  319. * @parent_handle: ACPI parent handle
  320. * @info: description of what firmware/DSDT tables expose
  321. *
  322. * This scans the namespace and queries firmware to figure out which
  323. * links to enable. A follow-up use of sdw_intel_probe() and
  324. * sdw_intel_startup() is required for creation of devices and bus
  325. * startup
  326. */
  327. int sdw_intel_acpi_scan(acpi_handle *parent_handle,
  328. struct sdw_intel_acpi_info *info)
  329. {
  330. acpi_status status;
  331. info->handle = NULL;
  332. status = acpi_walk_namespace(ACPI_TYPE_DEVICE,
  333. parent_handle, 1,
  334. sdw_intel_acpi_cb,
  335. NULL, info, NULL);
  336. if (ACPI_FAILURE(status) || info->handle == NULL)
  337. return -ENODEV;
  338. return sdw_intel_scan_controller(info);
  339. }
  340. EXPORT_SYMBOL_NS(sdw_intel_acpi_scan, SOUNDWIRE_INTEL_INIT);
  341. /**
  342. * sdw_intel_probe() - SoundWire Intel probe routine
  343. * @res: resource data
  344. *
  345. * This registers a platform device for each Master handled by the controller,
  346. * and SoundWire Master and Slave devices will be created by the platform
  347. * device probe. All the information necessary is stored in the context, and
  348. * the res argument pointer can be freed after this step.
  349. * This function will be called after sdw_intel_acpi_scan() by SOF probe.
  350. */
  351. struct sdw_intel_ctx
  352. *sdw_intel_probe(struct sdw_intel_res *res)
  353. {
  354. return sdw_intel_probe_controller(res);
  355. }
  356. EXPORT_SYMBOL_NS(sdw_intel_probe, SOUNDWIRE_INTEL_INIT);
  357. /**
  358. * sdw_intel_startup() - SoundWire Intel startup
  359. * @ctx: SoundWire context allocated in the probe
  360. *
  361. * Startup Intel SoundWire controller. This function will be called after
  362. * Intel Audio DSP is powered up.
  363. */
  364. int sdw_intel_startup(struct sdw_intel_ctx *ctx)
  365. {
  366. return sdw_intel_startup_controller(ctx);
  367. }
  368. EXPORT_SYMBOL_NS(sdw_intel_startup, SOUNDWIRE_INTEL_INIT);
  369. /**
  370. * sdw_intel_exit() - SoundWire Intel exit
  371. * @ctx: SoundWire context allocated in the probe
  372. *
  373. * Delete the controller instances created and cleanup
  374. */
  375. void sdw_intel_exit(struct sdw_intel_ctx *ctx)
  376. {
  377. sdw_intel_cleanup(ctx);
  378. }
  379. EXPORT_SYMBOL_NS(sdw_intel_exit, SOUNDWIRE_INTEL_INIT);
  380. void sdw_intel_process_wakeen_event(struct sdw_intel_ctx *ctx)
  381. {
  382. struct sdw_intel_link_res *link;
  383. u32 link_mask;
  384. int i;
  385. if (!ctx->links)
  386. return;
  387. link = ctx->links;
  388. link_mask = ctx->link_mask;
  389. /* Startup SDW Master devices */
  390. for (i = 0; i < ctx->count; i++, link++) {
  391. if (!(link_mask & BIT(i)))
  392. continue;
  393. intel_master_process_wakeen_event(link->pdev);
  394. }
  395. }
  396. EXPORT_SYMBOL_NS(sdw_intel_process_wakeen_event, SOUNDWIRE_INTEL_INIT);
  397. MODULE_LICENSE("Dual BSD/GPL");
  398. MODULE_DESCRIPTION("Intel Soundwire Init Library");