bus.c 40 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
  2. // Copyright(c) 2015-17 Intel Corporation.
  3. #include <linux/acpi.h>
  4. #include <linux/delay.h>
  5. #include <linux/mod_devicetable.h>
  6. #include <linux/pm_runtime.h>
  7. #include <linux/soundwire/sdw_registers.h>
  8. #include <linux/soundwire/sdw.h>
  9. #include "bus.h"
  10. #include "sysfs_local.h"
  11. static DEFINE_IDA(sdw_ida);
  12. static int sdw_get_id(struct sdw_bus *bus)
  13. {
  14. int rc = ida_alloc(&sdw_ida, GFP_KERNEL);
  15. if (rc < 0)
  16. return rc;
  17. bus->id = rc;
  18. return 0;
  19. }
  20. /**
  21. * sdw_bus_master_add() - add a bus Master instance
  22. * @bus: bus instance
  23. * @parent: parent device
  24. * @fwnode: firmware node handle
  25. *
  26. * Initializes the bus instance, read properties and create child
  27. * devices.
  28. */
  29. int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent,
  30. struct fwnode_handle *fwnode)
  31. {
  32. struct sdw_master_prop *prop = NULL;
  33. int ret;
  34. if (!parent) {
  35. pr_err("SoundWire parent device is not set\n");
  36. return -ENODEV;
  37. }
  38. ret = sdw_get_id(bus);
  39. if (ret) {
  40. dev_err(parent, "Failed to get bus id\n");
  41. return ret;
  42. }
  43. ret = sdw_master_device_add(bus, parent, fwnode);
  44. if (ret) {
  45. dev_err(parent, "Failed to add master device at link %d\n",
  46. bus->link_id);
  47. return ret;
  48. }
  49. if (!bus->ops) {
  50. dev_err(bus->dev, "SoundWire Bus ops are not set\n");
  51. return -EINVAL;
  52. }
  53. if (!bus->compute_params) {
  54. dev_err(bus->dev,
  55. "Bandwidth allocation not configured, compute_params no set\n");
  56. return -EINVAL;
  57. }
  58. mutex_init(&bus->msg_lock);
  59. mutex_init(&bus->bus_lock);
  60. INIT_LIST_HEAD(&bus->slaves);
  61. INIT_LIST_HEAD(&bus->m_rt_list);
  62. /*
  63. * Initialize multi_link flag
  64. * TODO: populate this flag by reading property from FW node
  65. */
  66. bus->multi_link = false;
  67. if (bus->ops->read_prop) {
  68. ret = bus->ops->read_prop(bus);
  69. if (ret < 0) {
  70. dev_err(bus->dev,
  71. "Bus read properties failed:%d\n", ret);
  72. return ret;
  73. }
  74. }
  75. sdw_bus_debugfs_init(bus);
  76. /*
  77. * Device numbers in SoundWire are 0 through 15. Enumeration device
  78. * number (0), Broadcast device number (15), Group numbers (12 and
  79. * 13) and Master device number (14) are not used for assignment so
  80. * mask these and other higher bits.
  81. */
  82. /* Set higher order bits */
  83. *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM);
  84. /* Set enumuration device number and broadcast device number */
  85. set_bit(SDW_ENUM_DEV_NUM, bus->assigned);
  86. set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned);
  87. /* Set group device numbers and master device number */
  88. set_bit(SDW_GROUP12_DEV_NUM, bus->assigned);
  89. set_bit(SDW_GROUP13_DEV_NUM, bus->assigned);
  90. set_bit(SDW_MASTER_DEV_NUM, bus->assigned);
  91. /*
  92. * SDW is an enumerable bus, but devices can be powered off. So,
  93. * they won't be able to report as present.
  94. *
  95. * Create Slave devices based on Slaves described in
  96. * the respective firmware (ACPI/DT)
  97. */
  98. if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev))
  99. ret = sdw_acpi_find_slaves(bus);
  100. else if (IS_ENABLED(CONFIG_OF) && bus->dev->of_node)
  101. ret = sdw_of_find_slaves(bus);
  102. else
  103. ret = -ENOTSUPP; /* No ACPI/DT so error out */
  104. if (ret) {
  105. dev_err(bus->dev, "Finding slaves failed:%d\n", ret);
  106. return ret;
  107. }
  108. /*
  109. * Initialize clock values based on Master properties. The max
  110. * frequency is read from max_clk_freq property. Current assumption
  111. * is that the bus will start at highest clock frequency when
  112. * powered on.
  113. *
  114. * Default active bank will be 0 as out of reset the Slaves have
  115. * to start with bank 0 (Table 40 of Spec)
  116. */
  117. prop = &bus->prop;
  118. bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR;
  119. bus->params.curr_dr_freq = bus->params.max_dr_freq;
  120. bus->params.curr_bank = SDW_BANK0;
  121. bus->params.next_bank = SDW_BANK1;
  122. return 0;
  123. }
  124. EXPORT_SYMBOL(sdw_bus_master_add);
  125. static int sdw_delete_slave(struct device *dev, void *data)
  126. {
  127. struct sdw_slave *slave = dev_to_sdw_dev(dev);
  128. struct sdw_bus *bus = slave->bus;
  129. pm_runtime_disable(dev);
  130. sdw_slave_debugfs_exit(slave);
  131. mutex_lock(&bus->bus_lock);
  132. if (slave->dev_num) /* clear dev_num if assigned */
  133. clear_bit(slave->dev_num, bus->assigned);
  134. list_del_init(&slave->node);
  135. mutex_unlock(&bus->bus_lock);
  136. device_unregister(dev);
  137. return 0;
  138. }
  139. /**
  140. * sdw_bus_master_delete() - delete the bus master instance
  141. * @bus: bus to be deleted
  142. *
  143. * Remove the instance, delete the child devices.
  144. */
  145. void sdw_bus_master_delete(struct sdw_bus *bus)
  146. {
  147. device_for_each_child(bus->dev, NULL, sdw_delete_slave);
  148. sdw_master_device_del(bus);
  149. sdw_bus_debugfs_exit(bus);
  150. ida_free(&sdw_ida, bus->id);
  151. }
  152. EXPORT_SYMBOL(sdw_bus_master_delete);
  153. /*
  154. * SDW IO Calls
  155. */
  156. static inline int find_response_code(enum sdw_command_response resp)
  157. {
  158. switch (resp) {
  159. case SDW_CMD_OK:
  160. return 0;
  161. case SDW_CMD_IGNORED:
  162. return -ENODATA;
  163. case SDW_CMD_TIMEOUT:
  164. return -ETIMEDOUT;
  165. default:
  166. return -EIO;
  167. }
  168. }
  169. static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
  170. {
  171. int retry = bus->prop.err_threshold;
  172. enum sdw_command_response resp;
  173. int ret = 0, i;
  174. for (i = 0; i <= retry; i++) {
  175. resp = bus->ops->xfer_msg(bus, msg);
  176. ret = find_response_code(resp);
  177. /* if cmd is ok or ignored return */
  178. if (ret == 0 || ret == -ENODATA)
  179. return ret;
  180. }
  181. return ret;
  182. }
  183. static inline int do_transfer_defer(struct sdw_bus *bus,
  184. struct sdw_msg *msg,
  185. struct sdw_defer *defer)
  186. {
  187. int retry = bus->prop.err_threshold;
  188. enum sdw_command_response resp;
  189. int ret = 0, i;
  190. defer->msg = msg;
  191. defer->length = msg->len;
  192. init_completion(&defer->complete);
  193. for (i = 0; i <= retry; i++) {
  194. resp = bus->ops->xfer_msg_defer(bus, msg, defer);
  195. ret = find_response_code(resp);
  196. /* if cmd is ok or ignored return */
  197. if (ret == 0 || ret == -ENODATA)
  198. return ret;
  199. }
  200. return ret;
  201. }
  202. static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num)
  203. {
  204. int retry = bus->prop.err_threshold;
  205. enum sdw_command_response resp;
  206. int ret = 0, i;
  207. for (i = 0; i <= retry; i++) {
  208. resp = bus->ops->reset_page_addr(bus, dev_num);
  209. ret = find_response_code(resp);
  210. /* if cmd is ok or ignored return */
  211. if (ret == 0 || ret == -ENODATA)
  212. return ret;
  213. }
  214. return ret;
  215. }
  216. static int sdw_transfer_unlocked(struct sdw_bus *bus, struct sdw_msg *msg)
  217. {
  218. int ret;
  219. ret = do_transfer(bus, msg);
  220. if (ret != 0 && ret != -ENODATA)
  221. dev_err(bus->dev, "trf on Slave %d failed:%d\n",
  222. msg->dev_num, ret);
  223. if (msg->page)
  224. sdw_reset_page(bus, msg->dev_num);
  225. return ret;
  226. }
  227. /**
  228. * sdw_transfer() - Synchronous transfer message to a SDW Slave device
  229. * @bus: SDW bus
  230. * @msg: SDW message to be xfered
  231. */
  232. int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
  233. {
  234. int ret;
  235. mutex_lock(&bus->msg_lock);
  236. ret = sdw_transfer_unlocked(bus, msg);
  237. mutex_unlock(&bus->msg_lock);
  238. return ret;
  239. }
  240. /**
  241. * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device
  242. * @bus: SDW bus
  243. * @msg: SDW message to be xfered
  244. * @defer: Defer block for signal completion
  245. *
  246. * Caller needs to hold the msg_lock lock while calling this
  247. */
  248. int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg,
  249. struct sdw_defer *defer)
  250. {
  251. int ret;
  252. if (!bus->ops->xfer_msg_defer)
  253. return -ENOTSUPP;
  254. ret = do_transfer_defer(bus, msg, defer);
  255. if (ret != 0 && ret != -ENODATA)
  256. dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n",
  257. msg->dev_num, ret);
  258. if (msg->page)
  259. sdw_reset_page(bus, msg->dev_num);
  260. return ret;
  261. }
  262. int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
  263. u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf)
  264. {
  265. memset(msg, 0, sizeof(*msg));
  266. msg->addr = addr; /* addr is 16 bit and truncated here */
  267. msg->len = count;
  268. msg->dev_num = dev_num;
  269. msg->flags = flags;
  270. msg->buf = buf;
  271. if (addr < SDW_REG_NO_PAGE) /* no paging area */
  272. return 0;
  273. if (addr >= SDW_REG_MAX) { /* illegal addr */
  274. pr_err("SDW: Invalid address %x passed\n", addr);
  275. return -EINVAL;
  276. }
  277. if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */
  278. if (slave && !slave->prop.paging_support)
  279. return 0;
  280. /* no need for else as that will fall-through to paging */
  281. }
  282. /* paging mandatory */
  283. if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) {
  284. pr_err("SDW: Invalid device for paging :%d\n", dev_num);
  285. return -EINVAL;
  286. }
  287. if (!slave) {
  288. pr_err("SDW: No slave for paging addr\n");
  289. return -EINVAL;
  290. }
  291. if (!slave->prop.paging_support) {
  292. dev_err(&slave->dev,
  293. "address %x needs paging but no support\n", addr);
  294. return -EINVAL;
  295. }
  296. msg->addr_page1 = FIELD_GET(SDW_SCP_ADDRPAGE1_MASK, addr);
  297. msg->addr_page2 = FIELD_GET(SDW_SCP_ADDRPAGE2_MASK, addr);
  298. msg->addr |= BIT(15);
  299. msg->page = true;
  300. return 0;
  301. }
  302. /*
  303. * Read/Write IO functions.
  304. * no_pm versions can only be called by the bus, e.g. while enumerating or
  305. * handling suspend-resume sequences.
  306. * all clients need to use the pm versions
  307. */
  308. static int
  309. sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
  310. {
  311. struct sdw_msg msg;
  312. int ret;
  313. ret = sdw_fill_msg(&msg, slave, addr, count,
  314. slave->dev_num, SDW_MSG_FLAG_READ, val);
  315. if (ret < 0)
  316. return ret;
  317. return sdw_transfer(slave->bus, &msg);
  318. }
  319. static int
  320. sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
  321. {
  322. struct sdw_msg msg;
  323. int ret;
  324. ret = sdw_fill_msg(&msg, slave, addr, count,
  325. slave->dev_num, SDW_MSG_FLAG_WRITE, val);
  326. if (ret < 0)
  327. return ret;
  328. return sdw_transfer(slave->bus, &msg);
  329. }
  330. int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value)
  331. {
  332. return sdw_nwrite_no_pm(slave, addr, 1, &value);
  333. }
  334. EXPORT_SYMBOL(sdw_write_no_pm);
  335. static int
  336. sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr)
  337. {
  338. struct sdw_msg msg;
  339. u8 buf;
  340. int ret;
  341. ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
  342. SDW_MSG_FLAG_READ, &buf);
  343. if (ret)
  344. return ret;
  345. ret = sdw_transfer(bus, &msg);
  346. if (ret < 0)
  347. return ret;
  348. return buf;
  349. }
  350. static int
  351. sdw_bwrite_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
  352. {
  353. struct sdw_msg msg;
  354. int ret;
  355. ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
  356. SDW_MSG_FLAG_WRITE, &value);
  357. if (ret)
  358. return ret;
  359. return sdw_transfer(bus, &msg);
  360. }
  361. int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr)
  362. {
  363. struct sdw_msg msg;
  364. u8 buf;
  365. int ret;
  366. ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
  367. SDW_MSG_FLAG_READ, &buf);
  368. if (ret)
  369. return ret;
  370. ret = sdw_transfer_unlocked(bus, &msg);
  371. if (ret < 0)
  372. return ret;
  373. return buf;
  374. }
  375. EXPORT_SYMBOL(sdw_bread_no_pm_unlocked);
  376. int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
  377. {
  378. struct sdw_msg msg;
  379. int ret;
  380. ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
  381. SDW_MSG_FLAG_WRITE, &value);
  382. if (ret)
  383. return ret;
  384. return sdw_transfer_unlocked(bus, &msg);
  385. }
  386. EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked);
  387. int sdw_read_no_pm(struct sdw_slave *slave, u32 addr)
  388. {
  389. u8 buf;
  390. int ret;
  391. ret = sdw_nread_no_pm(slave, addr, 1, &buf);
  392. if (ret < 0)
  393. return ret;
  394. else
  395. return buf;
  396. }
  397. EXPORT_SYMBOL(sdw_read_no_pm);
  398. static int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
  399. {
  400. int tmp;
  401. tmp = sdw_read_no_pm(slave, addr);
  402. if (tmp < 0)
  403. return tmp;
  404. tmp = (tmp & ~mask) | val;
  405. return sdw_write_no_pm(slave, addr, tmp);
  406. }
  407. /**
  408. * sdw_nread() - Read "n" contiguous SDW Slave registers
  409. * @slave: SDW Slave
  410. * @addr: Register address
  411. * @count: length
  412. * @val: Buffer for values to be read
  413. */
  414. int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
  415. {
  416. int ret;
  417. ret = pm_runtime_get_sync(&slave->dev);
  418. if (ret < 0 && ret != -EACCES) {
  419. pm_runtime_put_noidle(&slave->dev);
  420. return ret;
  421. }
  422. ret = sdw_nread_no_pm(slave, addr, count, val);
  423. pm_runtime_mark_last_busy(&slave->dev);
  424. pm_runtime_put(&slave->dev);
  425. return ret;
  426. }
  427. EXPORT_SYMBOL(sdw_nread);
  428. /**
  429. * sdw_nwrite() - Write "n" contiguous SDW Slave registers
  430. * @slave: SDW Slave
  431. * @addr: Register address
  432. * @count: length
  433. * @val: Buffer for values to be read
  434. */
  435. int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
  436. {
  437. int ret;
  438. ret = pm_runtime_get_sync(&slave->dev);
  439. if (ret < 0 && ret != -EACCES) {
  440. pm_runtime_put_noidle(&slave->dev);
  441. return ret;
  442. }
  443. ret = sdw_nwrite_no_pm(slave, addr, count, val);
  444. pm_runtime_mark_last_busy(&slave->dev);
  445. pm_runtime_put(&slave->dev);
  446. return ret;
  447. }
  448. EXPORT_SYMBOL(sdw_nwrite);
  449. /**
  450. * sdw_read() - Read a SDW Slave register
  451. * @slave: SDW Slave
  452. * @addr: Register address
  453. */
  454. int sdw_read(struct sdw_slave *slave, u32 addr)
  455. {
  456. u8 buf;
  457. int ret;
  458. ret = sdw_nread(slave, addr, 1, &buf);
  459. if (ret < 0)
  460. return ret;
  461. return buf;
  462. }
  463. EXPORT_SYMBOL(sdw_read);
  464. /**
  465. * sdw_write() - Write a SDW Slave register
  466. * @slave: SDW Slave
  467. * @addr: Register address
  468. * @value: Register value
  469. */
  470. int sdw_write(struct sdw_slave *slave, u32 addr, u8 value)
  471. {
  472. return sdw_nwrite(slave, addr, 1, &value);
  473. }
  474. EXPORT_SYMBOL(sdw_write);
  475. /*
  476. * SDW alert handling
  477. */
  478. /* called with bus_lock held */
  479. static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i)
  480. {
  481. struct sdw_slave *slave = NULL;
  482. list_for_each_entry(slave, &bus->slaves, node) {
  483. if (slave->dev_num == i)
  484. return slave;
  485. }
  486. return NULL;
  487. }
  488. static int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id)
  489. {
  490. if (slave->id.mfg_id != id.mfg_id ||
  491. slave->id.part_id != id.part_id ||
  492. slave->id.class_id != id.class_id ||
  493. (slave->id.unique_id != SDW_IGNORED_UNIQUE_ID &&
  494. slave->id.unique_id != id.unique_id))
  495. return -ENODEV;
  496. return 0;
  497. }
  498. /* called with bus_lock held */
  499. static int sdw_get_device_num(struct sdw_slave *slave)
  500. {
  501. int bit;
  502. bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES);
  503. if (bit == SDW_MAX_DEVICES) {
  504. bit = -ENODEV;
  505. goto err;
  506. }
  507. /*
  508. * Do not update dev_num in Slave data structure here,
  509. * Update once program dev_num is successful
  510. */
  511. set_bit(bit, slave->bus->assigned);
  512. err:
  513. return bit;
  514. }
  515. static int sdw_assign_device_num(struct sdw_slave *slave)
  516. {
  517. int ret, dev_num;
  518. bool new_device = false;
  519. /* check first if device number is assigned, if so reuse that */
  520. if (!slave->dev_num) {
  521. if (!slave->dev_num_sticky) {
  522. mutex_lock(&slave->bus->bus_lock);
  523. dev_num = sdw_get_device_num(slave);
  524. mutex_unlock(&slave->bus->bus_lock);
  525. if (dev_num < 0) {
  526. dev_err(slave->bus->dev, "Get dev_num failed: %d\n",
  527. dev_num);
  528. return dev_num;
  529. }
  530. slave->dev_num = dev_num;
  531. slave->dev_num_sticky = dev_num;
  532. new_device = true;
  533. } else {
  534. slave->dev_num = slave->dev_num_sticky;
  535. }
  536. }
  537. if (!new_device)
  538. dev_dbg(slave->bus->dev,
  539. "Slave already registered, reusing dev_num:%d\n",
  540. slave->dev_num);
  541. /* Clear the slave->dev_num to transfer message on device 0 */
  542. dev_num = slave->dev_num;
  543. slave->dev_num = 0;
  544. ret = sdw_write_no_pm(slave, SDW_SCP_DEVNUMBER, dev_num);
  545. if (ret < 0) {
  546. dev_err(&slave->dev, "Program device_num %d failed: %d\n",
  547. dev_num, ret);
  548. return ret;
  549. }
  550. /* After xfer of msg, restore dev_num */
  551. slave->dev_num = slave->dev_num_sticky;
  552. return 0;
  553. }
  554. void sdw_extract_slave_id(struct sdw_bus *bus,
  555. u64 addr, struct sdw_slave_id *id)
  556. {
  557. dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr);
  558. id->sdw_version = SDW_VERSION(addr);
  559. id->unique_id = SDW_UNIQUE_ID(addr);
  560. id->mfg_id = SDW_MFG_ID(addr);
  561. id->part_id = SDW_PART_ID(addr);
  562. id->class_id = SDW_CLASS_ID(addr);
  563. dev_dbg(bus->dev,
  564. "SDW Slave class_id %x, part_id %x, mfg_id %x, unique_id %x, version %x\n",
  565. id->class_id, id->part_id, id->mfg_id,
  566. id->unique_id, id->sdw_version);
  567. }
  568. static int sdw_program_device_num(struct sdw_bus *bus)
  569. {
  570. u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0};
  571. struct sdw_slave *slave, *_s;
  572. struct sdw_slave_id id;
  573. struct sdw_msg msg;
  574. bool found;
  575. int count = 0, ret;
  576. u64 addr;
  577. /* No Slave, so use raw xfer api */
  578. ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0,
  579. SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf);
  580. if (ret < 0)
  581. return ret;
  582. do {
  583. ret = sdw_transfer(bus, &msg);
  584. if (ret == -ENODATA) { /* end of device id reads */
  585. dev_dbg(bus->dev, "No more devices to enumerate\n");
  586. ret = 0;
  587. break;
  588. }
  589. if (ret < 0) {
  590. dev_err(bus->dev, "DEVID read fail:%d\n", ret);
  591. break;
  592. }
  593. /*
  594. * Construct the addr and extract. Cast the higher shift
  595. * bits to avoid truncation due to size limit.
  596. */
  597. addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) |
  598. ((u64)buf[2] << 24) | ((u64)buf[1] << 32) |
  599. ((u64)buf[0] << 40);
  600. sdw_extract_slave_id(bus, addr, &id);
  601. found = false;
  602. /* Now compare with entries */
  603. list_for_each_entry_safe(slave, _s, &bus->slaves, node) {
  604. if (sdw_compare_devid(slave, id) == 0) {
  605. found = true;
  606. /*
  607. * Assign a new dev_num to this Slave and
  608. * not mark it present. It will be marked
  609. * present after it reports ATTACHED on new
  610. * dev_num
  611. */
  612. ret = sdw_assign_device_num(slave);
  613. if (ret) {
  614. dev_err(slave->bus->dev,
  615. "Assign dev_num failed:%d\n",
  616. ret);
  617. return ret;
  618. }
  619. break;
  620. }
  621. }
  622. if (!found) {
  623. /* TODO: Park this device in Group 13 */
  624. /*
  625. * add Slave device even if there is no platform
  626. * firmware description. There will be no driver probe
  627. * but the user/integration will be able to see the
  628. * device, enumeration status and device number in sysfs
  629. */
  630. sdw_slave_add(bus, &id, NULL);
  631. dev_err(bus->dev, "Slave Entry not found\n");
  632. }
  633. count++;
  634. /*
  635. * Check till error out or retry (count) exhausts.
  636. * Device can drop off and rejoin during enumeration
  637. * so count till twice the bound.
  638. */
  639. } while (ret == 0 && count < (SDW_MAX_DEVICES * 2));
  640. return ret;
  641. }
  642. static void sdw_modify_slave_status(struct sdw_slave *slave,
  643. enum sdw_slave_status status)
  644. {
  645. mutex_lock(&slave->bus->bus_lock);
  646. dev_vdbg(&slave->dev,
  647. "%s: changing status slave %d status %d new status %d\n",
  648. __func__, slave->dev_num, slave->status, status);
  649. if (status == SDW_SLAVE_UNATTACHED) {
  650. dev_dbg(&slave->dev,
  651. "%s: initializing completion for Slave %d\n",
  652. __func__, slave->dev_num);
  653. init_completion(&slave->enumeration_complete);
  654. init_completion(&slave->initialization_complete);
  655. } else if ((status == SDW_SLAVE_ATTACHED) &&
  656. (slave->status == SDW_SLAVE_UNATTACHED)) {
  657. dev_dbg(&slave->dev,
  658. "%s: signaling completion for Slave %d\n",
  659. __func__, slave->dev_num);
  660. complete(&slave->enumeration_complete);
  661. }
  662. slave->status = status;
  663. mutex_unlock(&slave->bus->bus_lock);
  664. }
  665. static enum sdw_clk_stop_mode sdw_get_clk_stop_mode(struct sdw_slave *slave)
  666. {
  667. enum sdw_clk_stop_mode mode;
  668. /*
  669. * Query for clock stop mode if Slave implements
  670. * ops->get_clk_stop_mode, else read from property.
  671. */
  672. if (slave->ops && slave->ops->get_clk_stop_mode) {
  673. mode = slave->ops->get_clk_stop_mode(slave);
  674. } else {
  675. if (slave->prop.clk_stop_mode1)
  676. mode = SDW_CLK_STOP_MODE1;
  677. else
  678. mode = SDW_CLK_STOP_MODE0;
  679. }
  680. return mode;
  681. }
  682. static int sdw_slave_clk_stop_callback(struct sdw_slave *slave,
  683. enum sdw_clk_stop_mode mode,
  684. enum sdw_clk_stop_type type)
  685. {
  686. int ret;
  687. if (slave->ops && slave->ops->clk_stop) {
  688. ret = slave->ops->clk_stop(slave, mode, type);
  689. if (ret < 0) {
  690. dev_err(&slave->dev,
  691. "Clk Stop type =%d failed: %d\n", type, ret);
  692. return ret;
  693. }
  694. }
  695. return 0;
  696. }
  697. static int sdw_slave_clk_stop_prepare(struct sdw_slave *slave,
  698. enum sdw_clk_stop_mode mode,
  699. bool prepare)
  700. {
  701. bool wake_en;
  702. u32 val = 0;
  703. int ret;
  704. wake_en = slave->prop.wake_capable;
  705. if (prepare) {
  706. val = SDW_SCP_SYSTEMCTRL_CLK_STP_PREP;
  707. if (mode == SDW_CLK_STOP_MODE1)
  708. val |= SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1;
  709. if (wake_en)
  710. val |= SDW_SCP_SYSTEMCTRL_WAKE_UP_EN;
  711. } else {
  712. val = sdw_read_no_pm(slave, SDW_SCP_SYSTEMCTRL);
  713. val &= ~(SDW_SCP_SYSTEMCTRL_CLK_STP_PREP);
  714. }
  715. ret = sdw_write_no_pm(slave, SDW_SCP_SYSTEMCTRL, val);
  716. if (ret != 0)
  717. dev_err(&slave->dev,
  718. "Clock Stop prepare failed for slave: %d", ret);
  719. return ret;
  720. }
  721. static int sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus *bus, u16 dev_num)
  722. {
  723. int retry = bus->clk_stop_timeout;
  724. int val;
  725. do {
  726. val = sdw_bread_no_pm(bus, dev_num, SDW_SCP_STAT) &
  727. SDW_SCP_STAT_CLK_STP_NF;
  728. if (!val) {
  729. dev_info(bus->dev, "clock stop prep/de-prep done slave:%d",
  730. dev_num);
  731. return 0;
  732. }
  733. usleep_range(1000, 1500);
  734. retry--;
  735. } while (retry);
  736. dev_err(bus->dev, "clock stop prep/de-prep failed slave:%d",
  737. dev_num);
  738. return -ETIMEDOUT;
  739. }
  740. /**
  741. * sdw_bus_prep_clk_stop: prepare Slave(s) for clock stop
  742. *
  743. * @bus: SDW bus instance
  744. *
  745. * Query Slave for clock stop mode and prepare for that mode.
  746. */
  747. int sdw_bus_prep_clk_stop(struct sdw_bus *bus)
  748. {
  749. enum sdw_clk_stop_mode slave_mode;
  750. bool simple_clk_stop = true;
  751. struct sdw_slave *slave;
  752. bool is_slave = false;
  753. int ret = 0;
  754. /*
  755. * In order to save on transition time, prepare
  756. * each Slave and then wait for all Slave(s) to be
  757. * prepared for clock stop.
  758. */
  759. list_for_each_entry(slave, &bus->slaves, node) {
  760. if (!slave->dev_num)
  761. continue;
  762. if (slave->status != SDW_SLAVE_ATTACHED &&
  763. slave->status != SDW_SLAVE_ALERT)
  764. continue;
  765. /* Identify if Slave(s) are available on Bus */
  766. is_slave = true;
  767. slave_mode = sdw_get_clk_stop_mode(slave);
  768. slave->curr_clk_stop_mode = slave_mode;
  769. ret = sdw_slave_clk_stop_callback(slave, slave_mode,
  770. SDW_CLK_PRE_PREPARE);
  771. if (ret < 0) {
  772. dev_err(&slave->dev,
  773. "pre-prepare failed:%d", ret);
  774. return ret;
  775. }
  776. ret = sdw_slave_clk_stop_prepare(slave,
  777. slave_mode, true);
  778. if (ret < 0) {
  779. dev_err(&slave->dev,
  780. "pre-prepare failed:%d", ret);
  781. return ret;
  782. }
  783. if (slave_mode == SDW_CLK_STOP_MODE1)
  784. simple_clk_stop = false;
  785. }
  786. if (is_slave && !simple_clk_stop) {
  787. ret = sdw_bus_wait_for_clk_prep_deprep(bus,
  788. SDW_BROADCAST_DEV_NUM);
  789. if (ret < 0)
  790. return ret;
  791. }
  792. /* Don't need to inform slaves if there is no slave attached */
  793. if (!is_slave)
  794. return ret;
  795. /* Inform slaves that prep is done */
  796. list_for_each_entry(slave, &bus->slaves, node) {
  797. if (!slave->dev_num)
  798. continue;
  799. if (slave->status != SDW_SLAVE_ATTACHED &&
  800. slave->status != SDW_SLAVE_ALERT)
  801. continue;
  802. slave_mode = slave->curr_clk_stop_mode;
  803. if (slave_mode == SDW_CLK_STOP_MODE1) {
  804. ret = sdw_slave_clk_stop_callback(slave,
  805. slave_mode,
  806. SDW_CLK_POST_PREPARE);
  807. if (ret < 0) {
  808. dev_err(&slave->dev,
  809. "post-prepare failed:%d", ret);
  810. }
  811. }
  812. }
  813. return ret;
  814. }
  815. EXPORT_SYMBOL(sdw_bus_prep_clk_stop);
  816. /**
  817. * sdw_bus_clk_stop: stop bus clock
  818. *
  819. * @bus: SDW bus instance
  820. *
  821. * After preparing the Slaves for clock stop, stop the clock by broadcasting
  822. * write to SCP_CTRL register.
  823. */
  824. int sdw_bus_clk_stop(struct sdw_bus *bus)
  825. {
  826. int ret;
  827. /*
  828. * broadcast clock stop now, attached Slaves will ACK this,
  829. * unattached will ignore
  830. */
  831. ret = sdw_bwrite_no_pm(bus, SDW_BROADCAST_DEV_NUM,
  832. SDW_SCP_CTRL, SDW_SCP_CTRL_CLK_STP_NOW);
  833. if (ret < 0) {
  834. if (ret == -ENODATA)
  835. dev_dbg(bus->dev,
  836. "ClockStopNow Broadcast msg ignored %d", ret);
  837. else
  838. dev_err(bus->dev,
  839. "ClockStopNow Broadcast msg failed %d", ret);
  840. return ret;
  841. }
  842. return 0;
  843. }
  844. EXPORT_SYMBOL(sdw_bus_clk_stop);
  845. /**
  846. * sdw_bus_exit_clk_stop: Exit clock stop mode
  847. *
  848. * @bus: SDW bus instance
  849. *
  850. * This De-prepares the Slaves by exiting Clock Stop Mode 0. For the Slaves
  851. * exiting Clock Stop Mode 1, they will be de-prepared after they enumerate
  852. * back.
  853. */
  854. int sdw_bus_exit_clk_stop(struct sdw_bus *bus)
  855. {
  856. enum sdw_clk_stop_mode mode;
  857. bool simple_clk_stop = true;
  858. struct sdw_slave *slave;
  859. bool is_slave = false;
  860. int ret;
  861. /*
  862. * In order to save on transition time, de-prepare
  863. * each Slave and then wait for all Slave(s) to be
  864. * de-prepared after clock resume.
  865. */
  866. list_for_each_entry(slave, &bus->slaves, node) {
  867. if (!slave->dev_num)
  868. continue;
  869. if (slave->status != SDW_SLAVE_ATTACHED &&
  870. slave->status != SDW_SLAVE_ALERT)
  871. continue;
  872. /* Identify if Slave(s) are available on Bus */
  873. is_slave = true;
  874. mode = slave->curr_clk_stop_mode;
  875. if (mode == SDW_CLK_STOP_MODE1) {
  876. simple_clk_stop = false;
  877. continue;
  878. }
  879. ret = sdw_slave_clk_stop_callback(slave, mode,
  880. SDW_CLK_PRE_DEPREPARE);
  881. if (ret < 0)
  882. dev_warn(&slave->dev,
  883. "clk stop deprep failed:%d", ret);
  884. ret = sdw_slave_clk_stop_prepare(slave, mode,
  885. false);
  886. if (ret < 0)
  887. dev_warn(&slave->dev,
  888. "clk stop deprep failed:%d", ret);
  889. }
  890. if (is_slave && !simple_clk_stop)
  891. sdw_bus_wait_for_clk_prep_deprep(bus, SDW_BROADCAST_DEV_NUM);
  892. /*
  893. * Don't need to call slave callback function if there is no slave
  894. * attached
  895. */
  896. if (!is_slave)
  897. return 0;
  898. list_for_each_entry(slave, &bus->slaves, node) {
  899. if (!slave->dev_num)
  900. continue;
  901. if (slave->status != SDW_SLAVE_ATTACHED &&
  902. slave->status != SDW_SLAVE_ALERT)
  903. continue;
  904. mode = slave->curr_clk_stop_mode;
  905. sdw_slave_clk_stop_callback(slave, mode,
  906. SDW_CLK_POST_DEPREPARE);
  907. }
  908. return 0;
  909. }
  910. EXPORT_SYMBOL(sdw_bus_exit_clk_stop);
  911. int sdw_configure_dpn_intr(struct sdw_slave *slave,
  912. int port, bool enable, int mask)
  913. {
  914. u32 addr;
  915. int ret;
  916. u8 val = 0;
  917. if (slave->bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL) {
  918. dev_dbg(&slave->dev, "TEST FAIL interrupt %s\n",
  919. enable ? "on" : "off");
  920. mask |= SDW_DPN_INT_TEST_FAIL;
  921. }
  922. addr = SDW_DPN_INTMASK(port);
  923. /* Set/Clear port ready interrupt mask */
  924. if (enable) {
  925. val |= mask;
  926. val |= SDW_DPN_INT_PORT_READY;
  927. } else {
  928. val &= ~(mask);
  929. val &= ~SDW_DPN_INT_PORT_READY;
  930. }
  931. ret = sdw_update(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val);
  932. if (ret < 0)
  933. dev_err(slave->bus->dev,
  934. "SDW_DPN_INTMASK write failed:%d\n", val);
  935. return ret;
  936. }
  937. static int sdw_slave_set_frequency(struct sdw_slave *slave)
  938. {
  939. u32 mclk_freq = slave->bus->prop.mclk_freq;
  940. u32 curr_freq = slave->bus->params.curr_dr_freq >> 1;
  941. unsigned int scale;
  942. u8 scale_index;
  943. u8 base;
  944. int ret;
  945. /*
  946. * frequency base and scale registers are required for SDCA
  947. * devices. They may also be used for 1.2+/non-SDCA devices,
  948. * but we will need a DisCo property to cover this case
  949. */
  950. if (!slave->id.class_id)
  951. return 0;
  952. if (!mclk_freq) {
  953. dev_err(&slave->dev,
  954. "no bus MCLK, cannot set SDW_SCP_BUS_CLOCK_BASE\n");
  955. return -EINVAL;
  956. }
  957. /*
  958. * map base frequency using Table 89 of SoundWire 1.2 spec.
  959. * The order of the tests just follows the specification, this
  960. * is not a selection between possible values or a search for
  961. * the best value but just a mapping. Only one case per platform
  962. * is relevant.
  963. * Some BIOS have inconsistent values for mclk_freq but a
  964. * correct root so we force the mclk_freq to avoid variations.
  965. */
  966. if (!(19200000 % mclk_freq)) {
  967. mclk_freq = 19200000;
  968. base = SDW_SCP_BASE_CLOCK_19200000_HZ;
  969. } else if (!(24000000 % mclk_freq)) {
  970. mclk_freq = 24000000;
  971. base = SDW_SCP_BASE_CLOCK_24000000_HZ;
  972. } else if (!(24576000 % mclk_freq)) {
  973. mclk_freq = 24576000;
  974. base = SDW_SCP_BASE_CLOCK_24576000_HZ;
  975. } else if (!(22579200 % mclk_freq)) {
  976. mclk_freq = 22579200;
  977. base = SDW_SCP_BASE_CLOCK_22579200_HZ;
  978. } else if (!(32000000 % mclk_freq)) {
  979. mclk_freq = 32000000;
  980. base = SDW_SCP_BASE_CLOCK_32000000_HZ;
  981. } else {
  982. dev_err(&slave->dev,
  983. "Unsupported clock base, mclk %d\n",
  984. mclk_freq);
  985. return -EINVAL;
  986. }
  987. if (mclk_freq % curr_freq) {
  988. dev_err(&slave->dev,
  989. "mclk %d is not multiple of bus curr_freq %d\n",
  990. mclk_freq, curr_freq);
  991. return -EINVAL;
  992. }
  993. scale = mclk_freq / curr_freq;
  994. /*
  995. * map scale to Table 90 of SoundWire 1.2 spec - and check
  996. * that the scale is a power of two and maximum 64
  997. */
  998. scale_index = ilog2(scale);
  999. if (BIT(scale_index) != scale || scale_index > 6) {
  1000. dev_err(&slave->dev,
  1001. "No match found for scale %d, bus mclk %d curr_freq %d\n",
  1002. scale, mclk_freq, curr_freq);
  1003. return -EINVAL;
  1004. }
  1005. scale_index++;
  1006. ret = sdw_write_no_pm(slave, SDW_SCP_BUS_CLOCK_BASE, base);
  1007. if (ret < 0) {
  1008. dev_err(&slave->dev,
  1009. "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret);
  1010. return ret;
  1011. }
  1012. /* initialize scale for both banks */
  1013. ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index);
  1014. if (ret < 0) {
  1015. dev_err(&slave->dev,
  1016. "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret);
  1017. return ret;
  1018. }
  1019. ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index);
  1020. if (ret < 0)
  1021. dev_err(&slave->dev,
  1022. "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret);
  1023. dev_dbg(&slave->dev,
  1024. "Configured bus base %d, scale %d, mclk %d, curr_freq %d\n",
  1025. base, scale_index, mclk_freq, curr_freq);
  1026. return ret;
  1027. }
  1028. static int sdw_initialize_slave(struct sdw_slave *slave)
  1029. {
  1030. struct sdw_slave_prop *prop = &slave->prop;
  1031. int ret;
  1032. u8 val;
  1033. ret = sdw_slave_set_frequency(slave);
  1034. if (ret < 0)
  1035. return ret;
  1036. /*
  1037. * Set SCP_INT1_MASK register, typically bus clash and
  1038. * implementation-defined interrupt mask. The Parity detection
  1039. * may not always be correct on startup so its use is
  1040. * device-dependent, it might e.g. only be enabled in
  1041. * steady-state after a couple of frames.
  1042. */
  1043. val = slave->prop.scp_int1_mask;
  1044. /* Enable SCP interrupts */
  1045. ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, val, val);
  1046. if (ret < 0) {
  1047. dev_err(slave->bus->dev,
  1048. "SDW_SCP_INTMASK1 write failed:%d\n", ret);
  1049. return ret;
  1050. }
  1051. /* No need to continue if DP0 is not present */
  1052. if (!slave->prop.dp0_prop)
  1053. return 0;
  1054. /* Enable DP0 interrupts */
  1055. val = prop->dp0_prop->imp_def_interrupts;
  1056. val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE;
  1057. ret = sdw_update_no_pm(slave, SDW_DP0_INTMASK, val, val);
  1058. if (ret < 0)
  1059. dev_err(slave->bus->dev,
  1060. "SDW_DP0_INTMASK read failed:%d\n", ret);
  1061. return ret;
  1062. }
  1063. static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status)
  1064. {
  1065. u8 clear = 0, impl_int_mask;
  1066. int status, status2, ret, count = 0;
  1067. status = sdw_read(slave, SDW_DP0_INT);
  1068. if (status < 0) {
  1069. dev_err(slave->bus->dev,
  1070. "SDW_DP0_INT read failed:%d\n", status);
  1071. return status;
  1072. }
  1073. do {
  1074. if (status & SDW_DP0_INT_TEST_FAIL) {
  1075. dev_err(&slave->dev, "Test fail for port 0\n");
  1076. clear |= SDW_DP0_INT_TEST_FAIL;
  1077. }
  1078. /*
  1079. * Assumption: PORT_READY interrupt will be received only for
  1080. * ports implementing Channel Prepare state machine (CP_SM)
  1081. */
  1082. if (status & SDW_DP0_INT_PORT_READY) {
  1083. complete(&slave->port_ready[0]);
  1084. clear |= SDW_DP0_INT_PORT_READY;
  1085. }
  1086. if (status & SDW_DP0_INT_BRA_FAILURE) {
  1087. dev_err(&slave->dev, "BRA failed\n");
  1088. clear |= SDW_DP0_INT_BRA_FAILURE;
  1089. }
  1090. impl_int_mask = SDW_DP0_INT_IMPDEF1 |
  1091. SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3;
  1092. if (status & impl_int_mask) {
  1093. clear |= impl_int_mask;
  1094. *slave_status = clear;
  1095. }
  1096. /* clear the interrupt */
  1097. ret = sdw_write(slave, SDW_DP0_INT, clear);
  1098. if (ret < 0) {
  1099. dev_err(slave->bus->dev,
  1100. "SDW_DP0_INT write failed:%d\n", ret);
  1101. return ret;
  1102. }
  1103. /* Read DP0 interrupt again */
  1104. status2 = sdw_read(slave, SDW_DP0_INT);
  1105. if (status2 < 0) {
  1106. dev_err(slave->bus->dev,
  1107. "SDW_DP0_INT read failed:%d\n", status2);
  1108. return status2;
  1109. }
  1110. status &= status2;
  1111. count++;
  1112. /* we can get alerts while processing so keep retrying */
  1113. } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
  1114. if (count == SDW_READ_INTR_CLEAR_RETRY)
  1115. dev_warn(slave->bus->dev, "Reached MAX_RETRY on DP0 read\n");
  1116. return ret;
  1117. }
  1118. static int sdw_handle_port_interrupt(struct sdw_slave *slave,
  1119. int port, u8 *slave_status)
  1120. {
  1121. u8 clear = 0, impl_int_mask;
  1122. int status, status2, ret, count = 0;
  1123. u32 addr;
  1124. if (port == 0)
  1125. return sdw_handle_dp0_interrupt(slave, slave_status);
  1126. addr = SDW_DPN_INT(port);
  1127. status = sdw_read(slave, addr);
  1128. if (status < 0) {
  1129. dev_err(slave->bus->dev,
  1130. "SDW_DPN_INT read failed:%d\n", status);
  1131. return status;
  1132. }
  1133. do {
  1134. if (status & SDW_DPN_INT_TEST_FAIL) {
  1135. dev_err(&slave->dev, "Test fail for port:%d\n", port);
  1136. clear |= SDW_DPN_INT_TEST_FAIL;
  1137. }
  1138. /*
  1139. * Assumption: PORT_READY interrupt will be received only
  1140. * for ports implementing CP_SM.
  1141. */
  1142. if (status & SDW_DPN_INT_PORT_READY) {
  1143. complete(&slave->port_ready[port]);
  1144. clear |= SDW_DPN_INT_PORT_READY;
  1145. }
  1146. impl_int_mask = SDW_DPN_INT_IMPDEF1 |
  1147. SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3;
  1148. if (status & impl_int_mask) {
  1149. clear |= impl_int_mask;
  1150. *slave_status = clear;
  1151. }
  1152. /* clear the interrupt */
  1153. ret = sdw_write(slave, addr, clear);
  1154. if (ret < 0) {
  1155. dev_err(slave->bus->dev,
  1156. "SDW_DPN_INT write failed:%d\n", ret);
  1157. return ret;
  1158. }
  1159. /* Read DPN interrupt again */
  1160. status2 = sdw_read(slave, addr);
  1161. if (status2 < 0) {
  1162. dev_err(slave->bus->dev,
  1163. "SDW_DPN_INT read failed:%d\n", status2);
  1164. return status2;
  1165. }
  1166. status &= status2;
  1167. count++;
  1168. /* we can get alerts while processing so keep retrying */
  1169. } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
  1170. if (count == SDW_READ_INTR_CLEAR_RETRY)
  1171. dev_warn(slave->bus->dev, "Reached MAX_RETRY on port read");
  1172. return ret;
  1173. }
  1174. static int sdw_handle_slave_alerts(struct sdw_slave *slave)
  1175. {
  1176. struct sdw_slave_intr_status slave_intr;
  1177. u8 clear = 0, bit, port_status[15] = {0};
  1178. int port_num, stat, ret, count = 0;
  1179. unsigned long port;
  1180. bool slave_notify = false;
  1181. u8 buf, buf2[2], _buf, _buf2[2];
  1182. bool parity_check;
  1183. bool parity_quirk;
  1184. sdw_modify_slave_status(slave, SDW_SLAVE_ALERT);
  1185. ret = pm_runtime_get_sync(&slave->dev);
  1186. if (ret < 0 && ret != -EACCES) {
  1187. dev_err(&slave->dev, "Failed to resume device: %d\n", ret);
  1188. pm_runtime_put_noidle(&slave->dev);
  1189. return ret;
  1190. }
  1191. /* Read Intstat 1, Intstat 2 and Intstat 3 registers */
  1192. ret = sdw_read(slave, SDW_SCP_INT1);
  1193. if (ret < 0) {
  1194. dev_err(slave->bus->dev,
  1195. "SDW_SCP_INT1 read failed:%d\n", ret);
  1196. goto io_err;
  1197. }
  1198. buf = ret;
  1199. ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, buf2);
  1200. if (ret < 0) {
  1201. dev_err(slave->bus->dev,
  1202. "SDW_SCP_INT2/3 read failed:%d\n", ret);
  1203. goto io_err;
  1204. }
  1205. do {
  1206. /*
  1207. * Check parity, bus clash and Slave (impl defined)
  1208. * interrupt
  1209. */
  1210. if (buf & SDW_SCP_INT1_PARITY) {
  1211. parity_check = slave->prop.scp_int1_mask & SDW_SCP_INT1_PARITY;
  1212. parity_quirk = !slave->first_interrupt_done &&
  1213. (slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY);
  1214. if (parity_check && !parity_quirk)
  1215. dev_err(&slave->dev, "Parity error detected\n");
  1216. clear |= SDW_SCP_INT1_PARITY;
  1217. }
  1218. if (buf & SDW_SCP_INT1_BUS_CLASH) {
  1219. if (slave->prop.scp_int1_mask & SDW_SCP_INT1_BUS_CLASH)
  1220. dev_err(&slave->dev, "Bus clash detected\n");
  1221. clear |= SDW_SCP_INT1_BUS_CLASH;
  1222. }
  1223. /*
  1224. * When bus clash or parity errors are detected, such errors
  1225. * are unlikely to be recoverable errors.
  1226. * TODO: In such scenario, reset bus. Make this configurable
  1227. * via sysfs property with bus reset being the default.
  1228. */
  1229. if (buf & SDW_SCP_INT1_IMPL_DEF) {
  1230. if (slave->prop.scp_int1_mask & SDW_SCP_INT1_IMPL_DEF) {
  1231. dev_dbg(&slave->dev, "Slave impl defined interrupt\n");
  1232. slave_notify = true;
  1233. }
  1234. clear |= SDW_SCP_INT1_IMPL_DEF;
  1235. }
  1236. /* Check port 0 - 3 interrupts */
  1237. port = buf & SDW_SCP_INT1_PORT0_3;
  1238. /* To get port number corresponding to bits, shift it */
  1239. port = FIELD_GET(SDW_SCP_INT1_PORT0_3, port);
  1240. for_each_set_bit(bit, &port, 8) {
  1241. sdw_handle_port_interrupt(slave, bit,
  1242. &port_status[bit]);
  1243. }
  1244. /* Check if cascade 2 interrupt is present */
  1245. if (buf & SDW_SCP_INT1_SCP2_CASCADE) {
  1246. port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10;
  1247. for_each_set_bit(bit, &port, 8) {
  1248. /* scp2 ports start from 4 */
  1249. port_num = bit + 3;
  1250. sdw_handle_port_interrupt(slave,
  1251. port_num,
  1252. &port_status[port_num]);
  1253. }
  1254. }
  1255. /* now check last cascade */
  1256. if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) {
  1257. port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14;
  1258. for_each_set_bit(bit, &port, 8) {
  1259. /* scp3 ports start from 11 */
  1260. port_num = bit + 10;
  1261. sdw_handle_port_interrupt(slave,
  1262. port_num,
  1263. &port_status[port_num]);
  1264. }
  1265. }
  1266. /* Update the Slave driver */
  1267. if (slave_notify && slave->ops &&
  1268. slave->ops->interrupt_callback) {
  1269. slave_intr.control_port = clear;
  1270. memcpy(slave_intr.port, &port_status,
  1271. sizeof(slave_intr.port));
  1272. slave->ops->interrupt_callback(slave, &slave_intr);
  1273. }
  1274. /* Ack interrupt */
  1275. ret = sdw_write(slave, SDW_SCP_INT1, clear);
  1276. if (ret < 0) {
  1277. dev_err(slave->bus->dev,
  1278. "SDW_SCP_INT1 write failed:%d\n", ret);
  1279. goto io_err;
  1280. }
  1281. /* at this point all initial interrupt sources were handled */
  1282. slave->first_interrupt_done = true;
  1283. /*
  1284. * Read status again to ensure no new interrupts arrived
  1285. * while servicing interrupts.
  1286. */
  1287. ret = sdw_read(slave, SDW_SCP_INT1);
  1288. if (ret < 0) {
  1289. dev_err(slave->bus->dev,
  1290. "SDW_SCP_INT1 read failed:%d\n", ret);
  1291. goto io_err;
  1292. }
  1293. _buf = ret;
  1294. ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, _buf2);
  1295. if (ret < 0) {
  1296. dev_err(slave->bus->dev,
  1297. "SDW_SCP_INT2/3 read failed:%d\n", ret);
  1298. goto io_err;
  1299. }
  1300. /* Make sure no interrupts are pending */
  1301. buf &= _buf;
  1302. buf2[0] &= _buf2[0];
  1303. buf2[1] &= _buf2[1];
  1304. stat = buf || buf2[0] || buf2[1];
  1305. /*
  1306. * Exit loop if Slave is continuously in ALERT state even
  1307. * after servicing the interrupt multiple times.
  1308. */
  1309. count++;
  1310. /* we can get alerts while processing so keep retrying */
  1311. } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
  1312. if (count == SDW_READ_INTR_CLEAR_RETRY)
  1313. dev_warn(slave->bus->dev, "Reached MAX_RETRY on alert read\n");
  1314. io_err:
  1315. pm_runtime_mark_last_busy(&slave->dev);
  1316. pm_runtime_put_autosuspend(&slave->dev);
  1317. return ret;
  1318. }
  1319. static int sdw_update_slave_status(struct sdw_slave *slave,
  1320. enum sdw_slave_status status)
  1321. {
  1322. unsigned long time;
  1323. if (!slave->probed) {
  1324. /*
  1325. * the slave status update is typically handled in an
  1326. * interrupt thread, which can race with the driver
  1327. * probe, e.g. when a module needs to be loaded.
  1328. *
  1329. * make sure the probe is complete before updating
  1330. * status.
  1331. */
  1332. time = wait_for_completion_timeout(&slave->probe_complete,
  1333. msecs_to_jiffies(DEFAULT_PROBE_TIMEOUT));
  1334. if (!time) {
  1335. dev_err(&slave->dev, "Probe not complete, timed out\n");
  1336. return -ETIMEDOUT;
  1337. }
  1338. }
  1339. if (!slave->ops || !slave->ops->update_status)
  1340. return 0;
  1341. return slave->ops->update_status(slave, status);
  1342. }
  1343. /**
  1344. * sdw_handle_slave_status() - Handle Slave status
  1345. * @bus: SDW bus instance
  1346. * @status: Status for all Slave(s)
  1347. */
  1348. int sdw_handle_slave_status(struct sdw_bus *bus,
  1349. enum sdw_slave_status status[])
  1350. {
  1351. enum sdw_slave_status prev_status;
  1352. struct sdw_slave *slave;
  1353. bool attached_initializing;
  1354. int i, ret = 0;
  1355. /* first check if any Slaves fell off the bus */
  1356. for (i = 1; i <= SDW_MAX_DEVICES; i++) {
  1357. mutex_lock(&bus->bus_lock);
  1358. if (test_bit(i, bus->assigned) == false) {
  1359. mutex_unlock(&bus->bus_lock);
  1360. continue;
  1361. }
  1362. mutex_unlock(&bus->bus_lock);
  1363. slave = sdw_get_slave(bus, i);
  1364. if (!slave)
  1365. continue;
  1366. if (status[i] == SDW_SLAVE_UNATTACHED &&
  1367. slave->status != SDW_SLAVE_UNATTACHED)
  1368. sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
  1369. }
  1370. if (status[0] == SDW_SLAVE_ATTACHED) {
  1371. dev_dbg(bus->dev, "Slave attached, programming device number\n");
  1372. ret = sdw_program_device_num(bus);
  1373. if (ret)
  1374. dev_err(bus->dev, "Slave attach failed: %d\n", ret);
  1375. /*
  1376. * programming a device number will have side effects,
  1377. * so we deal with other devices at a later time
  1378. */
  1379. return ret;
  1380. }
  1381. /* Continue to check other slave statuses */
  1382. for (i = 1; i <= SDW_MAX_DEVICES; i++) {
  1383. mutex_lock(&bus->bus_lock);
  1384. if (test_bit(i, bus->assigned) == false) {
  1385. mutex_unlock(&bus->bus_lock);
  1386. continue;
  1387. }
  1388. mutex_unlock(&bus->bus_lock);
  1389. slave = sdw_get_slave(bus, i);
  1390. if (!slave)
  1391. continue;
  1392. attached_initializing = false;
  1393. switch (status[i]) {
  1394. case SDW_SLAVE_UNATTACHED:
  1395. if (slave->status == SDW_SLAVE_UNATTACHED)
  1396. break;
  1397. sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
  1398. break;
  1399. case SDW_SLAVE_ALERT:
  1400. ret = sdw_handle_slave_alerts(slave);
  1401. if (ret)
  1402. dev_err(bus->dev,
  1403. "Slave %d alert handling failed: %d\n",
  1404. i, ret);
  1405. break;
  1406. case SDW_SLAVE_ATTACHED:
  1407. if (slave->status == SDW_SLAVE_ATTACHED)
  1408. break;
  1409. prev_status = slave->status;
  1410. sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED);
  1411. if (prev_status == SDW_SLAVE_ALERT)
  1412. break;
  1413. attached_initializing = true;
  1414. ret = sdw_initialize_slave(slave);
  1415. if (ret)
  1416. dev_err(bus->dev,
  1417. "Slave %d initialization failed: %d\n",
  1418. i, ret);
  1419. break;
  1420. default:
  1421. dev_err(bus->dev, "Invalid slave %d status:%d\n",
  1422. i, status[i]);
  1423. break;
  1424. }
  1425. ret = sdw_update_slave_status(slave, status[i]);
  1426. if (ret)
  1427. dev_err(slave->bus->dev,
  1428. "Update Slave status failed:%d\n", ret);
  1429. if (attached_initializing)
  1430. complete(&slave->initialization_complete);
  1431. }
  1432. return ret;
  1433. }
  1434. EXPORT_SYMBOL(sdw_handle_slave_status);
  1435. void sdw_clear_slave_status(struct sdw_bus *bus, u32 request)
  1436. {
  1437. struct sdw_slave *slave;
  1438. int i;
  1439. /* Check all non-zero devices */
  1440. for (i = 1; i <= SDW_MAX_DEVICES; i++) {
  1441. mutex_lock(&bus->bus_lock);
  1442. if (test_bit(i, bus->assigned) == false) {
  1443. mutex_unlock(&bus->bus_lock);
  1444. continue;
  1445. }
  1446. mutex_unlock(&bus->bus_lock);
  1447. slave = sdw_get_slave(bus, i);
  1448. if (!slave)
  1449. continue;
  1450. if (slave->status != SDW_SLAVE_UNATTACHED) {
  1451. sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
  1452. slave->first_interrupt_done = false;
  1453. }
  1454. /* keep track of request, used in pm_runtime resume */
  1455. slave->unattach_request = request;
  1456. }
  1457. }
  1458. EXPORT_SYMBOL(sdw_clear_slave_status);