r8a7742-sysc.c 1.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Renesas RZ/G1H System Controller
  4. *
  5. * Copyright (C) 2020 Renesas Electronics Corp.
  6. */
  7. #include <linux/kernel.h>
  8. #include <dt-bindings/power/r8a7742-sysc.h>
  9. #include "rcar-sysc.h"
  10. static const struct rcar_sysc_area r8a7742_areas[] __initconst = {
  11. { "always-on", 0, 0, R8A7742_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
  12. { "ca15-scu", 0x180, 0, R8A7742_PD_CA15_SCU, R8A7742_PD_ALWAYS_ON,
  13. PD_SCU },
  14. { "ca15-cpu0", 0x40, 0, R8A7742_PD_CA15_CPU0, R8A7742_PD_CA15_SCU,
  15. PD_CPU_NOCR },
  16. { "ca15-cpu1", 0x40, 1, R8A7742_PD_CA15_CPU1, R8A7742_PD_CA15_SCU,
  17. PD_CPU_NOCR },
  18. { "ca15-cpu2", 0x40, 2, R8A7742_PD_CA15_CPU2, R8A7742_PD_CA15_SCU,
  19. PD_CPU_NOCR },
  20. { "ca15-cpu3", 0x40, 3, R8A7742_PD_CA15_CPU3, R8A7742_PD_CA15_SCU,
  21. PD_CPU_NOCR },
  22. { "ca7-scu", 0x100, 0, R8A7742_PD_CA7_SCU, R8A7742_PD_ALWAYS_ON,
  23. PD_SCU },
  24. { "ca7-cpu0", 0x1c0, 0, R8A7742_PD_CA7_CPU0, R8A7742_PD_CA7_SCU,
  25. PD_CPU_NOCR },
  26. { "ca7-cpu1", 0x1c0, 1, R8A7742_PD_CA7_CPU1, R8A7742_PD_CA7_SCU,
  27. PD_CPU_NOCR },
  28. { "ca7-cpu2", 0x1c0, 2, R8A7742_PD_CA7_CPU2, R8A7742_PD_CA7_SCU,
  29. PD_CPU_NOCR },
  30. { "ca7-cpu3", 0x1c0, 3, R8A7742_PD_CA7_CPU3, R8A7742_PD_CA7_SCU,
  31. PD_CPU_NOCR },
  32. { "rgx", 0xc0, 0, R8A7742_PD_RGX, R8A7742_PD_ALWAYS_ON },
  33. };
  34. const struct rcar_sysc_info r8a7742_sysc_info __initconst = {
  35. .areas = r8a7742_areas,
  36. .num_areas = ARRAY_SIZE(r8a7742_areas),
  37. };