soc.h 4.0 KB

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  1. /*
  2. * Copyright (C) 2015 Atmel
  3. *
  4. * Boris Brezillon <boris.brezillon@free-electrons.com
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. *
  10. */
  11. #ifndef __AT91_SOC_H
  12. #define __AT91_SOC_H
  13. #include <linux/sys_soc.h>
  14. struct at91_soc {
  15. u32 cidr_match;
  16. u32 exid_match;
  17. const char *name;
  18. const char *family;
  19. };
  20. #define AT91_SOC(__cidr, __exid, __name, __family) \
  21. { \
  22. .cidr_match = (__cidr), \
  23. .exid_match = (__exid), \
  24. .name = (__name), \
  25. .family = (__family), \
  26. }
  27. struct soc_device * __init
  28. at91_soc_init(const struct at91_soc *socs);
  29. #define AT91RM9200_CIDR_MATCH 0x09290780
  30. #define AT91SAM9260_CIDR_MATCH 0x019803a0
  31. #define AT91SAM9261_CIDR_MATCH 0x019703a0
  32. #define AT91SAM9263_CIDR_MATCH 0x019607a0
  33. #define AT91SAM9G20_CIDR_MATCH 0x019905a0
  34. #define AT91SAM9RL64_CIDR_MATCH 0x019b03a0
  35. #define AT91SAM9G45_CIDR_MATCH 0x019b05a0
  36. #define AT91SAM9X5_CIDR_MATCH 0x019a05a0
  37. #define AT91SAM9N12_CIDR_MATCH 0x019a07a0
  38. #define SAM9X60_CIDR_MATCH 0x019b35a0
  39. #define AT91SAM9M11_EXID_MATCH 0x00000001
  40. #define AT91SAM9M10_EXID_MATCH 0x00000002
  41. #define AT91SAM9G46_EXID_MATCH 0x00000003
  42. #define AT91SAM9G45_EXID_MATCH 0x00000004
  43. #define AT91SAM9G15_EXID_MATCH 0x00000000
  44. #define AT91SAM9G35_EXID_MATCH 0x00000001
  45. #define AT91SAM9X35_EXID_MATCH 0x00000002
  46. #define AT91SAM9G25_EXID_MATCH 0x00000003
  47. #define AT91SAM9X25_EXID_MATCH 0x00000004
  48. #define AT91SAM9CN12_EXID_MATCH 0x00000005
  49. #define AT91SAM9N12_EXID_MATCH 0x00000006
  50. #define AT91SAM9CN11_EXID_MATCH 0x00000009
  51. #define SAM9X60_EXID_MATCH 0x00000000
  52. #define AT91SAM9XE128_CIDR_MATCH 0x329973a0
  53. #define AT91SAM9XE256_CIDR_MATCH 0x329a93a0
  54. #define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0
  55. #define SAMA5D2_CIDR_MATCH 0x0a5c08c0
  56. #define SAMA5D21CU_EXID_MATCH 0x0000005a
  57. #define SAMA5D225C_D1M_EXID_MATCH 0x00000053
  58. #define SAMA5D22CU_EXID_MATCH 0x00000059
  59. #define SAMA5D22CN_EXID_MATCH 0x00000069
  60. #define SAMA5D23CU_EXID_MATCH 0x00000058
  61. #define SAMA5D24CX_EXID_MATCH 0x00000004
  62. #define SAMA5D24CU_EXID_MATCH 0x00000014
  63. #define SAMA5D26CU_EXID_MATCH 0x00000012
  64. #define SAMA5D27C_D1G_EXID_MATCH 0x00000033
  65. #define SAMA5D27C_D5M_EXID_MATCH 0x00000032
  66. #define SAMA5D27C_LD1G_EXID_MATCH 0x00000061
  67. #define SAMA5D27C_LD2G_EXID_MATCH 0x00000062
  68. #define SAMA5D27CU_EXID_MATCH 0x00000011
  69. #define SAMA5D27CN_EXID_MATCH 0x00000021
  70. #define SAMA5D28C_D1G_EXID_MATCH 0x00000013
  71. #define SAMA5D28C_LD1G_EXID_MATCH 0x00000071
  72. #define SAMA5D28C_LD2G_EXID_MATCH 0x00000072
  73. #define SAMA5D28CU_EXID_MATCH 0x00000010
  74. #define SAMA5D28CN_EXID_MATCH 0x00000020
  75. #define SAMA5D3_CIDR_MATCH 0x0a5c07c0
  76. #define SAMA5D31_EXID_MATCH 0x00444300
  77. #define SAMA5D33_EXID_MATCH 0x00414300
  78. #define SAMA5D34_EXID_MATCH 0x00414301
  79. #define SAMA5D35_EXID_MATCH 0x00584300
  80. #define SAMA5D36_EXID_MATCH 0x00004301
  81. #define SAMA5D4_CIDR_MATCH 0x0a5c07c0
  82. #define SAMA5D41_EXID_MATCH 0x00000001
  83. #define SAMA5D42_EXID_MATCH 0x00000002
  84. #define SAMA5D43_EXID_MATCH 0x00000003
  85. #define SAMA5D44_EXID_MATCH 0x00000004
  86. #define SAME70Q21_CIDR_MATCH 0x21020e00
  87. #define SAME70Q21_EXID_MATCH 0x00000002
  88. #define SAME70Q20_CIDR_MATCH 0x21020c00
  89. #define SAME70Q20_EXID_MATCH 0x00000002
  90. #define SAME70Q19_CIDR_MATCH 0x210d0a00
  91. #define SAME70Q19_EXID_MATCH 0x00000002
  92. #define SAMS70Q21_CIDR_MATCH 0x21120e00
  93. #define SAMS70Q21_EXID_MATCH 0x00000002
  94. #define SAMS70Q20_CIDR_MATCH 0x21120c00
  95. #define SAMS70Q20_EXID_MATCH 0x00000002
  96. #define SAMS70Q19_CIDR_MATCH 0x211d0a00
  97. #define SAMS70Q19_EXID_MATCH 0x00000002
  98. #define SAMV71Q21_CIDR_MATCH 0x21220e00
  99. #define SAMV71Q21_EXID_MATCH 0x00000002
  100. #define SAMV71Q20_CIDR_MATCH 0x21220c00
  101. #define SAMV71Q20_EXID_MATCH 0x00000002
  102. #define SAMV71Q19_CIDR_MATCH 0x212d0a00
  103. #define SAMV71Q19_EXID_MATCH 0x00000002
  104. #define SAMV70Q20_CIDR_MATCH 0x21320c00
  105. #define SAMV70Q20_EXID_MATCH 0x00000002
  106. #define SAMV70Q19_CIDR_MATCH 0x213d0a00
  107. #define SAMV70Q19_EXID_MATCH 0x00000002
  108. #endif /* __AT91_SOC_H */