aspeed-p2a-ctrl.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2019 Google Inc
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version
  8. * 2 of the License, or (at your option) any later version.
  9. *
  10. * Provides a simple driver to control the ASPEED P2A interface which allows
  11. * the host to read and write to various regions of the BMC's memory.
  12. */
  13. #include <linux/fs.h>
  14. #include <linux/io.h>
  15. #include <linux/mfd/syscon.h>
  16. #include <linux/miscdevice.h>
  17. #include <linux/mm.h>
  18. #include <linux/module.h>
  19. #include <linux/mutex.h>
  20. #include <linux/of_address.h>
  21. #include <linux/of_device.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/regmap.h>
  24. #include <linux/slab.h>
  25. #include <linux/uaccess.h>
  26. #include <linux/aspeed-p2a-ctrl.h>
  27. #define DEVICE_NAME "aspeed-p2a-ctrl"
  28. /* SCU2C is a Misc. Control Register. */
  29. #define SCU2C 0x2c
  30. /* SCU180 is the PCIe Configuration Setting Control Register. */
  31. #define SCU180 0x180
  32. /* Bit 1 controls the P2A bridge, while bit 0 controls the entire VGA device
  33. * on the PCI bus.
  34. */
  35. #define SCU180_ENP2A BIT(1)
  36. /* The ast2400/2500 both have six ranges. */
  37. #define P2A_REGION_COUNT 6
  38. struct region {
  39. u64 min;
  40. u64 max;
  41. u32 bit;
  42. };
  43. struct aspeed_p2a_model_data {
  44. /* min, max, bit */
  45. struct region regions[P2A_REGION_COUNT];
  46. };
  47. struct aspeed_p2a_ctrl {
  48. struct miscdevice miscdev;
  49. struct regmap *regmap;
  50. const struct aspeed_p2a_model_data *config;
  51. /* Access to these needs to be locked, held via probe, mapping ioctl,
  52. * and release, remove.
  53. */
  54. struct mutex tracking;
  55. u32 readers;
  56. u32 readerwriters[P2A_REGION_COUNT];
  57. phys_addr_t mem_base;
  58. resource_size_t mem_size;
  59. };
  60. struct aspeed_p2a_user {
  61. struct file *file;
  62. struct aspeed_p2a_ctrl *parent;
  63. /* The entire memory space is opened for reading once the bridge is
  64. * enabled, therefore this needs only to be tracked once per user.
  65. * If any user has it open for read, the bridge must stay enabled.
  66. */
  67. u32 read;
  68. /* Each entry of the array corresponds to a P2A Region. If the user
  69. * opens for read or readwrite, the reference goes up here. On
  70. * release, this array is walked and references adjusted accordingly.
  71. */
  72. u32 readwrite[P2A_REGION_COUNT];
  73. };
  74. static void aspeed_p2a_enable_bridge(struct aspeed_p2a_ctrl *p2a_ctrl)
  75. {
  76. regmap_update_bits(p2a_ctrl->regmap,
  77. SCU180, SCU180_ENP2A, SCU180_ENP2A);
  78. }
  79. static void aspeed_p2a_disable_bridge(struct aspeed_p2a_ctrl *p2a_ctrl)
  80. {
  81. regmap_update_bits(p2a_ctrl->regmap, SCU180, SCU180_ENP2A, 0);
  82. }
  83. static int aspeed_p2a_mmap(struct file *file, struct vm_area_struct *vma)
  84. {
  85. unsigned long vsize;
  86. pgprot_t prot;
  87. struct aspeed_p2a_user *priv = file->private_data;
  88. struct aspeed_p2a_ctrl *ctrl = priv->parent;
  89. if (ctrl->mem_base == 0 && ctrl->mem_size == 0)
  90. return -EINVAL;
  91. vsize = vma->vm_end - vma->vm_start;
  92. prot = vma->vm_page_prot;
  93. if (vma->vm_pgoff + vma_pages(vma) > ctrl->mem_size >> PAGE_SHIFT)
  94. return -EINVAL;
  95. /* ast2400/2500 AHB accesses are not cache coherent */
  96. prot = pgprot_noncached(prot);
  97. if (remap_pfn_range(vma, vma->vm_start,
  98. (ctrl->mem_base >> PAGE_SHIFT) + vma->vm_pgoff,
  99. vsize, prot))
  100. return -EAGAIN;
  101. return 0;
  102. }
  103. static bool aspeed_p2a_region_acquire(struct aspeed_p2a_user *priv,
  104. struct aspeed_p2a_ctrl *ctrl,
  105. struct aspeed_p2a_ctrl_mapping *map)
  106. {
  107. int i;
  108. u64 base, end;
  109. bool matched = false;
  110. base = map->addr;
  111. end = map->addr + (map->length - 1);
  112. /* If the value is a legal u32, it will find a match. */
  113. for (i = 0; i < P2A_REGION_COUNT; i++) {
  114. const struct region *curr = &ctrl->config->regions[i];
  115. /* If the top of this region is lower than your base, skip it.
  116. */
  117. if (curr->max < base)
  118. continue;
  119. /* If the bottom of this region is higher than your end, bail.
  120. */
  121. if (curr->min > end)
  122. break;
  123. /* Lock this and update it, therefore it someone else is
  124. * closing their file out, this'll preserve the increment.
  125. */
  126. mutex_lock(&ctrl->tracking);
  127. ctrl->readerwriters[i] += 1;
  128. mutex_unlock(&ctrl->tracking);
  129. /* Track with the user, so when they close their file, we can
  130. * decrement properly.
  131. */
  132. priv->readwrite[i] += 1;
  133. /* Enable the region as read-write. */
  134. regmap_update_bits(ctrl->regmap, SCU2C, curr->bit, 0);
  135. matched = true;
  136. }
  137. return matched;
  138. }
  139. static long aspeed_p2a_ioctl(struct file *file, unsigned int cmd,
  140. unsigned long data)
  141. {
  142. struct aspeed_p2a_user *priv = file->private_data;
  143. struct aspeed_p2a_ctrl *ctrl = priv->parent;
  144. void __user *arg = (void __user *)data;
  145. struct aspeed_p2a_ctrl_mapping map;
  146. if (copy_from_user(&map, arg, sizeof(map)))
  147. return -EFAULT;
  148. switch (cmd) {
  149. case ASPEED_P2A_CTRL_IOCTL_SET_WINDOW:
  150. /* If they want a region to be read-only, since the entire
  151. * region is read-only once enabled, we just need to track this
  152. * user wants to read from the bridge, and if it's not enabled.
  153. * Enable it.
  154. */
  155. if (map.flags == ASPEED_P2A_CTRL_READ_ONLY) {
  156. mutex_lock(&ctrl->tracking);
  157. ctrl->readers += 1;
  158. mutex_unlock(&ctrl->tracking);
  159. /* Track with the user, so when they close their file,
  160. * we can decrement properly.
  161. */
  162. priv->read += 1;
  163. } else if (map.flags == ASPEED_P2A_CTRL_READWRITE) {
  164. /* If we don't acquire any region return error. */
  165. if (!aspeed_p2a_region_acquire(priv, ctrl, &map)) {
  166. return -EINVAL;
  167. }
  168. } else {
  169. /* Invalid map flags. */
  170. return -EINVAL;
  171. }
  172. aspeed_p2a_enable_bridge(ctrl);
  173. return 0;
  174. case ASPEED_P2A_CTRL_IOCTL_GET_MEMORY_CONFIG:
  175. /* This is a request for the memory-region and corresponding
  176. * length that is used by the driver for mmap.
  177. */
  178. map.flags = 0;
  179. map.addr = ctrl->mem_base;
  180. map.length = ctrl->mem_size;
  181. return copy_to_user(arg, &map, sizeof(map)) ? -EFAULT : 0;
  182. }
  183. return -EINVAL;
  184. }
  185. /*
  186. * When a user opens this file, we create a structure to track their mappings.
  187. *
  188. * A user can map a region as read-only (bridge enabled), or read-write (bit
  189. * flipped, and bridge enabled). Either way, this tracking is used, s.t. when
  190. * they release the device references are handled.
  191. *
  192. * The bridge is not enabled until a user calls an ioctl to map a region,
  193. * simply opening the device does not enable it.
  194. */
  195. static int aspeed_p2a_open(struct inode *inode, struct file *file)
  196. {
  197. struct aspeed_p2a_user *priv;
  198. priv = kmalloc(sizeof(*priv), GFP_KERNEL);
  199. if (!priv)
  200. return -ENOMEM;
  201. priv->file = file;
  202. priv->read = 0;
  203. memset(priv->readwrite, 0, sizeof(priv->readwrite));
  204. /* The file's private_data is initialized to the p2a_ctrl. */
  205. priv->parent = file->private_data;
  206. /* Set the file's private_data to the user's data. */
  207. file->private_data = priv;
  208. return 0;
  209. }
  210. /*
  211. * This will close the users mappings. It will go through what they had opened
  212. * for readwrite, and decrement those counts. If at the end, this is the last
  213. * user, it'll close the bridge.
  214. */
  215. static int aspeed_p2a_release(struct inode *inode, struct file *file)
  216. {
  217. int i;
  218. u32 bits = 0;
  219. bool open_regions = false;
  220. struct aspeed_p2a_user *priv = file->private_data;
  221. /* Lock others from changing these values until everything is updated
  222. * in one pass.
  223. */
  224. mutex_lock(&priv->parent->tracking);
  225. priv->parent->readers -= priv->read;
  226. for (i = 0; i < P2A_REGION_COUNT; i++) {
  227. priv->parent->readerwriters[i] -= priv->readwrite[i];
  228. if (priv->parent->readerwriters[i] > 0)
  229. open_regions = true;
  230. else
  231. bits |= priv->parent->config->regions[i].bit;
  232. }
  233. /* Setting a bit to 1 disables the region, so let's just OR with the
  234. * above to disable any.
  235. */
  236. /* Note, if another user is trying to ioctl, they can't grab tracking,
  237. * and therefore can't grab either register mutex.
  238. * If another user is trying to close, they can't grab tracking either.
  239. */
  240. regmap_update_bits(priv->parent->regmap, SCU2C, bits, bits);
  241. /* If parent->readers is zero and open windows is 0, disable the
  242. * bridge.
  243. */
  244. if (!open_regions && priv->parent->readers == 0)
  245. aspeed_p2a_disable_bridge(priv->parent);
  246. mutex_unlock(&priv->parent->tracking);
  247. kfree(priv);
  248. return 0;
  249. }
  250. static const struct file_operations aspeed_p2a_ctrl_fops = {
  251. .owner = THIS_MODULE,
  252. .mmap = aspeed_p2a_mmap,
  253. .unlocked_ioctl = aspeed_p2a_ioctl,
  254. .open = aspeed_p2a_open,
  255. .release = aspeed_p2a_release,
  256. };
  257. /* The regions are controlled by SCU2C */
  258. static void aspeed_p2a_disable_all(struct aspeed_p2a_ctrl *p2a_ctrl)
  259. {
  260. int i;
  261. u32 value = 0;
  262. for (i = 0; i < P2A_REGION_COUNT; i++)
  263. value |= p2a_ctrl->config->regions[i].bit;
  264. regmap_update_bits(p2a_ctrl->regmap, SCU2C, value, value);
  265. /* Disable the bridge. */
  266. aspeed_p2a_disable_bridge(p2a_ctrl);
  267. }
  268. static int aspeed_p2a_ctrl_probe(struct platform_device *pdev)
  269. {
  270. struct aspeed_p2a_ctrl *misc_ctrl;
  271. struct device *dev;
  272. struct resource resm;
  273. struct device_node *node;
  274. int rc = 0;
  275. dev = &pdev->dev;
  276. misc_ctrl = devm_kzalloc(dev, sizeof(*misc_ctrl), GFP_KERNEL);
  277. if (!misc_ctrl)
  278. return -ENOMEM;
  279. mutex_init(&misc_ctrl->tracking);
  280. /* optional. */
  281. node = of_parse_phandle(dev->of_node, "memory-region", 0);
  282. if (node) {
  283. rc = of_address_to_resource(node, 0, &resm);
  284. of_node_put(node);
  285. if (rc) {
  286. dev_err(dev, "Couldn't address to resource for reserved memory\n");
  287. return -ENODEV;
  288. }
  289. misc_ctrl->mem_size = resource_size(&resm);
  290. misc_ctrl->mem_base = resm.start;
  291. }
  292. misc_ctrl->regmap = syscon_node_to_regmap(pdev->dev.parent->of_node);
  293. if (IS_ERR(misc_ctrl->regmap)) {
  294. dev_err(dev, "Couldn't get regmap\n");
  295. return -ENODEV;
  296. }
  297. misc_ctrl->config = of_device_get_match_data(dev);
  298. dev_set_drvdata(&pdev->dev, misc_ctrl);
  299. aspeed_p2a_disable_all(misc_ctrl);
  300. misc_ctrl->miscdev.minor = MISC_DYNAMIC_MINOR;
  301. misc_ctrl->miscdev.name = DEVICE_NAME;
  302. misc_ctrl->miscdev.fops = &aspeed_p2a_ctrl_fops;
  303. misc_ctrl->miscdev.parent = dev;
  304. rc = misc_register(&misc_ctrl->miscdev);
  305. if (rc)
  306. dev_err(dev, "Unable to register device\n");
  307. return rc;
  308. }
  309. static int aspeed_p2a_ctrl_remove(struct platform_device *pdev)
  310. {
  311. struct aspeed_p2a_ctrl *p2a_ctrl = dev_get_drvdata(&pdev->dev);
  312. misc_deregister(&p2a_ctrl->miscdev);
  313. return 0;
  314. }
  315. #define SCU2C_DRAM BIT(25)
  316. #define SCU2C_SPI BIT(24)
  317. #define SCU2C_SOC BIT(23)
  318. #define SCU2C_FLASH BIT(22)
  319. static const struct aspeed_p2a_model_data ast2400_model_data = {
  320. .regions = {
  321. {0x00000000, 0x17FFFFFF, SCU2C_FLASH},
  322. {0x18000000, 0x1FFFFFFF, SCU2C_SOC},
  323. {0x20000000, 0x2FFFFFFF, SCU2C_FLASH},
  324. {0x30000000, 0x3FFFFFFF, SCU2C_SPI},
  325. {0x40000000, 0x5FFFFFFF, SCU2C_DRAM},
  326. {0x60000000, 0xFFFFFFFF, SCU2C_SOC},
  327. }
  328. };
  329. static const struct aspeed_p2a_model_data ast2500_model_data = {
  330. .regions = {
  331. {0x00000000, 0x0FFFFFFF, SCU2C_FLASH},
  332. {0x10000000, 0x1FFFFFFF, SCU2C_SOC},
  333. {0x20000000, 0x3FFFFFFF, SCU2C_FLASH},
  334. {0x40000000, 0x5FFFFFFF, SCU2C_SOC},
  335. {0x60000000, 0x7FFFFFFF, SCU2C_SPI},
  336. {0x80000000, 0xFFFFFFFF, SCU2C_DRAM},
  337. }
  338. };
  339. static const struct of_device_id aspeed_p2a_ctrl_match[] = {
  340. { .compatible = "aspeed,ast2400-p2a-ctrl",
  341. .data = &ast2400_model_data },
  342. { .compatible = "aspeed,ast2500-p2a-ctrl",
  343. .data = &ast2500_model_data },
  344. { },
  345. };
  346. static struct platform_driver aspeed_p2a_ctrl_driver = {
  347. .driver = {
  348. .name = DEVICE_NAME,
  349. .of_match_table = aspeed_p2a_ctrl_match,
  350. },
  351. .probe = aspeed_p2a_ctrl_probe,
  352. .remove = aspeed_p2a_ctrl_remove,
  353. };
  354. module_platform_driver(aspeed_p2a_ctrl_driver);
  355. MODULE_DEVICE_TABLE(of, aspeed_p2a_ctrl_match);
  356. MODULE_LICENSE("GPL");
  357. MODULE_AUTHOR("Patrick Venture <venture@google.com>");
  358. MODULE_DESCRIPTION("Control for aspeed 2400/2500 P2A VGA HOST to BMC mappings");