sym_hipd.c 144 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
  4. * of PCI-SCSI IO processors.
  5. *
  6. * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
  7. * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx>
  8. *
  9. * This driver is derived from the Linux sym53c8xx driver.
  10. * Copyright (C) 1998-2000 Gerard Roudier
  11. *
  12. * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
  13. * a port of the FreeBSD ncr driver to Linux-1.2.13.
  14. *
  15. * The original ncr driver has been written for 386bsd and FreeBSD by
  16. * Wolfgang Stanglmeier <wolf@cologne.de>
  17. * Stefan Esser <se@mi.Uni-Koeln.de>
  18. * Copyright (C) 1994 Wolfgang Stanglmeier
  19. *
  20. * Other major contributions:
  21. *
  22. * NVRAM detection and reading.
  23. * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
  24. *
  25. *-----------------------------------------------------------------------------
  26. */
  27. #include <linux/slab.h>
  28. #include <asm/param.h> /* for timeouts in units of HZ */
  29. #include "sym_glue.h"
  30. #include "sym_nvram.h"
  31. #if 0
  32. #define SYM_DEBUG_GENERIC_SUPPORT
  33. #endif
  34. /*
  35. * Needed function prototypes.
  36. */
  37. static void sym_int_ma (struct sym_hcb *np);
  38. static void sym_int_sir(struct sym_hcb *);
  39. static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np);
  40. static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa);
  41. static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln);
  42. static void sym_complete_error (struct sym_hcb *np, struct sym_ccb *cp);
  43. static void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp);
  44. static int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp);
  45. /*
  46. * Print a buffer in hexadecimal format with a ".\n" at end.
  47. */
  48. static void sym_printl_hex(u_char *p, int n)
  49. {
  50. while (n-- > 0)
  51. printf (" %x", *p++);
  52. printf (".\n");
  53. }
  54. static void sym_print_msg(struct sym_ccb *cp, char *label, u_char *msg)
  55. {
  56. sym_print_addr(cp->cmd, "%s: ", label);
  57. spi_print_msg(msg);
  58. printf("\n");
  59. }
  60. static void sym_print_nego_msg(struct sym_hcb *np, int target, char *label, u_char *msg)
  61. {
  62. struct sym_tcb *tp = &np->target[target];
  63. dev_info(&tp->starget->dev, "%s: ", label);
  64. spi_print_msg(msg);
  65. printf("\n");
  66. }
  67. /*
  68. * Print something that tells about extended errors.
  69. */
  70. void sym_print_xerr(struct scsi_cmnd *cmd, int x_status)
  71. {
  72. if (x_status & XE_PARITY_ERR) {
  73. sym_print_addr(cmd, "unrecovered SCSI parity error.\n");
  74. }
  75. if (x_status & XE_EXTRA_DATA) {
  76. sym_print_addr(cmd, "extraneous data discarded.\n");
  77. }
  78. if (x_status & XE_BAD_PHASE) {
  79. sym_print_addr(cmd, "illegal scsi phase (4/5).\n");
  80. }
  81. if (x_status & XE_SODL_UNRUN) {
  82. sym_print_addr(cmd, "ODD transfer in DATA OUT phase.\n");
  83. }
  84. if (x_status & XE_SWIDE_OVRUN) {
  85. sym_print_addr(cmd, "ODD transfer in DATA IN phase.\n");
  86. }
  87. }
  88. /*
  89. * Return a string for SCSI BUS mode.
  90. */
  91. static char *sym_scsi_bus_mode(int mode)
  92. {
  93. switch(mode) {
  94. case SMODE_HVD: return "HVD";
  95. case SMODE_SE: return "SE";
  96. case SMODE_LVD: return "LVD";
  97. }
  98. return "??";
  99. }
  100. /*
  101. * Soft reset the chip.
  102. *
  103. * Raising SRST when the chip is running may cause
  104. * problems on dual function chips (see below).
  105. * On the other hand, LVD devices need some delay
  106. * to settle and report actual BUS mode in STEST4.
  107. */
  108. static void sym_chip_reset (struct sym_hcb *np)
  109. {
  110. OUTB(np, nc_istat, SRST);
  111. INB(np, nc_mbox1);
  112. udelay(10);
  113. OUTB(np, nc_istat, 0);
  114. INB(np, nc_mbox1);
  115. udelay(2000); /* For BUS MODE to settle */
  116. }
  117. /*
  118. * Really soft reset the chip.:)
  119. *
  120. * Some 896 and 876 chip revisions may hang-up if we set
  121. * the SRST (soft reset) bit at the wrong time when SCRIPTS
  122. * are running.
  123. * So, we need to abort the current operation prior to
  124. * soft resetting the chip.
  125. */
  126. static void sym_soft_reset (struct sym_hcb *np)
  127. {
  128. u_char istat = 0;
  129. int i;
  130. if (!(np->features & FE_ISTAT1) || !(INB(np, nc_istat1) & SCRUN))
  131. goto do_chip_reset;
  132. OUTB(np, nc_istat, CABRT);
  133. for (i = 100000 ; i ; --i) {
  134. istat = INB(np, nc_istat);
  135. if (istat & SIP) {
  136. INW(np, nc_sist);
  137. }
  138. else if (istat & DIP) {
  139. if (INB(np, nc_dstat) & ABRT)
  140. break;
  141. }
  142. udelay(5);
  143. }
  144. OUTB(np, nc_istat, 0);
  145. if (!i)
  146. printf("%s: unable to abort current chip operation, "
  147. "ISTAT=0x%02x.\n", sym_name(np), istat);
  148. do_chip_reset:
  149. sym_chip_reset(np);
  150. }
  151. /*
  152. * Start reset process.
  153. *
  154. * The interrupt handler will reinitialize the chip.
  155. */
  156. static void sym_start_reset(struct sym_hcb *np)
  157. {
  158. sym_reset_scsi_bus(np, 1);
  159. }
  160. int sym_reset_scsi_bus(struct sym_hcb *np, int enab_int)
  161. {
  162. u32 term;
  163. int retv = 0;
  164. sym_soft_reset(np); /* Soft reset the chip */
  165. if (enab_int)
  166. OUTW(np, nc_sien, RST);
  167. /*
  168. * Enable Tolerant, reset IRQD if present and
  169. * properly set IRQ mode, prior to resetting the bus.
  170. */
  171. OUTB(np, nc_stest3, TE);
  172. OUTB(np, nc_dcntl, (np->rv_dcntl & IRQM));
  173. OUTB(np, nc_scntl1, CRST);
  174. INB(np, nc_mbox1);
  175. udelay(200);
  176. if (!SYM_SETUP_SCSI_BUS_CHECK)
  177. goto out;
  178. /*
  179. * Check for no terminators or SCSI bus shorts to ground.
  180. * Read SCSI data bus, data parity bits and control signals.
  181. * We are expecting RESET to be TRUE and other signals to be
  182. * FALSE.
  183. */
  184. term = INB(np, nc_sstat0);
  185. term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
  186. term |= ((INB(np, nc_sstat2) & 0x01) << 26) | /* sdp1 */
  187. ((INW(np, nc_sbdl) & 0xff) << 9) | /* d7-0 */
  188. ((INW(np, nc_sbdl) & 0xff00) << 10) | /* d15-8 */
  189. INB(np, nc_sbcl); /* req ack bsy sel atn msg cd io */
  190. if (!np->maxwide)
  191. term &= 0x3ffff;
  192. if (term != (2<<7)) {
  193. printf("%s: suspicious SCSI data while resetting the BUS.\n",
  194. sym_name(np));
  195. printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
  196. "0x%lx, expecting 0x%lx\n",
  197. sym_name(np),
  198. (np->features & FE_WIDE) ? "dp1,d15-8," : "",
  199. (u_long)term, (u_long)(2<<7));
  200. if (SYM_SETUP_SCSI_BUS_CHECK == 1)
  201. retv = 1;
  202. }
  203. out:
  204. OUTB(np, nc_scntl1, 0);
  205. return retv;
  206. }
  207. /*
  208. * Select SCSI clock frequency
  209. */
  210. static void sym_selectclock(struct sym_hcb *np, u_char scntl3)
  211. {
  212. /*
  213. * If multiplier not present or not selected, leave here.
  214. */
  215. if (np->multiplier <= 1) {
  216. OUTB(np, nc_scntl3, scntl3);
  217. return;
  218. }
  219. if (sym_verbose >= 2)
  220. printf ("%s: enabling clock multiplier\n", sym_name(np));
  221. OUTB(np, nc_stest1, DBLEN); /* Enable clock multiplier */
  222. /*
  223. * Wait for the LCKFRQ bit to be set if supported by the chip.
  224. * Otherwise wait 50 micro-seconds (at least).
  225. */
  226. if (np->features & FE_LCKFRQ) {
  227. int i = 20;
  228. while (!(INB(np, nc_stest4) & LCKFRQ) && --i > 0)
  229. udelay(20);
  230. if (!i)
  231. printf("%s: the chip cannot lock the frequency\n",
  232. sym_name(np));
  233. } else {
  234. INB(np, nc_mbox1);
  235. udelay(50+10);
  236. }
  237. OUTB(np, nc_stest3, HSC); /* Halt the scsi clock */
  238. OUTB(np, nc_scntl3, scntl3);
  239. OUTB(np, nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
  240. OUTB(np, nc_stest3, 0x00); /* Restart scsi clock */
  241. }
  242. /*
  243. * Determine the chip's clock frequency.
  244. *
  245. * This is essential for the negotiation of the synchronous
  246. * transfer rate.
  247. *
  248. * Note: we have to return the correct value.
  249. * THERE IS NO SAFE DEFAULT VALUE.
  250. *
  251. * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
  252. * 53C860 and 53C875 rev. 1 support fast20 transfers but
  253. * do not have a clock doubler and so are provided with a
  254. * 80 MHz clock. All other fast20 boards incorporate a doubler
  255. * and so should be delivered with a 40 MHz clock.
  256. * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
  257. * clock and provide a clock quadrupler (160 Mhz).
  258. */
  259. /*
  260. * calculate SCSI clock frequency (in KHz)
  261. */
  262. static unsigned getfreq (struct sym_hcb *np, int gen)
  263. {
  264. unsigned int ms = 0;
  265. unsigned int f;
  266. /*
  267. * Measure GEN timer delay in order
  268. * to calculate SCSI clock frequency
  269. *
  270. * This code will never execute too
  271. * many loop iterations (if DELAY is
  272. * reasonably correct). It could get
  273. * too low a delay (too high a freq.)
  274. * if the CPU is slow executing the
  275. * loop for some reason (an NMI, for
  276. * example). For this reason we will
  277. * if multiple measurements are to be
  278. * performed trust the higher delay
  279. * (lower frequency returned).
  280. */
  281. OUTW(np, nc_sien, 0); /* mask all scsi interrupts */
  282. INW(np, nc_sist); /* clear pending scsi interrupt */
  283. OUTB(np, nc_dien, 0); /* mask all dma interrupts */
  284. INW(np, nc_sist); /* another one, just to be sure :) */
  285. /*
  286. * The C1010-33 core does not report GEN in SIST,
  287. * if this interrupt is masked in SIEN.
  288. * I don't know yet if the C1010-66 behaves the same way.
  289. */
  290. if (np->features & FE_C10) {
  291. OUTW(np, nc_sien, GEN);
  292. OUTB(np, nc_istat1, SIRQD);
  293. }
  294. OUTB(np, nc_scntl3, 4); /* set pre-scaler to divide by 3 */
  295. OUTB(np, nc_stime1, 0); /* disable general purpose timer */
  296. OUTB(np, nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
  297. while (!(INW(np, nc_sist) & GEN) && ms++ < 100000)
  298. udelay(1000/4); /* count in 1/4 of ms */
  299. OUTB(np, nc_stime1, 0); /* disable general purpose timer */
  300. /*
  301. * Undo C1010-33 specific settings.
  302. */
  303. if (np->features & FE_C10) {
  304. OUTW(np, nc_sien, 0);
  305. OUTB(np, nc_istat1, 0);
  306. }
  307. /*
  308. * set prescaler to divide by whatever 0 means
  309. * 0 ought to choose divide by 2, but appears
  310. * to set divide by 3.5 mode in my 53c810 ...
  311. */
  312. OUTB(np, nc_scntl3, 0);
  313. /*
  314. * adjust for prescaler, and convert into KHz
  315. */
  316. f = ms ? ((1 << gen) * (4340*4)) / ms : 0;
  317. /*
  318. * The C1010-33 result is biased by a factor
  319. * of 2/3 compared to earlier chips.
  320. */
  321. if (np->features & FE_C10)
  322. f = (f * 2) / 3;
  323. if (sym_verbose >= 2)
  324. printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
  325. sym_name(np), gen, ms/4, f);
  326. return f;
  327. }
  328. static unsigned sym_getfreq (struct sym_hcb *np)
  329. {
  330. u_int f1, f2;
  331. int gen = 8;
  332. getfreq (np, gen); /* throw away first result */
  333. f1 = getfreq (np, gen);
  334. f2 = getfreq (np, gen);
  335. if (f1 > f2) f1 = f2; /* trust lower result */
  336. return f1;
  337. }
  338. /*
  339. * Get/probe chip SCSI clock frequency
  340. */
  341. static void sym_getclock (struct sym_hcb *np, int mult)
  342. {
  343. unsigned char scntl3 = np->sv_scntl3;
  344. unsigned char stest1 = np->sv_stest1;
  345. unsigned f1;
  346. np->multiplier = 1;
  347. f1 = 40000;
  348. /*
  349. * True with 875/895/896/895A with clock multiplier selected
  350. */
  351. if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
  352. if (sym_verbose >= 2)
  353. printf ("%s: clock multiplier found\n", sym_name(np));
  354. np->multiplier = mult;
  355. }
  356. /*
  357. * If multiplier not found or scntl3 not 7,5,3,
  358. * reset chip and get frequency from general purpose timer.
  359. * Otherwise trust scntl3 BIOS setting.
  360. */
  361. if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
  362. OUTB(np, nc_stest1, 0); /* make sure doubler is OFF */
  363. f1 = sym_getfreq (np);
  364. if (sym_verbose)
  365. printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
  366. if (f1 < 45000) f1 = 40000;
  367. else if (f1 < 55000) f1 = 50000;
  368. else f1 = 80000;
  369. if (f1 < 80000 && mult > 1) {
  370. if (sym_verbose >= 2)
  371. printf ("%s: clock multiplier assumed\n",
  372. sym_name(np));
  373. np->multiplier = mult;
  374. }
  375. } else {
  376. if ((scntl3 & 7) == 3) f1 = 40000;
  377. else if ((scntl3 & 7) == 5) f1 = 80000;
  378. else f1 = 160000;
  379. f1 /= np->multiplier;
  380. }
  381. /*
  382. * Compute controller synchronous parameters.
  383. */
  384. f1 *= np->multiplier;
  385. np->clock_khz = f1;
  386. }
  387. /*
  388. * Get/probe PCI clock frequency
  389. */
  390. static int sym_getpciclock (struct sym_hcb *np)
  391. {
  392. int f = 0;
  393. /*
  394. * For now, we only need to know about the actual
  395. * PCI BUS clock frequency for C1010-66 chips.
  396. */
  397. #if 1
  398. if (np->features & FE_66MHZ) {
  399. #else
  400. if (1) {
  401. #endif
  402. OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
  403. f = sym_getfreq(np);
  404. OUTB(np, nc_stest1, 0);
  405. }
  406. np->pciclk_khz = f;
  407. return f;
  408. }
  409. /*
  410. * SYMBIOS chip clock divisor table.
  411. *
  412. * Divisors are multiplied by 10,000,000 in order to make
  413. * calculations more simple.
  414. */
  415. #define _5M 5000000
  416. static const u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
  417. /*
  418. * Get clock factor and sync divisor for a given
  419. * synchronous factor period.
  420. */
  421. static int
  422. sym_getsync(struct sym_hcb *np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
  423. {
  424. u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
  425. int div = np->clock_divn; /* Number of divisors supported */
  426. u32 fak; /* Sync factor in sxfer */
  427. u32 per; /* Period in tenths of ns */
  428. u32 kpc; /* (per * clk) */
  429. int ret;
  430. /*
  431. * Compute the synchronous period in tenths of nano-seconds
  432. */
  433. if (dt && sfac <= 9) per = 125;
  434. else if (sfac <= 10) per = 250;
  435. else if (sfac == 11) per = 303;
  436. else if (sfac == 12) per = 500;
  437. else per = 40 * sfac;
  438. ret = per;
  439. kpc = per * clk;
  440. if (dt)
  441. kpc <<= 1;
  442. /*
  443. * For earliest C10 revision 0, we cannot use extra
  444. * clocks for the setting of the SCSI clocking.
  445. * Note that this limits the lowest sync data transfer
  446. * to 5 Mega-transfers per second and may result in
  447. * using higher clock divisors.
  448. */
  449. #if 1
  450. if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
  451. /*
  452. * Look for the lowest clock divisor that allows an
  453. * output speed not faster than the period.
  454. */
  455. while (div > 0) {
  456. --div;
  457. if (kpc > (div_10M[div] << 2)) {
  458. ++div;
  459. break;
  460. }
  461. }
  462. fak = 0; /* No extra clocks */
  463. if (div == np->clock_divn) { /* Are we too fast ? */
  464. ret = -1;
  465. }
  466. *divp = div;
  467. *fakp = fak;
  468. return ret;
  469. }
  470. #endif
  471. /*
  472. * Look for the greatest clock divisor that allows an
  473. * input speed faster than the period.
  474. */
  475. while (--div > 0)
  476. if (kpc >= (div_10M[div] << 2)) break;
  477. /*
  478. * Calculate the lowest clock factor that allows an output
  479. * speed not faster than the period, and the max output speed.
  480. * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
  481. * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
  482. */
  483. if (dt) {
  484. fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
  485. /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
  486. } else {
  487. fak = (kpc - 1) / div_10M[div] + 1 - 4;
  488. /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
  489. }
  490. /*
  491. * Check against our hardware limits, or bugs :).
  492. */
  493. if (fak > 2) {
  494. fak = 2;
  495. ret = -1;
  496. }
  497. /*
  498. * Compute and return sync parameters.
  499. */
  500. *divp = div;
  501. *fakp = fak;
  502. return ret;
  503. }
  504. /*
  505. * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
  506. * 128 transfers. All chips support at least 16 transfers
  507. * bursts. The 825A, 875 and 895 chips support bursts of up
  508. * to 128 transfers and the 895A and 896 support bursts of up
  509. * to 64 transfers. All other chips support up to 16
  510. * transfers bursts.
  511. *
  512. * For PCI 32 bit data transfers each transfer is a DWORD.
  513. * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
  514. *
  515. * We use log base 2 (burst length) as internal code, with
  516. * value 0 meaning "burst disabled".
  517. */
  518. /*
  519. * Burst length from burst code.
  520. */
  521. #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
  522. /*
  523. * Burst code from io register bits.
  524. */
  525. #define burst_code(dmode, ctest4, ctest5) \
  526. (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
  527. /*
  528. * Set initial io register bits from burst code.
  529. */
  530. static inline void sym_init_burst(struct sym_hcb *np, u_char bc)
  531. {
  532. np->rv_ctest4 &= ~0x80;
  533. np->rv_dmode &= ~(0x3 << 6);
  534. np->rv_ctest5 &= ~0x4;
  535. if (!bc) {
  536. np->rv_ctest4 |= 0x80;
  537. }
  538. else {
  539. --bc;
  540. np->rv_dmode |= ((bc & 0x3) << 6);
  541. np->rv_ctest5 |= (bc & 0x4);
  542. }
  543. }
  544. /*
  545. * Save initial settings of some IO registers.
  546. * Assumed to have been set by BIOS.
  547. * We cannot reset the chip prior to reading the
  548. * IO registers, since informations will be lost.
  549. * Since the SCRIPTS processor may be running, this
  550. * is not safe on paper, but it seems to work quite
  551. * well. :)
  552. */
  553. static void sym_save_initial_setting (struct sym_hcb *np)
  554. {
  555. np->sv_scntl0 = INB(np, nc_scntl0) & 0x0a;
  556. np->sv_scntl3 = INB(np, nc_scntl3) & 0x07;
  557. np->sv_dmode = INB(np, nc_dmode) & 0xce;
  558. np->sv_dcntl = INB(np, nc_dcntl) & 0xa8;
  559. np->sv_ctest3 = INB(np, nc_ctest3) & 0x01;
  560. np->sv_ctest4 = INB(np, nc_ctest4) & 0x80;
  561. np->sv_gpcntl = INB(np, nc_gpcntl);
  562. np->sv_stest1 = INB(np, nc_stest1);
  563. np->sv_stest2 = INB(np, nc_stest2) & 0x20;
  564. np->sv_stest4 = INB(np, nc_stest4);
  565. if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
  566. np->sv_scntl4 = INB(np, nc_scntl4);
  567. np->sv_ctest5 = INB(np, nc_ctest5) & 0x04;
  568. }
  569. else
  570. np->sv_ctest5 = INB(np, nc_ctest5) & 0x24;
  571. }
  572. /*
  573. * Set SCSI BUS mode.
  574. * - LVD capable chips (895/895A/896/1010) report the current BUS mode
  575. * through the STEST4 IO register.
  576. * - For previous generation chips (825/825A/875), the user has to tell us
  577. * how to check against HVD, since a 100% safe algorithm is not possible.
  578. */
  579. static void sym_set_bus_mode(struct sym_hcb *np, struct sym_nvram *nvram)
  580. {
  581. if (np->scsi_mode)
  582. return;
  583. np->scsi_mode = SMODE_SE;
  584. if (np->features & (FE_ULTRA2|FE_ULTRA3))
  585. np->scsi_mode = (np->sv_stest4 & SMODE);
  586. else if (np->features & FE_DIFF) {
  587. if (SYM_SETUP_SCSI_DIFF == 1) {
  588. if (np->sv_scntl3) {
  589. if (np->sv_stest2 & 0x20)
  590. np->scsi_mode = SMODE_HVD;
  591. } else if (nvram->type == SYM_SYMBIOS_NVRAM) {
  592. if (!(INB(np, nc_gpreg) & 0x08))
  593. np->scsi_mode = SMODE_HVD;
  594. }
  595. } else if (SYM_SETUP_SCSI_DIFF == 2)
  596. np->scsi_mode = SMODE_HVD;
  597. }
  598. if (np->scsi_mode == SMODE_HVD)
  599. np->rv_stest2 |= 0x20;
  600. }
  601. /*
  602. * Prepare io register values used by sym_start_up()
  603. * according to selected and supported features.
  604. */
  605. static int sym_prepare_setting(struct Scsi_Host *shost, struct sym_hcb *np, struct sym_nvram *nvram)
  606. {
  607. struct sym_data *sym_data = shost_priv(shost);
  608. struct pci_dev *pdev = sym_data->pdev;
  609. u_char burst_max;
  610. u32 period;
  611. int i;
  612. np->maxwide = (np->features & FE_WIDE) ? 1 : 0;
  613. /*
  614. * Guess the frequency of the chip's clock.
  615. */
  616. if (np->features & (FE_ULTRA3 | FE_ULTRA2))
  617. np->clock_khz = 160000;
  618. else if (np->features & FE_ULTRA)
  619. np->clock_khz = 80000;
  620. else
  621. np->clock_khz = 40000;
  622. /*
  623. * Get the clock multiplier factor.
  624. */
  625. if (np->features & FE_QUAD)
  626. np->multiplier = 4;
  627. else if (np->features & FE_DBLR)
  628. np->multiplier = 2;
  629. else
  630. np->multiplier = 1;
  631. /*
  632. * Measure SCSI clock frequency for chips
  633. * it may vary from assumed one.
  634. */
  635. if (np->features & FE_VARCLK)
  636. sym_getclock(np, np->multiplier);
  637. /*
  638. * Divisor to be used for async (timer pre-scaler).
  639. */
  640. i = np->clock_divn - 1;
  641. while (--i >= 0) {
  642. if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
  643. ++i;
  644. break;
  645. }
  646. }
  647. np->rv_scntl3 = i+1;
  648. /*
  649. * The C1010 uses hardwired divisors for async.
  650. * So, we just throw away, the async. divisor.:-)
  651. */
  652. if (np->features & FE_C10)
  653. np->rv_scntl3 = 0;
  654. /*
  655. * Minimum synchronous period factor supported by the chip.
  656. * Btw, 'period' is in tenths of nanoseconds.
  657. */
  658. period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
  659. if (period <= 250) np->minsync = 10;
  660. else if (period <= 303) np->minsync = 11;
  661. else if (period <= 500) np->minsync = 12;
  662. else np->minsync = (period + 40 - 1) / 40;
  663. /*
  664. * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
  665. */
  666. if (np->minsync < 25 &&
  667. !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
  668. np->minsync = 25;
  669. else if (np->minsync < 12 &&
  670. !(np->features & (FE_ULTRA2|FE_ULTRA3)))
  671. np->minsync = 12;
  672. /*
  673. * Maximum synchronous period factor supported by the chip.
  674. */
  675. period = div64_ul(11 * div_10M[np->clock_divn - 1], 4 * np->clock_khz);
  676. np->maxsync = period > 2540 ? 254 : period / 10;
  677. /*
  678. * If chip is a C1010, guess the sync limits in DT mode.
  679. */
  680. if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
  681. if (np->clock_khz == 160000) {
  682. np->minsync_dt = 9;
  683. np->maxsync_dt = 50;
  684. np->maxoffs_dt = nvram->type ? 62 : 31;
  685. }
  686. }
  687. /*
  688. * 64 bit addressing (895A/896/1010) ?
  689. */
  690. if (np->features & FE_DAC) {
  691. if (!use_dac(np))
  692. np->rv_ccntl1 |= (DDAC);
  693. else if (SYM_CONF_DMA_ADDRESSING_MODE == 1)
  694. np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
  695. else if (SYM_CONF_DMA_ADDRESSING_MODE == 2)
  696. np->rv_ccntl1 |= (0 | EXTIBMV);
  697. }
  698. /*
  699. * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
  700. */
  701. if (np->features & FE_NOPM)
  702. np->rv_ccntl0 |= (ENPMJ);
  703. /*
  704. * C1010-33 Errata: Part Number:609-039638 (rev. 1) is fixed.
  705. * In dual channel mode, contention occurs if internal cycles
  706. * are used. Disable internal cycles.
  707. */
  708. if (pdev->device == PCI_DEVICE_ID_LSI_53C1010_33 &&
  709. pdev->revision < 0x1)
  710. np->rv_ccntl0 |= DILS;
  711. /*
  712. * Select burst length (dwords)
  713. */
  714. burst_max = SYM_SETUP_BURST_ORDER;
  715. if (burst_max == 255)
  716. burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
  717. np->sv_ctest5);
  718. if (burst_max > 7)
  719. burst_max = 7;
  720. if (burst_max > np->maxburst)
  721. burst_max = np->maxburst;
  722. /*
  723. * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
  724. * This chip and the 860 Rev 1 may wrongly use PCI cache line
  725. * based transactions on LOAD/STORE instructions. So we have
  726. * to prevent these chips from using such PCI transactions in
  727. * this driver. The generic ncr driver that does not use
  728. * LOAD/STORE instructions does not need this work-around.
  729. */
  730. if ((pdev->device == PCI_DEVICE_ID_NCR_53C810 &&
  731. pdev->revision >= 0x10 && pdev->revision <= 0x11) ||
  732. (pdev->device == PCI_DEVICE_ID_NCR_53C860 &&
  733. pdev->revision <= 0x1))
  734. np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
  735. /*
  736. * Select all supported special features.
  737. * If we are using on-board RAM for scripts, prefetch (PFEN)
  738. * does not help, but burst op fetch (BOF) does.
  739. * Disabling PFEN makes sure BOF will be used.
  740. */
  741. if (np->features & FE_ERL)
  742. np->rv_dmode |= ERL; /* Enable Read Line */
  743. if (np->features & FE_BOF)
  744. np->rv_dmode |= BOF; /* Burst Opcode Fetch */
  745. if (np->features & FE_ERMP)
  746. np->rv_dmode |= ERMP; /* Enable Read Multiple */
  747. #if 1
  748. if ((np->features & FE_PFEN) && !np->ram_ba)
  749. #else
  750. if (np->features & FE_PFEN)
  751. #endif
  752. np->rv_dcntl |= PFEN; /* Prefetch Enable */
  753. if (np->features & FE_CLSE)
  754. np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
  755. if (np->features & FE_WRIE)
  756. np->rv_ctest3 |= WRIE; /* Write and Invalidate */
  757. if (np->features & FE_DFS)
  758. np->rv_ctest5 |= DFS; /* Dma Fifo Size */
  759. /*
  760. * Select some other
  761. */
  762. np->rv_ctest4 |= MPEE; /* Master parity checking */
  763. np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
  764. /*
  765. * Get parity checking, host ID and verbose mode from NVRAM
  766. */
  767. np->myaddr = 255;
  768. np->scsi_mode = 0;
  769. sym_nvram_setup_host(shost, np, nvram);
  770. /*
  771. * Get SCSI addr of host adapter (set by bios?).
  772. */
  773. if (np->myaddr == 255) {
  774. np->myaddr = INB(np, nc_scid) & 0x07;
  775. if (!np->myaddr)
  776. np->myaddr = SYM_SETUP_HOST_ID;
  777. }
  778. /*
  779. * Prepare initial io register bits for burst length
  780. */
  781. sym_init_burst(np, burst_max);
  782. sym_set_bus_mode(np, nvram);
  783. /*
  784. * Set LED support from SCRIPTS.
  785. * Ignore this feature for boards known to use a
  786. * specific GPIO wiring and for the 895A, 896
  787. * and 1010 that drive the LED directly.
  788. */
  789. if ((SYM_SETUP_SCSI_LED ||
  790. (nvram->type == SYM_SYMBIOS_NVRAM ||
  791. (nvram->type == SYM_TEKRAM_NVRAM &&
  792. pdev->device == PCI_DEVICE_ID_NCR_53C895))) &&
  793. !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
  794. np->features |= FE_LED0;
  795. /*
  796. * Set irq mode.
  797. */
  798. switch(SYM_SETUP_IRQ_MODE & 3) {
  799. case 2:
  800. np->rv_dcntl |= IRQM;
  801. break;
  802. case 1:
  803. np->rv_dcntl |= (np->sv_dcntl & IRQM);
  804. break;
  805. default:
  806. break;
  807. }
  808. /*
  809. * Configure targets according to driver setup.
  810. * If NVRAM present get targets setup from NVRAM.
  811. */
  812. for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
  813. struct sym_tcb *tp = &np->target[i];
  814. tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
  815. tp->usrtags = SYM_SETUP_MAX_TAG;
  816. tp->usr_width = np->maxwide;
  817. tp->usr_period = 9;
  818. sym_nvram_setup_target(tp, i, nvram);
  819. if (!tp->usrtags)
  820. tp->usrflags &= ~SYM_TAGS_ENABLED;
  821. }
  822. /*
  823. * Let user know about the settings.
  824. */
  825. printf("%s: %s, ID %d, Fast-%d, %s, %s\n", sym_name(np),
  826. sym_nvram_type(nvram), np->myaddr,
  827. (np->features & FE_ULTRA3) ? 80 :
  828. (np->features & FE_ULTRA2) ? 40 :
  829. (np->features & FE_ULTRA) ? 20 : 10,
  830. sym_scsi_bus_mode(np->scsi_mode),
  831. (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
  832. /*
  833. * Tell him more on demand.
  834. */
  835. if (sym_verbose) {
  836. printf("%s: %s IRQ line driver%s\n",
  837. sym_name(np),
  838. np->rv_dcntl & IRQM ? "totem pole" : "open drain",
  839. np->ram_ba ? ", using on-chip SRAM" : "");
  840. printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
  841. if (np->features & FE_NOPM)
  842. printf("%s: handling phase mismatch from SCRIPTS.\n",
  843. sym_name(np));
  844. }
  845. /*
  846. * And still more.
  847. */
  848. if (sym_verbose >= 2) {
  849. printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
  850. "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
  851. sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
  852. np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
  853. printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
  854. "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
  855. sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
  856. np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
  857. }
  858. return 0;
  859. }
  860. /*
  861. * Test the pci bus snoop logic :-(
  862. *
  863. * Has to be called with interrupts disabled.
  864. */
  865. #ifdef CONFIG_SCSI_SYM53C8XX_MMIO
  866. static int sym_regtest(struct sym_hcb *np)
  867. {
  868. register volatile u32 data;
  869. /*
  870. * chip registers may NOT be cached.
  871. * write 0xffffffff to a read only register area,
  872. * and try to read it back.
  873. */
  874. data = 0xffffffff;
  875. OUTL(np, nc_dstat, data);
  876. data = INL(np, nc_dstat);
  877. #if 1
  878. if (data == 0xffffffff) {
  879. #else
  880. if ((data & 0xe2f0fffd) != 0x02000080) {
  881. #endif
  882. printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
  883. (unsigned) data);
  884. return 0x10;
  885. }
  886. return 0;
  887. }
  888. #else
  889. static inline int sym_regtest(struct sym_hcb *np)
  890. {
  891. return 0;
  892. }
  893. #endif
  894. static int sym_snooptest(struct sym_hcb *np)
  895. {
  896. u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
  897. int i, err;
  898. err = sym_regtest(np);
  899. if (err)
  900. return err;
  901. restart_test:
  902. /*
  903. * Enable Master Parity Checking as we intend
  904. * to enable it for normal operations.
  905. */
  906. OUTB(np, nc_ctest4, (np->rv_ctest4 & MPEE));
  907. /*
  908. * init
  909. */
  910. pc = SCRIPTZ_BA(np, snooptest);
  911. host_wr = 1;
  912. sym_wr = 2;
  913. /*
  914. * Set memory and register.
  915. */
  916. np->scratch = cpu_to_scr(host_wr);
  917. OUTL(np, nc_temp, sym_wr);
  918. /*
  919. * Start script (exchange values)
  920. */
  921. OUTL(np, nc_dsa, np->hcb_ba);
  922. OUTL_DSP(np, pc);
  923. /*
  924. * Wait 'til done (with timeout)
  925. */
  926. for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
  927. if (INB(np, nc_istat) & (INTF|SIP|DIP))
  928. break;
  929. if (i>=SYM_SNOOP_TIMEOUT) {
  930. printf ("CACHE TEST FAILED: timeout.\n");
  931. return (0x20);
  932. }
  933. /*
  934. * Check for fatal DMA errors.
  935. */
  936. dstat = INB(np, nc_dstat);
  937. #if 1 /* Band aiding for broken hardwares that fail PCI parity */
  938. if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
  939. printf ("%s: PCI DATA PARITY ERROR DETECTED - "
  940. "DISABLING MASTER DATA PARITY CHECKING.\n",
  941. sym_name(np));
  942. np->rv_ctest4 &= ~MPEE;
  943. goto restart_test;
  944. }
  945. #endif
  946. if (dstat & (MDPE|BF|IID)) {
  947. printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
  948. return (0x80);
  949. }
  950. /*
  951. * Save termination position.
  952. */
  953. pc = INL(np, nc_dsp);
  954. /*
  955. * Read memory and register.
  956. */
  957. host_rd = scr_to_cpu(np->scratch);
  958. sym_rd = INL(np, nc_scratcha);
  959. sym_bk = INL(np, nc_temp);
  960. /*
  961. * Check termination position.
  962. */
  963. if (pc != SCRIPTZ_BA(np, snoopend)+8) {
  964. printf ("CACHE TEST FAILED: script execution failed.\n");
  965. printf ("start=%08lx, pc=%08lx, end=%08lx\n",
  966. (u_long) SCRIPTZ_BA(np, snooptest), (u_long) pc,
  967. (u_long) SCRIPTZ_BA(np, snoopend) +8);
  968. return (0x40);
  969. }
  970. /*
  971. * Show results.
  972. */
  973. if (host_wr != sym_rd) {
  974. printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
  975. (int) host_wr, (int) sym_rd);
  976. err |= 1;
  977. }
  978. if (host_rd != sym_wr) {
  979. printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
  980. (int) sym_wr, (int) host_rd);
  981. err |= 2;
  982. }
  983. if (sym_bk != sym_wr) {
  984. printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
  985. (int) sym_wr, (int) sym_bk);
  986. err |= 4;
  987. }
  988. return err;
  989. }
  990. /*
  991. * log message for real hard errors
  992. *
  993. * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sx/s3/s4) @ name (dsp:dbc).
  994. * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
  995. *
  996. * exception register:
  997. * ds: dstat
  998. * si: sist
  999. *
  1000. * SCSI bus lines:
  1001. * so: control lines as driven by chip.
  1002. * si: control lines as seen by chip.
  1003. * sd: scsi data lines as seen by chip.
  1004. *
  1005. * wide/fastmode:
  1006. * sx: sxfer (see the manual)
  1007. * s3: scntl3 (see the manual)
  1008. * s4: scntl4 (see the manual)
  1009. *
  1010. * current script command:
  1011. * dsp: script address (relative to start of script).
  1012. * dbc: first word of script command.
  1013. *
  1014. * First 24 register of the chip:
  1015. * r0..rf
  1016. */
  1017. static void sym_log_hard_error(struct Scsi_Host *shost, u_short sist, u_char dstat)
  1018. {
  1019. struct sym_hcb *np = sym_get_hcb(shost);
  1020. u32 dsp;
  1021. int script_ofs;
  1022. int script_size;
  1023. char *script_name;
  1024. u_char *script_base;
  1025. int i;
  1026. dsp = INL(np, nc_dsp);
  1027. if (dsp > np->scripta_ba &&
  1028. dsp <= np->scripta_ba + np->scripta_sz) {
  1029. script_ofs = dsp - np->scripta_ba;
  1030. script_size = np->scripta_sz;
  1031. script_base = (u_char *) np->scripta0;
  1032. script_name = "scripta";
  1033. }
  1034. else if (np->scriptb_ba < dsp &&
  1035. dsp <= np->scriptb_ba + np->scriptb_sz) {
  1036. script_ofs = dsp - np->scriptb_ba;
  1037. script_size = np->scriptb_sz;
  1038. script_base = (u_char *) np->scriptb0;
  1039. script_name = "scriptb";
  1040. } else {
  1041. script_ofs = dsp;
  1042. script_size = 0;
  1043. script_base = NULL;
  1044. script_name = "mem";
  1045. }
  1046. printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x/%x) @ (%s %x:%08x).\n",
  1047. sym_name(np), (unsigned)INB(np, nc_sdid)&0x0f, dstat, sist,
  1048. (unsigned)INB(np, nc_socl), (unsigned)INB(np, nc_sbcl),
  1049. (unsigned)INB(np, nc_sbdl), (unsigned)INB(np, nc_sxfer),
  1050. (unsigned)INB(np, nc_scntl3),
  1051. (np->features & FE_C10) ? (unsigned)INB(np, nc_scntl4) : 0,
  1052. script_name, script_ofs, (unsigned)INL(np, nc_dbc));
  1053. if (((script_ofs & 3) == 0) &&
  1054. (unsigned)script_ofs < script_size) {
  1055. printf ("%s: script cmd = %08x\n", sym_name(np),
  1056. scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
  1057. }
  1058. printf("%s: regdump:", sym_name(np));
  1059. for (i = 0; i < 24; i++)
  1060. printf(" %02x", (unsigned)INB_OFF(np, i));
  1061. printf(".\n");
  1062. /*
  1063. * PCI BUS error.
  1064. */
  1065. if (dstat & (MDPE|BF))
  1066. sym_log_bus_error(shost);
  1067. }
  1068. void sym_dump_registers(struct Scsi_Host *shost)
  1069. {
  1070. struct sym_hcb *np = sym_get_hcb(shost);
  1071. u_short sist;
  1072. u_char dstat;
  1073. sist = INW(np, nc_sist);
  1074. dstat = INB(np, nc_dstat);
  1075. sym_log_hard_error(shost, sist, dstat);
  1076. }
  1077. static struct sym_chip sym_dev_table[] = {
  1078. {PCI_DEVICE_ID_NCR_53C810, 0x0f, "810", 4, 8, 4, 64,
  1079. FE_ERL}
  1080. ,
  1081. #ifdef SYM_DEBUG_GENERIC_SUPPORT
  1082. {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1,
  1083. FE_BOF}
  1084. ,
  1085. #else
  1086. {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1,
  1087. FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
  1088. ,
  1089. #endif
  1090. {PCI_DEVICE_ID_NCR_53C815, 0xff, "815", 4, 8, 4, 64,
  1091. FE_BOF|FE_ERL}
  1092. ,
  1093. {PCI_DEVICE_ID_NCR_53C825, 0x0f, "825", 6, 8, 4, 64,
  1094. FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
  1095. ,
  1096. {PCI_DEVICE_ID_NCR_53C825, 0xff, "825a", 6, 8, 4, 2,
  1097. FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
  1098. ,
  1099. {PCI_DEVICE_ID_NCR_53C860, 0xff, "860", 4, 8, 5, 1,
  1100. FE_ULTRA|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
  1101. ,
  1102. {PCI_DEVICE_ID_NCR_53C875, 0x01, "875", 6, 16, 5, 2,
  1103. FE_WIDE|FE_ULTRA|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1104. FE_RAM|FE_DIFF|FE_VARCLK}
  1105. ,
  1106. {PCI_DEVICE_ID_NCR_53C875, 0xff, "875", 6, 16, 5, 2,
  1107. FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1108. FE_RAM|FE_DIFF|FE_VARCLK}
  1109. ,
  1110. {PCI_DEVICE_ID_NCR_53C875J, 0xff, "875J", 6, 16, 5, 2,
  1111. FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1112. FE_RAM|FE_DIFF|FE_VARCLK}
  1113. ,
  1114. {PCI_DEVICE_ID_NCR_53C885, 0xff, "885", 6, 16, 5, 2,
  1115. FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1116. FE_RAM|FE_DIFF|FE_VARCLK}
  1117. ,
  1118. #ifdef SYM_DEBUG_GENERIC_SUPPORT
  1119. {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2,
  1120. FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
  1121. FE_RAM|FE_LCKFRQ}
  1122. ,
  1123. #else
  1124. {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2,
  1125. FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1126. FE_RAM|FE_LCKFRQ}
  1127. ,
  1128. #endif
  1129. {PCI_DEVICE_ID_NCR_53C896, 0xff, "896", 6, 31, 7, 4,
  1130. FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1131. FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
  1132. ,
  1133. {PCI_DEVICE_ID_LSI_53C895A, 0xff, "895a", 6, 31, 7, 4,
  1134. FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1135. FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
  1136. ,
  1137. {PCI_DEVICE_ID_LSI_53C875A, 0xff, "875a", 6, 31, 7, 4,
  1138. FE_WIDE|FE_ULTRA|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1139. FE_RAM|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
  1140. ,
  1141. {PCI_DEVICE_ID_LSI_53C1010_33, 0x00, "1010-33", 6, 31, 7, 8,
  1142. FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
  1143. FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
  1144. FE_C10}
  1145. ,
  1146. {PCI_DEVICE_ID_LSI_53C1010_33, 0xff, "1010-33", 6, 31, 7, 8,
  1147. FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
  1148. FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
  1149. FE_C10|FE_U3EN}
  1150. ,
  1151. {PCI_DEVICE_ID_LSI_53C1010_66, 0xff, "1010-66", 6, 31, 7, 8,
  1152. FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
  1153. FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
  1154. FE_C10|FE_U3EN}
  1155. ,
  1156. {PCI_DEVICE_ID_LSI_53C1510, 0xff, "1510d", 6, 31, 7, 4,
  1157. FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1158. FE_RAM|FE_IO256|FE_LEDC}
  1159. };
  1160. #define sym_num_devs (ARRAY_SIZE(sym_dev_table))
  1161. /*
  1162. * Look up the chip table.
  1163. *
  1164. * Return a pointer to the chip entry if found,
  1165. * zero otherwise.
  1166. */
  1167. struct sym_chip *
  1168. sym_lookup_chip_table (u_short device_id, u_char revision)
  1169. {
  1170. struct sym_chip *chip;
  1171. int i;
  1172. for (i = 0; i < sym_num_devs; i++) {
  1173. chip = &sym_dev_table[i];
  1174. if (device_id != chip->device_id)
  1175. continue;
  1176. if (revision > chip->revision_id)
  1177. continue;
  1178. return chip;
  1179. }
  1180. return NULL;
  1181. }
  1182. #if SYM_CONF_DMA_ADDRESSING_MODE == 2
  1183. /*
  1184. * Lookup the 64 bit DMA segments map.
  1185. * This is only used if the direct mapping
  1186. * has been unsuccessful.
  1187. */
  1188. int sym_lookup_dmap(struct sym_hcb *np, u32 h, int s)
  1189. {
  1190. int i;
  1191. if (!use_dac(np))
  1192. goto weird;
  1193. /* Look up existing mappings */
  1194. for (i = SYM_DMAP_SIZE-1; i > 0; i--) {
  1195. if (h == np->dmap_bah[i])
  1196. return i;
  1197. }
  1198. /* If direct mapping is free, get it */
  1199. if (!np->dmap_bah[s])
  1200. goto new;
  1201. /* Collision -> lookup free mappings */
  1202. for (s = SYM_DMAP_SIZE-1; s > 0; s--) {
  1203. if (!np->dmap_bah[s])
  1204. goto new;
  1205. }
  1206. weird:
  1207. panic("sym: ran out of 64 bit DMA segment registers");
  1208. return -1;
  1209. new:
  1210. np->dmap_bah[s] = h;
  1211. np->dmap_dirty = 1;
  1212. return s;
  1213. }
  1214. /*
  1215. * Update IO registers scratch C..R so they will be
  1216. * in sync. with queued CCB expectations.
  1217. */
  1218. static void sym_update_dmap_regs(struct sym_hcb *np)
  1219. {
  1220. int o, i;
  1221. if (!np->dmap_dirty)
  1222. return;
  1223. o = offsetof(struct sym_reg, nc_scrx[0]);
  1224. for (i = 0; i < SYM_DMAP_SIZE; i++) {
  1225. OUTL_OFF(np, o, np->dmap_bah[i]);
  1226. o += 4;
  1227. }
  1228. np->dmap_dirty = 0;
  1229. }
  1230. #endif
  1231. /* Enforce all the fiddly SPI rules and the chip limitations */
  1232. static void sym_check_goals(struct sym_hcb *np, struct scsi_target *starget,
  1233. struct sym_trans *goal)
  1234. {
  1235. if (!spi_support_wide(starget))
  1236. goal->width = 0;
  1237. if (!spi_support_sync(starget)) {
  1238. goal->iu = 0;
  1239. goal->dt = 0;
  1240. goal->qas = 0;
  1241. goal->offset = 0;
  1242. return;
  1243. }
  1244. if (spi_support_dt(starget)) {
  1245. if (spi_support_dt_only(starget))
  1246. goal->dt = 1;
  1247. if (goal->offset == 0)
  1248. goal->dt = 0;
  1249. } else {
  1250. goal->dt = 0;
  1251. }
  1252. /* Some targets fail to properly negotiate DT in SE mode */
  1253. if ((np->scsi_mode != SMODE_LVD) || !(np->features & FE_U3EN))
  1254. goal->dt = 0;
  1255. if (goal->dt) {
  1256. /* all DT transfers must be wide */
  1257. goal->width = 1;
  1258. if (goal->offset > np->maxoffs_dt)
  1259. goal->offset = np->maxoffs_dt;
  1260. if (goal->period < np->minsync_dt)
  1261. goal->period = np->minsync_dt;
  1262. if (goal->period > np->maxsync_dt)
  1263. goal->period = np->maxsync_dt;
  1264. } else {
  1265. goal->iu = goal->qas = 0;
  1266. if (goal->offset > np->maxoffs)
  1267. goal->offset = np->maxoffs;
  1268. if (goal->period < np->minsync)
  1269. goal->period = np->minsync;
  1270. if (goal->period > np->maxsync)
  1271. goal->period = np->maxsync;
  1272. }
  1273. }
  1274. /*
  1275. * Prepare the next negotiation message if needed.
  1276. *
  1277. * Fill in the part of message buffer that contains the
  1278. * negotiation and the nego_status field of the CCB.
  1279. * Returns the size of the message in bytes.
  1280. */
  1281. static int sym_prepare_nego(struct sym_hcb *np, struct sym_ccb *cp, u_char *msgptr)
  1282. {
  1283. struct sym_tcb *tp = &np->target[cp->target];
  1284. struct scsi_target *starget = tp->starget;
  1285. struct sym_trans *goal = &tp->tgoal;
  1286. int msglen = 0;
  1287. int nego;
  1288. sym_check_goals(np, starget, goal);
  1289. /*
  1290. * Many devices implement PPR in a buggy way, so only use it if we
  1291. * really want to.
  1292. */
  1293. if (goal->renego == NS_PPR || (goal->offset &&
  1294. (goal->iu || goal->dt || goal->qas || (goal->period < 0xa)))) {
  1295. nego = NS_PPR;
  1296. } else if (goal->renego == NS_WIDE || goal->width) {
  1297. nego = NS_WIDE;
  1298. } else if (goal->renego == NS_SYNC || goal->offset) {
  1299. nego = NS_SYNC;
  1300. } else {
  1301. goal->check_nego = 0;
  1302. nego = 0;
  1303. }
  1304. switch (nego) {
  1305. case NS_SYNC:
  1306. msglen += spi_populate_sync_msg(msgptr + msglen, goal->period,
  1307. goal->offset);
  1308. break;
  1309. case NS_WIDE:
  1310. msglen += spi_populate_width_msg(msgptr + msglen, goal->width);
  1311. break;
  1312. case NS_PPR:
  1313. msglen += spi_populate_ppr_msg(msgptr + msglen, goal->period,
  1314. goal->offset, goal->width,
  1315. (goal->iu ? PPR_OPT_IU : 0) |
  1316. (goal->dt ? PPR_OPT_DT : 0) |
  1317. (goal->qas ? PPR_OPT_QAS : 0));
  1318. break;
  1319. }
  1320. cp->nego_status = nego;
  1321. if (nego) {
  1322. tp->nego_cp = cp; /* Keep track a nego will be performed */
  1323. if (DEBUG_FLAGS & DEBUG_NEGO) {
  1324. sym_print_nego_msg(np, cp->target,
  1325. nego == NS_SYNC ? "sync msgout" :
  1326. nego == NS_WIDE ? "wide msgout" :
  1327. "ppr msgout", msgptr);
  1328. }
  1329. }
  1330. return msglen;
  1331. }
  1332. /*
  1333. * Insert a job into the start queue.
  1334. */
  1335. void sym_put_start_queue(struct sym_hcb *np, struct sym_ccb *cp)
  1336. {
  1337. u_short qidx;
  1338. #ifdef SYM_CONF_IARB_SUPPORT
  1339. /*
  1340. * If the previously queued CCB is not yet done,
  1341. * set the IARB hint. The SCRIPTS will go with IARB
  1342. * for this job when starting the previous one.
  1343. * We leave devices a chance to win arbitration by
  1344. * not using more than 'iarb_max' consecutive
  1345. * immediate arbitrations.
  1346. */
  1347. if (np->last_cp && np->iarb_count < np->iarb_max) {
  1348. np->last_cp->host_flags |= HF_HINT_IARB;
  1349. ++np->iarb_count;
  1350. }
  1351. else
  1352. np->iarb_count = 0;
  1353. np->last_cp = cp;
  1354. #endif
  1355. #if SYM_CONF_DMA_ADDRESSING_MODE == 2
  1356. /*
  1357. * Make SCRIPTS aware of the 64 bit DMA
  1358. * segment registers not being up-to-date.
  1359. */
  1360. if (np->dmap_dirty)
  1361. cp->host_xflags |= HX_DMAP_DIRTY;
  1362. #endif
  1363. /*
  1364. * Insert first the idle task and then our job.
  1365. * The MBs should ensure proper ordering.
  1366. */
  1367. qidx = np->squeueput + 2;
  1368. if (qidx >= MAX_QUEUE*2) qidx = 0;
  1369. np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
  1370. MEMORY_WRITE_BARRIER();
  1371. np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
  1372. np->squeueput = qidx;
  1373. if (DEBUG_FLAGS & DEBUG_QUEUE)
  1374. scmd_printk(KERN_DEBUG, cp->cmd, "queuepos=%d\n",
  1375. np->squeueput);
  1376. /*
  1377. * Script processor may be waiting for reselect.
  1378. * Wake it up.
  1379. */
  1380. MEMORY_WRITE_BARRIER();
  1381. OUTB(np, nc_istat, SIGP|np->istat_sem);
  1382. }
  1383. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  1384. /*
  1385. * Start next ready-to-start CCBs.
  1386. */
  1387. void sym_start_next_ccbs(struct sym_hcb *np, struct sym_lcb *lp, int maxn)
  1388. {
  1389. SYM_QUEHEAD *qp;
  1390. struct sym_ccb *cp;
  1391. /*
  1392. * Paranoia, as usual. :-)
  1393. */
  1394. assert(!lp->started_tags || !lp->started_no_tag);
  1395. /*
  1396. * Try to start as many commands as asked by caller.
  1397. * Prevent from having both tagged and untagged
  1398. * commands queued to the device at the same time.
  1399. */
  1400. while (maxn--) {
  1401. qp = sym_remque_head(&lp->waiting_ccbq);
  1402. if (!qp)
  1403. break;
  1404. cp = sym_que_entry(qp, struct sym_ccb, link2_ccbq);
  1405. if (cp->tag != NO_TAG) {
  1406. if (lp->started_no_tag ||
  1407. lp->started_tags >= lp->started_max) {
  1408. sym_insque_head(qp, &lp->waiting_ccbq);
  1409. break;
  1410. }
  1411. lp->itlq_tbl[cp->tag] = cpu_to_scr(cp->ccb_ba);
  1412. lp->head.resel_sa =
  1413. cpu_to_scr(SCRIPTA_BA(np, resel_tag));
  1414. ++lp->started_tags;
  1415. } else {
  1416. if (lp->started_no_tag || lp->started_tags) {
  1417. sym_insque_head(qp, &lp->waiting_ccbq);
  1418. break;
  1419. }
  1420. lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
  1421. lp->head.resel_sa =
  1422. cpu_to_scr(SCRIPTA_BA(np, resel_no_tag));
  1423. ++lp->started_no_tag;
  1424. }
  1425. cp->started = 1;
  1426. sym_insque_tail(qp, &lp->started_ccbq);
  1427. sym_put_start_queue(np, cp);
  1428. }
  1429. }
  1430. #endif /* SYM_OPT_HANDLE_DEVICE_QUEUEING */
  1431. /*
  1432. * The chip may have completed jobs. Look at the DONE QUEUE.
  1433. *
  1434. * On paper, memory read barriers may be needed here to
  1435. * prevent out of order LOADs by the CPU from having
  1436. * prefetched stale data prior to DMA having occurred.
  1437. */
  1438. static int sym_wakeup_done (struct sym_hcb *np)
  1439. {
  1440. struct sym_ccb *cp;
  1441. int i, n;
  1442. u32 dsa;
  1443. n = 0;
  1444. i = np->dqueueget;
  1445. /* MEMORY_READ_BARRIER(); */
  1446. while (1) {
  1447. dsa = scr_to_cpu(np->dqueue[i]);
  1448. if (!dsa)
  1449. break;
  1450. np->dqueue[i] = 0;
  1451. if ((i = i+2) >= MAX_QUEUE*2)
  1452. i = 0;
  1453. cp = sym_ccb_from_dsa(np, dsa);
  1454. if (cp) {
  1455. MEMORY_READ_BARRIER();
  1456. sym_complete_ok (np, cp);
  1457. ++n;
  1458. }
  1459. else
  1460. printf ("%s: bad DSA (%x) in done queue.\n",
  1461. sym_name(np), (u_int) dsa);
  1462. }
  1463. np->dqueueget = i;
  1464. return n;
  1465. }
  1466. /*
  1467. * Complete all CCBs queued to the COMP queue.
  1468. *
  1469. * These CCBs are assumed:
  1470. * - Not to be referenced either by devices or
  1471. * SCRIPTS-related queues and datas.
  1472. * - To have to be completed with an error condition
  1473. * or requeued.
  1474. *
  1475. * The device queue freeze count is incremented
  1476. * for each CCB that does not prevent this.
  1477. * This function is called when all CCBs involved
  1478. * in error handling/recovery have been reaped.
  1479. */
  1480. static void sym_flush_comp_queue(struct sym_hcb *np, int cam_status)
  1481. {
  1482. SYM_QUEHEAD *qp;
  1483. struct sym_ccb *cp;
  1484. while ((qp = sym_remque_head(&np->comp_ccbq)) != NULL) {
  1485. struct scsi_cmnd *cmd;
  1486. cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  1487. sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
  1488. /* Leave quiet CCBs waiting for resources */
  1489. if (cp->host_status == HS_WAIT)
  1490. continue;
  1491. cmd = cp->cmd;
  1492. if (cam_status)
  1493. sym_set_cam_status(cmd, cam_status);
  1494. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  1495. if (sym_get_cam_status(cmd) == DID_SOFT_ERROR) {
  1496. struct sym_tcb *tp = &np->target[cp->target];
  1497. struct sym_lcb *lp = sym_lp(tp, cp->lun);
  1498. if (lp) {
  1499. sym_remque(&cp->link2_ccbq);
  1500. sym_insque_tail(&cp->link2_ccbq,
  1501. &lp->waiting_ccbq);
  1502. if (cp->started) {
  1503. if (cp->tag != NO_TAG)
  1504. --lp->started_tags;
  1505. else
  1506. --lp->started_no_tag;
  1507. }
  1508. }
  1509. cp->started = 0;
  1510. continue;
  1511. }
  1512. #endif
  1513. sym_free_ccb(np, cp);
  1514. sym_xpt_done(np, cmd);
  1515. }
  1516. }
  1517. /*
  1518. * Complete all active CCBs with error.
  1519. * Used on CHIP/SCSI RESET.
  1520. */
  1521. static void sym_flush_busy_queue (struct sym_hcb *np, int cam_status)
  1522. {
  1523. /*
  1524. * Move all active CCBs to the COMP queue
  1525. * and flush this queue.
  1526. */
  1527. sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
  1528. sym_que_init(&np->busy_ccbq);
  1529. sym_flush_comp_queue(np, cam_status);
  1530. }
  1531. /*
  1532. * Start chip.
  1533. *
  1534. * 'reason' means:
  1535. * 0: initialisation.
  1536. * 1: SCSI BUS RESET delivered or received.
  1537. * 2: SCSI BUS MODE changed.
  1538. */
  1539. void sym_start_up(struct Scsi_Host *shost, int reason)
  1540. {
  1541. struct sym_data *sym_data = shost_priv(shost);
  1542. struct pci_dev *pdev = sym_data->pdev;
  1543. struct sym_hcb *np = sym_data->ncb;
  1544. int i;
  1545. u32 phys;
  1546. /*
  1547. * Reset chip if asked, otherwise just clear fifos.
  1548. */
  1549. if (reason == 1)
  1550. sym_soft_reset(np);
  1551. else {
  1552. OUTB(np, nc_stest3, TE|CSF);
  1553. OUTONB(np, nc_ctest3, CLF);
  1554. }
  1555. /*
  1556. * Clear Start Queue
  1557. */
  1558. phys = np->squeue_ba;
  1559. for (i = 0; i < MAX_QUEUE*2; i += 2) {
  1560. np->squeue[i] = cpu_to_scr(np->idletask_ba);
  1561. np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
  1562. }
  1563. np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
  1564. /*
  1565. * Start at first entry.
  1566. */
  1567. np->squeueput = 0;
  1568. /*
  1569. * Clear Done Queue
  1570. */
  1571. phys = np->dqueue_ba;
  1572. for (i = 0; i < MAX_QUEUE*2; i += 2) {
  1573. np->dqueue[i] = 0;
  1574. np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
  1575. }
  1576. np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
  1577. /*
  1578. * Start at first entry.
  1579. */
  1580. np->dqueueget = 0;
  1581. /*
  1582. * Install patches in scripts.
  1583. * This also let point to first position the start
  1584. * and done queue pointers used from SCRIPTS.
  1585. */
  1586. np->fw_patch(shost);
  1587. /*
  1588. * Wakeup all pending jobs.
  1589. */
  1590. sym_flush_busy_queue(np, DID_RESET);
  1591. /*
  1592. * Init chip.
  1593. */
  1594. OUTB(np, nc_istat, 0x00); /* Remove Reset, abort */
  1595. INB(np, nc_mbox1);
  1596. udelay(2000); /* The 895 needs time for the bus mode to settle */
  1597. OUTB(np, nc_scntl0, np->rv_scntl0 | 0xc0);
  1598. /* full arb., ena parity, par->ATN */
  1599. OUTB(np, nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
  1600. sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
  1601. OUTB(np, nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
  1602. OUTW(np, nc_respid, 1ul<<np->myaddr); /* Id to respond to */
  1603. OUTB(np, nc_istat , SIGP ); /* Signal Process */
  1604. OUTB(np, nc_dmode , np->rv_dmode); /* Burst length, dma mode */
  1605. OUTB(np, nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
  1606. OUTB(np, nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
  1607. OUTB(np, nc_ctest3, np->rv_ctest3); /* Write and invalidate */
  1608. OUTB(np, nc_ctest4, np->rv_ctest4); /* Master parity checking */
  1609. /* Extended Sreq/Sack filtering not supported on the C10 */
  1610. if (np->features & FE_C10)
  1611. OUTB(np, nc_stest2, np->rv_stest2);
  1612. else
  1613. OUTB(np, nc_stest2, EXT|np->rv_stest2);
  1614. OUTB(np, nc_stest3, TE); /* TolerANT enable */
  1615. OUTB(np, nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
  1616. /*
  1617. * For now, disable AIP generation on C1010-66.
  1618. */
  1619. if (pdev->device == PCI_DEVICE_ID_LSI_53C1010_66)
  1620. OUTB(np, nc_aipcntl1, DISAIP);
  1621. /*
  1622. * C10101 rev. 0 errata.
  1623. * Errant SGE's when in narrow. Write bits 4 & 5 of
  1624. * STEST1 register to disable SGE. We probably should do
  1625. * that from SCRIPTS for each selection/reselection, but
  1626. * I just don't want. :)
  1627. */
  1628. if (pdev->device == PCI_DEVICE_ID_LSI_53C1010_33 &&
  1629. pdev->revision < 1)
  1630. OUTB(np, nc_stest1, INB(np, nc_stest1) | 0x30);
  1631. /*
  1632. * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
  1633. * Disable overlapped arbitration for some dual function devices,
  1634. * regardless revision id (kind of post-chip-design feature. ;-))
  1635. */
  1636. if (pdev->device == PCI_DEVICE_ID_NCR_53C875)
  1637. OUTB(np, nc_ctest0, (1<<5));
  1638. else if (pdev->device == PCI_DEVICE_ID_NCR_53C896)
  1639. np->rv_ccntl0 |= DPR;
  1640. /*
  1641. * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
  1642. * and/or hardware phase mismatch, since only such chips
  1643. * seem to support those IO registers.
  1644. */
  1645. if (np->features & (FE_DAC|FE_NOPM)) {
  1646. OUTB(np, nc_ccntl0, np->rv_ccntl0);
  1647. OUTB(np, nc_ccntl1, np->rv_ccntl1);
  1648. }
  1649. #if SYM_CONF_DMA_ADDRESSING_MODE == 2
  1650. /*
  1651. * Set up scratch C and DRS IO registers to map the 32 bit
  1652. * DMA address range our data structures are located in.
  1653. */
  1654. if (use_dac(np)) {
  1655. np->dmap_bah[0] = 0; /* ??? */
  1656. OUTL(np, nc_scrx[0], np->dmap_bah[0]);
  1657. OUTL(np, nc_drs, np->dmap_bah[0]);
  1658. }
  1659. #endif
  1660. /*
  1661. * If phase mismatch handled by scripts (895A/896/1010),
  1662. * set PM jump addresses.
  1663. */
  1664. if (np->features & FE_NOPM) {
  1665. OUTL(np, nc_pmjad1, SCRIPTB_BA(np, pm_handle));
  1666. OUTL(np, nc_pmjad2, SCRIPTB_BA(np, pm_handle));
  1667. }
  1668. /*
  1669. * Enable GPIO0 pin for writing if LED support from SCRIPTS.
  1670. * Also set GPIO5 and clear GPIO6 if hardware LED control.
  1671. */
  1672. if (np->features & FE_LED0)
  1673. OUTB(np, nc_gpcntl, INB(np, nc_gpcntl) & ~0x01);
  1674. else if (np->features & FE_LEDC)
  1675. OUTB(np, nc_gpcntl, (INB(np, nc_gpcntl) & ~0x41) | 0x20);
  1676. /*
  1677. * enable ints
  1678. */
  1679. OUTW(np, nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
  1680. OUTB(np, nc_dien , MDPE|BF|SSI|SIR|IID);
  1681. /*
  1682. * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
  1683. * Try to eat the spurious SBMC interrupt that may occur when
  1684. * we reset the chip but not the SCSI BUS (at initialization).
  1685. */
  1686. if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
  1687. OUTONW(np, nc_sien, SBMC);
  1688. if (reason == 0) {
  1689. INB(np, nc_mbox1);
  1690. mdelay(100);
  1691. INW(np, nc_sist);
  1692. }
  1693. np->scsi_mode = INB(np, nc_stest4) & SMODE;
  1694. }
  1695. /*
  1696. * Fill in target structure.
  1697. * Reinitialize usrsync.
  1698. * Reinitialize usrwide.
  1699. * Prepare sync negotiation according to actual SCSI bus mode.
  1700. */
  1701. for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
  1702. struct sym_tcb *tp = &np->target[i];
  1703. tp->to_reset = 0;
  1704. tp->head.sval = 0;
  1705. tp->head.wval = np->rv_scntl3;
  1706. tp->head.uval = 0;
  1707. if (tp->lun0p)
  1708. tp->lun0p->to_clear = 0;
  1709. if (tp->lunmp) {
  1710. int ln;
  1711. for (ln = 1; ln < SYM_CONF_MAX_LUN; ln++)
  1712. if (tp->lunmp[ln])
  1713. tp->lunmp[ln]->to_clear = 0;
  1714. }
  1715. }
  1716. /*
  1717. * Download SCSI SCRIPTS to on-chip RAM if present,
  1718. * and start script processor.
  1719. * We do the download preferently from the CPU.
  1720. * For platforms that may not support PCI memory mapping,
  1721. * we use simple SCRIPTS that performs MEMORY MOVEs.
  1722. */
  1723. phys = SCRIPTA_BA(np, init);
  1724. if (np->ram_ba) {
  1725. if (sym_verbose >= 2)
  1726. printf("%s: Downloading SCSI SCRIPTS.\n", sym_name(np));
  1727. memcpy_toio(np->s.ramaddr, np->scripta0, np->scripta_sz);
  1728. if (np->features & FE_RAM8K) {
  1729. memcpy_toio(np->s.ramaddr + 4096, np->scriptb0, np->scriptb_sz);
  1730. phys = scr_to_cpu(np->scr_ram_seg);
  1731. OUTL(np, nc_mmws, phys);
  1732. OUTL(np, nc_mmrs, phys);
  1733. OUTL(np, nc_sfs, phys);
  1734. phys = SCRIPTB_BA(np, start64);
  1735. }
  1736. }
  1737. np->istat_sem = 0;
  1738. OUTL(np, nc_dsa, np->hcb_ba);
  1739. OUTL_DSP(np, phys);
  1740. /*
  1741. * Notify the XPT about the RESET condition.
  1742. */
  1743. if (reason != 0)
  1744. sym_xpt_async_bus_reset(np);
  1745. }
  1746. /*
  1747. * Switch trans mode for current job and its target.
  1748. */
  1749. static void sym_settrans(struct sym_hcb *np, int target, u_char opts, u_char ofs,
  1750. u_char per, u_char wide, u_char div, u_char fak)
  1751. {
  1752. SYM_QUEHEAD *qp;
  1753. u_char sval, wval, uval;
  1754. struct sym_tcb *tp = &np->target[target];
  1755. assert(target == (INB(np, nc_sdid) & 0x0f));
  1756. sval = tp->head.sval;
  1757. wval = tp->head.wval;
  1758. uval = tp->head.uval;
  1759. #if 0
  1760. printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
  1761. sval, wval, uval, np->rv_scntl3);
  1762. #endif
  1763. /*
  1764. * Set the offset.
  1765. */
  1766. if (!(np->features & FE_C10))
  1767. sval = (sval & ~0x1f) | ofs;
  1768. else
  1769. sval = (sval & ~0x3f) | ofs;
  1770. /*
  1771. * Set the sync divisor and extra clock factor.
  1772. */
  1773. if (ofs != 0) {
  1774. wval = (wval & ~0x70) | ((div+1) << 4);
  1775. if (!(np->features & FE_C10))
  1776. sval = (sval & ~0xe0) | (fak << 5);
  1777. else {
  1778. uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
  1779. if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
  1780. if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
  1781. }
  1782. }
  1783. /*
  1784. * Set the bus width.
  1785. */
  1786. wval = wval & ~EWS;
  1787. if (wide != 0)
  1788. wval |= EWS;
  1789. /*
  1790. * Set misc. ultra enable bits.
  1791. */
  1792. if (np->features & FE_C10) {
  1793. uval = uval & ~(U3EN|AIPCKEN);
  1794. if (opts) {
  1795. assert(np->features & FE_U3EN);
  1796. uval |= U3EN;
  1797. }
  1798. } else {
  1799. wval = wval & ~ULTRA;
  1800. if (per <= 12) wval |= ULTRA;
  1801. }
  1802. /*
  1803. * Stop there if sync parameters are unchanged.
  1804. */
  1805. if (tp->head.sval == sval &&
  1806. tp->head.wval == wval &&
  1807. tp->head.uval == uval)
  1808. return;
  1809. tp->head.sval = sval;
  1810. tp->head.wval = wval;
  1811. tp->head.uval = uval;
  1812. /*
  1813. * Disable extended Sreq/Sack filtering if per < 50.
  1814. * Not supported on the C1010.
  1815. */
  1816. if (per < 50 && !(np->features & FE_C10))
  1817. OUTOFFB(np, nc_stest2, EXT);
  1818. /*
  1819. * set actual value and sync_status
  1820. */
  1821. OUTB(np, nc_sxfer, tp->head.sval);
  1822. OUTB(np, nc_scntl3, tp->head.wval);
  1823. if (np->features & FE_C10) {
  1824. OUTB(np, nc_scntl4, tp->head.uval);
  1825. }
  1826. /*
  1827. * patch ALL busy ccbs of this target.
  1828. */
  1829. FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
  1830. struct sym_ccb *cp;
  1831. cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  1832. if (cp->target != target)
  1833. continue;
  1834. cp->phys.select.sel_scntl3 = tp->head.wval;
  1835. cp->phys.select.sel_sxfer = tp->head.sval;
  1836. if (np->features & FE_C10) {
  1837. cp->phys.select.sel_scntl4 = tp->head.uval;
  1838. }
  1839. }
  1840. }
  1841. static void sym_announce_transfer_rate(struct sym_tcb *tp)
  1842. {
  1843. struct scsi_target *starget = tp->starget;
  1844. if (tp->tprint.period != spi_period(starget) ||
  1845. tp->tprint.offset != spi_offset(starget) ||
  1846. tp->tprint.width != spi_width(starget) ||
  1847. tp->tprint.iu != spi_iu(starget) ||
  1848. tp->tprint.dt != spi_dt(starget) ||
  1849. tp->tprint.qas != spi_qas(starget) ||
  1850. !tp->tprint.check_nego) {
  1851. tp->tprint.period = spi_period(starget);
  1852. tp->tprint.offset = spi_offset(starget);
  1853. tp->tprint.width = spi_width(starget);
  1854. tp->tprint.iu = spi_iu(starget);
  1855. tp->tprint.dt = spi_dt(starget);
  1856. tp->tprint.qas = spi_qas(starget);
  1857. tp->tprint.check_nego = 1;
  1858. spi_display_xfer_agreement(starget);
  1859. }
  1860. }
  1861. /*
  1862. * We received a WDTR.
  1863. * Let everything be aware of the changes.
  1864. */
  1865. static void sym_setwide(struct sym_hcb *np, int target, u_char wide)
  1866. {
  1867. struct sym_tcb *tp = &np->target[target];
  1868. struct scsi_target *starget = tp->starget;
  1869. sym_settrans(np, target, 0, 0, 0, wide, 0, 0);
  1870. if (wide)
  1871. tp->tgoal.renego = NS_WIDE;
  1872. else
  1873. tp->tgoal.renego = 0;
  1874. tp->tgoal.check_nego = 0;
  1875. tp->tgoal.width = wide;
  1876. spi_offset(starget) = 0;
  1877. spi_period(starget) = 0;
  1878. spi_width(starget) = wide;
  1879. spi_iu(starget) = 0;
  1880. spi_dt(starget) = 0;
  1881. spi_qas(starget) = 0;
  1882. if (sym_verbose >= 3)
  1883. sym_announce_transfer_rate(tp);
  1884. }
  1885. /*
  1886. * We received a SDTR.
  1887. * Let everything be aware of the changes.
  1888. */
  1889. static void
  1890. sym_setsync(struct sym_hcb *np, int target,
  1891. u_char ofs, u_char per, u_char div, u_char fak)
  1892. {
  1893. struct sym_tcb *tp = &np->target[target];
  1894. struct scsi_target *starget = tp->starget;
  1895. u_char wide = (tp->head.wval & EWS) ? BUS_16_BIT : BUS_8_BIT;
  1896. sym_settrans(np, target, 0, ofs, per, wide, div, fak);
  1897. if (wide)
  1898. tp->tgoal.renego = NS_WIDE;
  1899. else if (ofs)
  1900. tp->tgoal.renego = NS_SYNC;
  1901. else
  1902. tp->tgoal.renego = 0;
  1903. spi_period(starget) = per;
  1904. spi_offset(starget) = ofs;
  1905. spi_iu(starget) = spi_dt(starget) = spi_qas(starget) = 0;
  1906. if (!tp->tgoal.dt && !tp->tgoal.iu && !tp->tgoal.qas) {
  1907. tp->tgoal.period = per;
  1908. tp->tgoal.offset = ofs;
  1909. tp->tgoal.check_nego = 0;
  1910. }
  1911. sym_announce_transfer_rate(tp);
  1912. }
  1913. /*
  1914. * We received a PPR.
  1915. * Let everything be aware of the changes.
  1916. */
  1917. static void
  1918. sym_setpprot(struct sym_hcb *np, int target, u_char opts, u_char ofs,
  1919. u_char per, u_char wide, u_char div, u_char fak)
  1920. {
  1921. struct sym_tcb *tp = &np->target[target];
  1922. struct scsi_target *starget = tp->starget;
  1923. sym_settrans(np, target, opts, ofs, per, wide, div, fak);
  1924. if (wide || ofs)
  1925. tp->tgoal.renego = NS_PPR;
  1926. else
  1927. tp->tgoal.renego = 0;
  1928. spi_width(starget) = tp->tgoal.width = wide;
  1929. spi_period(starget) = tp->tgoal.period = per;
  1930. spi_offset(starget) = tp->tgoal.offset = ofs;
  1931. spi_iu(starget) = tp->tgoal.iu = !!(opts & PPR_OPT_IU);
  1932. spi_dt(starget) = tp->tgoal.dt = !!(opts & PPR_OPT_DT);
  1933. spi_qas(starget) = tp->tgoal.qas = !!(opts & PPR_OPT_QAS);
  1934. tp->tgoal.check_nego = 0;
  1935. sym_announce_transfer_rate(tp);
  1936. }
  1937. /*
  1938. * generic recovery from scsi interrupt
  1939. *
  1940. * The doc says that when the chip gets an SCSI interrupt,
  1941. * it tries to stop in an orderly fashion, by completing
  1942. * an instruction fetch that had started or by flushing
  1943. * the DMA fifo for a write to memory that was executing.
  1944. * Such a fashion is not enough to know if the instruction
  1945. * that was just before the current DSP value has been
  1946. * executed or not.
  1947. *
  1948. * There are some small SCRIPTS sections that deal with
  1949. * the start queue and the done queue that may break any
  1950. * assomption from the C code if we are interrupted
  1951. * inside, so we reset if this happens. Btw, since these
  1952. * SCRIPTS sections are executed while the SCRIPTS hasn't
  1953. * started SCSI operations, it is very unlikely to happen.
  1954. *
  1955. * All the driver data structures are supposed to be
  1956. * allocated from the same 4 GB memory window, so there
  1957. * is a 1 to 1 relationship between DSA and driver data
  1958. * structures. Since we are careful :) to invalidate the
  1959. * DSA when we complete a command or when the SCRIPTS
  1960. * pushes a DSA into a queue, we can trust it when it
  1961. * points to a CCB.
  1962. */
  1963. static void sym_recover_scsi_int (struct sym_hcb *np, u_char hsts)
  1964. {
  1965. u32 dsp = INL(np, nc_dsp);
  1966. u32 dsa = INL(np, nc_dsa);
  1967. struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
  1968. /*
  1969. * If we haven't been interrupted inside the SCRIPTS
  1970. * critical pathes, we can safely restart the SCRIPTS
  1971. * and trust the DSA value if it matches a CCB.
  1972. */
  1973. if ((!(dsp > SCRIPTA_BA(np, getjob_begin) &&
  1974. dsp < SCRIPTA_BA(np, getjob_end) + 1)) &&
  1975. (!(dsp > SCRIPTA_BA(np, ungetjob) &&
  1976. dsp < SCRIPTA_BA(np, reselect) + 1)) &&
  1977. (!(dsp > SCRIPTB_BA(np, sel_for_abort) &&
  1978. dsp < SCRIPTB_BA(np, sel_for_abort_1) + 1)) &&
  1979. (!(dsp > SCRIPTA_BA(np, done) &&
  1980. dsp < SCRIPTA_BA(np, done_end) + 1))) {
  1981. OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
  1982. OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */
  1983. /*
  1984. * If we have a CCB, let the SCRIPTS call us back for
  1985. * the handling of the error with SCRATCHA filled with
  1986. * STARTPOS. This way, we will be able to freeze the
  1987. * device queue and requeue awaiting IOs.
  1988. */
  1989. if (cp) {
  1990. cp->host_status = hsts;
  1991. OUTL_DSP(np, SCRIPTA_BA(np, complete_error));
  1992. }
  1993. /*
  1994. * Otherwise just restart the SCRIPTS.
  1995. */
  1996. else {
  1997. OUTL(np, nc_dsa, 0xffffff);
  1998. OUTL_DSP(np, SCRIPTA_BA(np, start));
  1999. }
  2000. }
  2001. else
  2002. goto reset_all;
  2003. return;
  2004. reset_all:
  2005. sym_start_reset(np);
  2006. }
  2007. /*
  2008. * chip exception handler for selection timeout
  2009. */
  2010. static void sym_int_sto (struct sym_hcb *np)
  2011. {
  2012. u32 dsp = INL(np, nc_dsp);
  2013. if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
  2014. if (dsp == SCRIPTA_BA(np, wf_sel_done) + 8)
  2015. sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
  2016. else
  2017. sym_start_reset(np);
  2018. }
  2019. /*
  2020. * chip exception handler for unexpected disconnect
  2021. */
  2022. static void sym_int_udc (struct sym_hcb *np)
  2023. {
  2024. printf ("%s: unexpected disconnect\n", sym_name(np));
  2025. sym_recover_scsi_int(np, HS_UNEXPECTED);
  2026. }
  2027. /*
  2028. * chip exception handler for SCSI bus mode change
  2029. *
  2030. * spi2-r12 11.2.3 says a transceiver mode change must
  2031. * generate a reset event and a device that detects a reset
  2032. * event shall initiate a hard reset. It says also that a
  2033. * device that detects a mode change shall set data transfer
  2034. * mode to eight bit asynchronous, etc...
  2035. * So, just reinitializing all except chip should be enough.
  2036. */
  2037. static void sym_int_sbmc(struct Scsi_Host *shost)
  2038. {
  2039. struct sym_hcb *np = sym_get_hcb(shost);
  2040. u_char scsi_mode = INB(np, nc_stest4) & SMODE;
  2041. /*
  2042. * Notify user.
  2043. */
  2044. printf("%s: SCSI BUS mode change from %s to %s.\n", sym_name(np),
  2045. sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
  2046. /*
  2047. * Should suspend command processing for a few seconds and
  2048. * reinitialize all except the chip.
  2049. */
  2050. sym_start_up(shost, 2);
  2051. }
  2052. /*
  2053. * chip exception handler for SCSI parity error.
  2054. *
  2055. * When the chip detects a SCSI parity error and is
  2056. * currently executing a (CH)MOV instruction, it does
  2057. * not interrupt immediately, but tries to finish the
  2058. * transfer of the current scatter entry before
  2059. * interrupting. The following situations may occur:
  2060. *
  2061. * - The complete scatter entry has been transferred
  2062. * without the device having changed phase.
  2063. * The chip will then interrupt with the DSP pointing
  2064. * to the instruction that follows the MOV.
  2065. *
  2066. * - A phase mismatch occurs before the MOV finished
  2067. * and phase errors are to be handled by the C code.
  2068. * The chip will then interrupt with both PAR and MA
  2069. * conditions set.
  2070. *
  2071. * - A phase mismatch occurs before the MOV finished and
  2072. * phase errors are to be handled by SCRIPTS.
  2073. * The chip will load the DSP with the phase mismatch
  2074. * JUMP address and interrupt the host processor.
  2075. */
  2076. static void sym_int_par (struct sym_hcb *np, u_short sist)
  2077. {
  2078. u_char hsts = INB(np, HS_PRT);
  2079. u32 dsp = INL(np, nc_dsp);
  2080. u32 dbc = INL(np, nc_dbc);
  2081. u32 dsa = INL(np, nc_dsa);
  2082. u_char sbcl = INB(np, nc_sbcl);
  2083. u_char cmd = dbc >> 24;
  2084. int phase = cmd & 7;
  2085. struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
  2086. if (printk_ratelimit())
  2087. printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
  2088. sym_name(np), hsts, dbc, sbcl);
  2089. /*
  2090. * Check that the chip is connected to the SCSI BUS.
  2091. */
  2092. if (!(INB(np, nc_scntl1) & ISCON)) {
  2093. sym_recover_scsi_int(np, HS_UNEXPECTED);
  2094. return;
  2095. }
  2096. /*
  2097. * If the nexus is not clearly identified, reset the bus.
  2098. * We will try to do better later.
  2099. */
  2100. if (!cp)
  2101. goto reset_all;
  2102. /*
  2103. * Check instruction was a MOV, direction was INPUT and
  2104. * ATN is asserted.
  2105. */
  2106. if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
  2107. goto reset_all;
  2108. /*
  2109. * Keep track of the parity error.
  2110. */
  2111. OUTONB(np, HF_PRT, HF_EXT_ERR);
  2112. cp->xerr_status |= XE_PARITY_ERR;
  2113. /*
  2114. * Prepare the message to send to the device.
  2115. */
  2116. np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
  2117. /*
  2118. * If the old phase was DATA IN phase, we have to deal with
  2119. * the 3 situations described above.
  2120. * For other input phases (MSG IN and STATUS), the device
  2121. * must resend the whole thing that failed parity checking
  2122. * or signal error. So, jumping to dispatcher should be OK.
  2123. */
  2124. if (phase == 1 || phase == 5) {
  2125. /* Phase mismatch handled by SCRIPTS */
  2126. if (dsp == SCRIPTB_BA(np, pm_handle))
  2127. OUTL_DSP(np, dsp);
  2128. /* Phase mismatch handled by the C code */
  2129. else if (sist & MA)
  2130. sym_int_ma (np);
  2131. /* No phase mismatch occurred */
  2132. else {
  2133. sym_set_script_dp (np, cp, dsp);
  2134. OUTL_DSP(np, SCRIPTA_BA(np, dispatch));
  2135. }
  2136. }
  2137. else if (phase == 7) /* We definitely cannot handle parity errors */
  2138. #if 1 /* in message-in phase due to the relection */
  2139. goto reset_all; /* path and various message anticipations. */
  2140. #else
  2141. OUTL_DSP(np, SCRIPTA_BA(np, clrack));
  2142. #endif
  2143. else
  2144. OUTL_DSP(np, SCRIPTA_BA(np, dispatch));
  2145. return;
  2146. reset_all:
  2147. sym_start_reset(np);
  2148. return;
  2149. }
  2150. /*
  2151. * chip exception handler for phase errors.
  2152. *
  2153. * We have to construct a new transfer descriptor,
  2154. * to transfer the rest of the current block.
  2155. */
  2156. static void sym_int_ma (struct sym_hcb *np)
  2157. {
  2158. u32 dbc;
  2159. u32 rest;
  2160. u32 dsp;
  2161. u32 dsa;
  2162. u32 nxtdsp;
  2163. u32 *vdsp;
  2164. u32 oadr, olen;
  2165. u32 *tblp;
  2166. u32 newcmd;
  2167. u_int delta;
  2168. u_char cmd;
  2169. u_char hflags, hflags0;
  2170. struct sym_pmc *pm;
  2171. struct sym_ccb *cp;
  2172. dsp = INL(np, nc_dsp);
  2173. dbc = INL(np, nc_dbc);
  2174. dsa = INL(np, nc_dsa);
  2175. cmd = dbc >> 24;
  2176. rest = dbc & 0xffffff;
  2177. delta = 0;
  2178. /*
  2179. * locate matching cp if any.
  2180. */
  2181. cp = sym_ccb_from_dsa(np, dsa);
  2182. /*
  2183. * Donnot take into account dma fifo and various buffers in
  2184. * INPUT phase since the chip flushes everything before
  2185. * raising the MA interrupt for interrupted INPUT phases.
  2186. * For DATA IN phase, we will check for the SWIDE later.
  2187. */
  2188. if ((cmd & 7) != 1 && (cmd & 7) != 5) {
  2189. u_char ss0, ss2;
  2190. if (np->features & FE_DFBC)
  2191. delta = INW(np, nc_dfbc);
  2192. else {
  2193. u32 dfifo;
  2194. /*
  2195. * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
  2196. */
  2197. dfifo = INL(np, nc_dfifo);
  2198. /*
  2199. * Calculate remaining bytes in DMA fifo.
  2200. * (CTEST5 = dfifo >> 16)
  2201. */
  2202. if (dfifo & (DFS << 16))
  2203. delta = ((((dfifo >> 8) & 0x300) |
  2204. (dfifo & 0xff)) - rest) & 0x3ff;
  2205. else
  2206. delta = ((dfifo & 0xff) - rest) & 0x7f;
  2207. }
  2208. /*
  2209. * The data in the dma fifo has not been transferred to
  2210. * the target -> add the amount to the rest
  2211. * and clear the data.
  2212. * Check the sstat2 register in case of wide transfer.
  2213. */
  2214. rest += delta;
  2215. ss0 = INB(np, nc_sstat0);
  2216. if (ss0 & OLF) rest++;
  2217. if (!(np->features & FE_C10))
  2218. if (ss0 & ORF) rest++;
  2219. if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
  2220. ss2 = INB(np, nc_sstat2);
  2221. if (ss2 & OLF1) rest++;
  2222. if (!(np->features & FE_C10))
  2223. if (ss2 & ORF1) rest++;
  2224. }
  2225. /*
  2226. * Clear fifos.
  2227. */
  2228. OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
  2229. OUTB(np, nc_stest3, TE|CSF); /* scsi fifo */
  2230. }
  2231. /*
  2232. * log the information
  2233. */
  2234. if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
  2235. printf ("P%x%x RL=%d D=%d ", cmd&7, INB(np, nc_sbcl)&7,
  2236. (unsigned) rest, (unsigned) delta);
  2237. /*
  2238. * try to find the interrupted script command,
  2239. * and the address at which to continue.
  2240. */
  2241. vdsp = NULL;
  2242. nxtdsp = 0;
  2243. if (dsp > np->scripta_ba &&
  2244. dsp <= np->scripta_ba + np->scripta_sz) {
  2245. vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
  2246. nxtdsp = dsp;
  2247. }
  2248. else if (dsp > np->scriptb_ba &&
  2249. dsp <= np->scriptb_ba + np->scriptb_sz) {
  2250. vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
  2251. nxtdsp = dsp;
  2252. }
  2253. /*
  2254. * log the information
  2255. */
  2256. if (DEBUG_FLAGS & DEBUG_PHASE) {
  2257. printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
  2258. cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
  2259. }
  2260. if (!vdsp) {
  2261. printf ("%s: interrupted SCRIPT address not found.\n",
  2262. sym_name (np));
  2263. goto reset_all;
  2264. }
  2265. if (!cp) {
  2266. printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
  2267. sym_name (np));
  2268. goto reset_all;
  2269. }
  2270. /*
  2271. * get old startaddress and old length.
  2272. */
  2273. oadr = scr_to_cpu(vdsp[1]);
  2274. if (cmd & 0x10) { /* Table indirect */
  2275. tblp = (u32 *) ((char*) &cp->phys + oadr);
  2276. olen = scr_to_cpu(tblp[0]);
  2277. oadr = scr_to_cpu(tblp[1]);
  2278. } else {
  2279. tblp = (u32 *) 0;
  2280. olen = scr_to_cpu(vdsp[0]) & 0xffffff;
  2281. }
  2282. if (DEBUG_FLAGS & DEBUG_PHASE) {
  2283. printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
  2284. (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
  2285. tblp,
  2286. (unsigned) olen,
  2287. (unsigned) oadr);
  2288. }
  2289. /*
  2290. * check cmd against assumed interrupted script command.
  2291. * If dt data phase, the MOVE instruction hasn't bit 4 of
  2292. * the phase.
  2293. */
  2294. if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
  2295. sym_print_addr(cp->cmd,
  2296. "internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
  2297. cmd, scr_to_cpu(vdsp[0]) >> 24);
  2298. goto reset_all;
  2299. }
  2300. /*
  2301. * if old phase not dataphase, leave here.
  2302. */
  2303. if (cmd & 2) {
  2304. sym_print_addr(cp->cmd,
  2305. "phase change %x-%x %d@%08x resid=%d.\n",
  2306. cmd&7, INB(np, nc_sbcl)&7, (unsigned)olen,
  2307. (unsigned)oadr, (unsigned)rest);
  2308. goto unexpected_phase;
  2309. }
  2310. /*
  2311. * Choose the correct PM save area.
  2312. *
  2313. * Look at the PM_SAVE SCRIPT if you want to understand
  2314. * this stuff. The equivalent code is implemented in
  2315. * SCRIPTS for the 895A, 896 and 1010 that are able to
  2316. * handle PM from the SCRIPTS processor.
  2317. */
  2318. hflags0 = INB(np, HF_PRT);
  2319. hflags = hflags0;
  2320. if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
  2321. if (hflags & HF_IN_PM0)
  2322. nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
  2323. else if (hflags & HF_IN_PM1)
  2324. nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
  2325. if (hflags & HF_DP_SAVED)
  2326. hflags ^= HF_ACT_PM;
  2327. }
  2328. if (!(hflags & HF_ACT_PM)) {
  2329. pm = &cp->phys.pm0;
  2330. newcmd = SCRIPTA_BA(np, pm0_data);
  2331. }
  2332. else {
  2333. pm = &cp->phys.pm1;
  2334. newcmd = SCRIPTA_BA(np, pm1_data);
  2335. }
  2336. hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
  2337. if (hflags != hflags0)
  2338. OUTB(np, HF_PRT, hflags);
  2339. /*
  2340. * fillin the phase mismatch context
  2341. */
  2342. pm->sg.addr = cpu_to_scr(oadr + olen - rest);
  2343. pm->sg.size = cpu_to_scr(rest);
  2344. pm->ret = cpu_to_scr(nxtdsp);
  2345. /*
  2346. * If we have a SWIDE,
  2347. * - prepare the address to write the SWIDE from SCRIPTS,
  2348. * - compute the SCRIPTS address to restart from,
  2349. * - move current data pointer context by one byte.
  2350. */
  2351. nxtdsp = SCRIPTA_BA(np, dispatch);
  2352. if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
  2353. (INB(np, nc_scntl2) & WSR)) {
  2354. u32 tmp;
  2355. /*
  2356. * Set up the table indirect for the MOVE
  2357. * of the residual byte and adjust the data
  2358. * pointer context.
  2359. */
  2360. tmp = scr_to_cpu(pm->sg.addr);
  2361. cp->phys.wresid.addr = cpu_to_scr(tmp);
  2362. pm->sg.addr = cpu_to_scr(tmp + 1);
  2363. tmp = scr_to_cpu(pm->sg.size);
  2364. cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
  2365. pm->sg.size = cpu_to_scr(tmp - 1);
  2366. /*
  2367. * If only the residual byte is to be moved,
  2368. * no PM context is needed.
  2369. */
  2370. if ((tmp&0xffffff) == 1)
  2371. newcmd = pm->ret;
  2372. /*
  2373. * Prepare the address of SCRIPTS that will
  2374. * move the residual byte to memory.
  2375. */
  2376. nxtdsp = SCRIPTB_BA(np, wsr_ma_helper);
  2377. }
  2378. if (DEBUG_FLAGS & DEBUG_PHASE) {
  2379. sym_print_addr(cp->cmd, "PM %x %x %x / %x %x %x.\n",
  2380. hflags0, hflags, newcmd,
  2381. (unsigned)scr_to_cpu(pm->sg.addr),
  2382. (unsigned)scr_to_cpu(pm->sg.size),
  2383. (unsigned)scr_to_cpu(pm->ret));
  2384. }
  2385. /*
  2386. * Restart the SCRIPTS processor.
  2387. */
  2388. sym_set_script_dp (np, cp, newcmd);
  2389. OUTL_DSP(np, nxtdsp);
  2390. return;
  2391. /*
  2392. * Unexpected phase changes that occurs when the current phase
  2393. * is not a DATA IN or DATA OUT phase are due to error conditions.
  2394. * Such event may only happen when the SCRIPTS is using a
  2395. * multibyte SCSI MOVE.
  2396. *
  2397. * Phase change Some possible cause
  2398. *
  2399. * COMMAND --> MSG IN SCSI parity error detected by target.
  2400. * COMMAND --> STATUS Bad command or refused by target.
  2401. * MSG OUT --> MSG IN Message rejected by target.
  2402. * MSG OUT --> COMMAND Bogus target that discards extended
  2403. * negotiation messages.
  2404. *
  2405. * The code below does not care of the new phase and so
  2406. * trusts the target. Why to annoy it ?
  2407. * If the interrupted phase is COMMAND phase, we restart at
  2408. * dispatcher.
  2409. * If a target does not get all the messages after selection,
  2410. * the code assumes blindly that the target discards extended
  2411. * messages and clears the negotiation status.
  2412. * If the target does not want all our response to negotiation,
  2413. * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
  2414. * bloat for such a should_not_happen situation).
  2415. * In all other situation, we reset the BUS.
  2416. * Are these assumptions reasonable ? (Wait and see ...)
  2417. */
  2418. unexpected_phase:
  2419. dsp -= 8;
  2420. nxtdsp = 0;
  2421. switch (cmd & 7) {
  2422. case 2: /* COMMAND phase */
  2423. nxtdsp = SCRIPTA_BA(np, dispatch);
  2424. break;
  2425. #if 0
  2426. case 3: /* STATUS phase */
  2427. nxtdsp = SCRIPTA_BA(np, dispatch);
  2428. break;
  2429. #endif
  2430. case 6: /* MSG OUT phase */
  2431. /*
  2432. * If the device may want to use untagged when we want
  2433. * tagged, we prepare an IDENTIFY without disc. granted,
  2434. * since we will not be able to handle reselect.
  2435. * Otherwise, we just don't care.
  2436. */
  2437. if (dsp == SCRIPTA_BA(np, send_ident)) {
  2438. if (cp->tag != NO_TAG && olen - rest <= 3) {
  2439. cp->host_status = HS_BUSY;
  2440. np->msgout[0] = IDENTIFY(0, cp->lun);
  2441. nxtdsp = SCRIPTB_BA(np, ident_break_atn);
  2442. }
  2443. else
  2444. nxtdsp = SCRIPTB_BA(np, ident_break);
  2445. }
  2446. else if (dsp == SCRIPTB_BA(np, send_wdtr) ||
  2447. dsp == SCRIPTB_BA(np, send_sdtr) ||
  2448. dsp == SCRIPTB_BA(np, send_ppr)) {
  2449. nxtdsp = SCRIPTB_BA(np, nego_bad_phase);
  2450. if (dsp == SCRIPTB_BA(np, send_ppr)) {
  2451. struct scsi_device *dev = cp->cmd->device;
  2452. dev->ppr = 0;
  2453. }
  2454. }
  2455. break;
  2456. #if 0
  2457. case 7: /* MSG IN phase */
  2458. nxtdsp = SCRIPTA_BA(np, clrack);
  2459. break;
  2460. #endif
  2461. }
  2462. if (nxtdsp) {
  2463. OUTL_DSP(np, nxtdsp);
  2464. return;
  2465. }
  2466. reset_all:
  2467. sym_start_reset(np);
  2468. }
  2469. /*
  2470. * chip interrupt handler
  2471. *
  2472. * In normal situations, interrupt conditions occur one at
  2473. * a time. But when something bad happens on the SCSI BUS,
  2474. * the chip may raise several interrupt flags before
  2475. * stopping and interrupting the CPU. The additionnal
  2476. * interrupt flags are stacked in some extra registers
  2477. * after the SIP and/or DIP flag has been raised in the
  2478. * ISTAT. After the CPU has read the interrupt condition
  2479. * flag from SIST or DSTAT, the chip unstacks the other
  2480. * interrupt flags and sets the corresponding bits in
  2481. * SIST or DSTAT. Since the chip starts stacking once the
  2482. * SIP or DIP flag is set, there is a small window of time
  2483. * where the stacking does not occur.
  2484. *
  2485. * Typically, multiple interrupt conditions may happen in
  2486. * the following situations:
  2487. *
  2488. * - SCSI parity error + Phase mismatch (PAR|MA)
  2489. * When an parity error is detected in input phase
  2490. * and the device switches to msg-in phase inside a
  2491. * block MOV.
  2492. * - SCSI parity error + Unexpected disconnect (PAR|UDC)
  2493. * When a stupid device does not want to handle the
  2494. * recovery of an SCSI parity error.
  2495. * - Some combinations of STO, PAR, UDC, ...
  2496. * When using non compliant SCSI stuff, when user is
  2497. * doing non compliant hot tampering on the BUS, when
  2498. * something really bad happens to a device, etc ...
  2499. *
  2500. * The heuristic suggested by SYMBIOS to handle
  2501. * multiple interrupts is to try unstacking all
  2502. * interrupts conditions and to handle them on some
  2503. * priority based on error severity.
  2504. * This will work when the unstacking has been
  2505. * successful, but we cannot be 100 % sure of that,
  2506. * since the CPU may have been faster to unstack than
  2507. * the chip is able to stack. Hmmm ... But it seems that
  2508. * such a situation is very unlikely to happen.
  2509. *
  2510. * If this happen, for example STO caught by the CPU
  2511. * then UDC happenning before the CPU have restarted
  2512. * the SCRIPTS, the driver may wrongly complete the
  2513. * same command on UDC, since the SCRIPTS didn't restart
  2514. * and the DSA still points to the same command.
  2515. * We avoid this situation by setting the DSA to an
  2516. * invalid value when the CCB is completed and before
  2517. * restarting the SCRIPTS.
  2518. *
  2519. * Another issue is that we need some section of our
  2520. * recovery procedures to be somehow uninterruptible but
  2521. * the SCRIPTS processor does not provides such a
  2522. * feature. For this reason, we handle recovery preferently
  2523. * from the C code and check against some SCRIPTS critical
  2524. * sections from the C code.
  2525. *
  2526. * Hopefully, the interrupt handling of the driver is now
  2527. * able to resist to weird BUS error conditions, but donnot
  2528. * ask me for any guarantee that it will never fail. :-)
  2529. * Use at your own decision and risk.
  2530. */
  2531. irqreturn_t sym_interrupt(struct Scsi_Host *shost)
  2532. {
  2533. struct sym_data *sym_data = shost_priv(shost);
  2534. struct sym_hcb *np = sym_data->ncb;
  2535. struct pci_dev *pdev = sym_data->pdev;
  2536. u_char istat, istatc;
  2537. u_char dstat;
  2538. u_short sist;
  2539. /*
  2540. * interrupt on the fly ?
  2541. * (SCRIPTS may still be running)
  2542. *
  2543. * A `dummy read' is needed to ensure that the
  2544. * clear of the INTF flag reaches the device
  2545. * and that posted writes are flushed to memory
  2546. * before the scanning of the DONE queue.
  2547. * Note that SCRIPTS also (dummy) read to memory
  2548. * prior to deliver the INTF interrupt condition.
  2549. */
  2550. istat = INB(np, nc_istat);
  2551. if (istat & INTF) {
  2552. OUTB(np, nc_istat, (istat & SIGP) | INTF | np->istat_sem);
  2553. istat |= INB(np, nc_istat); /* DUMMY READ */
  2554. if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
  2555. sym_wakeup_done(np);
  2556. }
  2557. if (!(istat & (SIP|DIP)))
  2558. return (istat & INTF) ? IRQ_HANDLED : IRQ_NONE;
  2559. #if 0 /* We should never get this one */
  2560. if (istat & CABRT)
  2561. OUTB(np, nc_istat, CABRT);
  2562. #endif
  2563. /*
  2564. * PAR and MA interrupts may occur at the same time,
  2565. * and we need to know of both in order to handle
  2566. * this situation properly. We try to unstack SCSI
  2567. * interrupts for that reason. BTW, I dislike a LOT
  2568. * such a loop inside the interrupt routine.
  2569. * Even if DMA interrupt stacking is very unlikely to
  2570. * happen, we also try unstacking these ones, since
  2571. * this has no performance impact.
  2572. */
  2573. sist = 0;
  2574. dstat = 0;
  2575. istatc = istat;
  2576. do {
  2577. if (istatc & SIP)
  2578. sist |= INW(np, nc_sist);
  2579. if (istatc & DIP)
  2580. dstat |= INB(np, nc_dstat);
  2581. istatc = INB(np, nc_istat);
  2582. istat |= istatc;
  2583. /* Prevent deadlock waiting on a condition that may
  2584. * never clear. */
  2585. if (unlikely(sist == 0xffff && dstat == 0xff)) {
  2586. if (pci_channel_offline(pdev))
  2587. return IRQ_NONE;
  2588. }
  2589. } while (istatc & (SIP|DIP));
  2590. if (DEBUG_FLAGS & DEBUG_TINY)
  2591. printf ("<%d|%x:%x|%x:%x>",
  2592. (int)INB(np, nc_scr0),
  2593. dstat,sist,
  2594. (unsigned)INL(np, nc_dsp),
  2595. (unsigned)INL(np, nc_dbc));
  2596. /*
  2597. * On paper, a memory read barrier may be needed here to
  2598. * prevent out of order LOADs by the CPU from having
  2599. * prefetched stale data prior to DMA having occurred.
  2600. * And since we are paranoid ... :)
  2601. */
  2602. MEMORY_READ_BARRIER();
  2603. /*
  2604. * First, interrupts we want to service cleanly.
  2605. *
  2606. * Phase mismatch (MA) is the most frequent interrupt
  2607. * for chip earlier than the 896 and so we have to service
  2608. * it as quickly as possible.
  2609. * A SCSI parity error (PAR) may be combined with a phase
  2610. * mismatch condition (MA).
  2611. * Programmed interrupts (SIR) are used to call the C code
  2612. * from SCRIPTS.
  2613. * The single step interrupt (SSI) is not used in this
  2614. * driver.
  2615. */
  2616. if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
  2617. !(dstat & (MDPE|BF|ABRT|IID))) {
  2618. if (sist & PAR) sym_int_par (np, sist);
  2619. else if (sist & MA) sym_int_ma (np);
  2620. else if (dstat & SIR) sym_int_sir(np);
  2621. else if (dstat & SSI) OUTONB_STD();
  2622. else goto unknown_int;
  2623. return IRQ_HANDLED;
  2624. }
  2625. /*
  2626. * Now, interrupts that donnot happen in normal
  2627. * situations and that we may need to recover from.
  2628. *
  2629. * On SCSI RESET (RST), we reset everything.
  2630. * On SCSI BUS MODE CHANGE (SBMC), we complete all
  2631. * active CCBs with RESET status, prepare all devices
  2632. * for negotiating again and restart the SCRIPTS.
  2633. * On STO and UDC, we complete the CCB with the corres-
  2634. * ponding status and restart the SCRIPTS.
  2635. */
  2636. if (sist & RST) {
  2637. printf("%s: SCSI BUS reset detected.\n", sym_name(np));
  2638. sym_start_up(shost, 1);
  2639. return IRQ_HANDLED;
  2640. }
  2641. OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
  2642. OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */
  2643. if (!(sist & (GEN|HTH|SGE)) &&
  2644. !(dstat & (MDPE|BF|ABRT|IID))) {
  2645. if (sist & SBMC) sym_int_sbmc(shost);
  2646. else if (sist & STO) sym_int_sto (np);
  2647. else if (sist & UDC) sym_int_udc (np);
  2648. else goto unknown_int;
  2649. return IRQ_HANDLED;
  2650. }
  2651. /*
  2652. * Now, interrupts we are not able to recover cleanly.
  2653. *
  2654. * Log message for hard errors.
  2655. * Reset everything.
  2656. */
  2657. sym_log_hard_error(shost, sist, dstat);
  2658. if ((sist & (GEN|HTH|SGE)) ||
  2659. (dstat & (MDPE|BF|ABRT|IID))) {
  2660. sym_start_reset(np);
  2661. return IRQ_HANDLED;
  2662. }
  2663. unknown_int:
  2664. /*
  2665. * We just miss the cause of the interrupt. :(
  2666. * Print a message. The timeout will do the real work.
  2667. */
  2668. printf( "%s: unknown interrupt(s) ignored, "
  2669. "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
  2670. sym_name(np), istat, dstat, sist);
  2671. return IRQ_NONE;
  2672. }
  2673. /*
  2674. * Dequeue from the START queue all CCBs that match
  2675. * a given target/lun/task condition (-1 means all),
  2676. * and move them from the BUSY queue to the COMP queue
  2677. * with DID_SOFT_ERROR status condition.
  2678. * This function is used during error handling/recovery.
  2679. * It is called with SCRIPTS not running.
  2680. */
  2681. static int
  2682. sym_dequeue_from_squeue(struct sym_hcb *np, int i, int target, int lun, int task)
  2683. {
  2684. int j;
  2685. struct sym_ccb *cp;
  2686. /*
  2687. * Make sure the starting index is within range.
  2688. */
  2689. assert((i >= 0) && (i < 2*MAX_QUEUE));
  2690. /*
  2691. * Walk until end of START queue and dequeue every job
  2692. * that matches the target/lun/task condition.
  2693. */
  2694. j = i;
  2695. while (i != np->squeueput) {
  2696. cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
  2697. assert(cp);
  2698. #ifdef SYM_CONF_IARB_SUPPORT
  2699. /* Forget hints for IARB, they may be no longer relevant */
  2700. cp->host_flags &= ~HF_HINT_IARB;
  2701. #endif
  2702. if ((target == -1 || cp->target == target) &&
  2703. (lun == -1 || cp->lun == lun) &&
  2704. (task == -1 || cp->tag == task)) {
  2705. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  2706. sym_set_cam_status(cp->cmd, DID_SOFT_ERROR);
  2707. #else
  2708. sym_set_cam_status(cp->cmd, DID_REQUEUE);
  2709. #endif
  2710. sym_remque(&cp->link_ccbq);
  2711. sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
  2712. }
  2713. else {
  2714. if (i != j)
  2715. np->squeue[j] = np->squeue[i];
  2716. if ((j += 2) >= MAX_QUEUE*2) j = 0;
  2717. }
  2718. if ((i += 2) >= MAX_QUEUE*2) i = 0;
  2719. }
  2720. if (i != j) /* Copy back the idle task if needed */
  2721. np->squeue[j] = np->squeue[i];
  2722. np->squeueput = j; /* Update our current start queue pointer */
  2723. return (i - j) / 2;
  2724. }
  2725. /*
  2726. * chip handler for bad SCSI status condition
  2727. *
  2728. * In case of bad SCSI status, we unqueue all the tasks
  2729. * currently queued to the controller but not yet started
  2730. * and then restart the SCRIPTS processor immediately.
  2731. *
  2732. * QUEUE FULL and BUSY conditions are handled the same way.
  2733. * Basically all the not yet started tasks are requeued in
  2734. * device queue and the queue is frozen until a completion.
  2735. *
  2736. * For CHECK CONDITION and COMMAND TERMINATED status, we use
  2737. * the CCB of the failed command to prepare a REQUEST SENSE
  2738. * SCSI command and queue it to the controller queue.
  2739. *
  2740. * SCRATCHA is assumed to have been loaded with STARTPOS
  2741. * before the SCRIPTS called the C code.
  2742. */
  2743. static void sym_sir_bad_scsi_status(struct sym_hcb *np, int num, struct sym_ccb *cp)
  2744. {
  2745. u32 startp;
  2746. u_char s_status = cp->ssss_status;
  2747. u_char h_flags = cp->host_flags;
  2748. int msglen;
  2749. int i;
  2750. /*
  2751. * Compute the index of the next job to start from SCRIPTS.
  2752. */
  2753. i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
  2754. /*
  2755. * The last CCB queued used for IARB hint may be
  2756. * no longer relevant. Forget it.
  2757. */
  2758. #ifdef SYM_CONF_IARB_SUPPORT
  2759. if (np->last_cp)
  2760. np->last_cp = 0;
  2761. #endif
  2762. /*
  2763. * Now deal with the SCSI status.
  2764. */
  2765. switch(s_status) {
  2766. case S_BUSY:
  2767. case S_QUEUE_FULL:
  2768. if (sym_verbose >= 2) {
  2769. sym_print_addr(cp->cmd, "%s\n",
  2770. s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
  2771. }
  2772. fallthrough;
  2773. default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
  2774. sym_complete_error (np, cp);
  2775. break;
  2776. case S_TERMINATED:
  2777. case S_CHECK_COND:
  2778. /*
  2779. * If we get an SCSI error when requesting sense, give up.
  2780. */
  2781. if (h_flags & HF_SENSE) {
  2782. sym_complete_error (np, cp);
  2783. break;
  2784. }
  2785. /*
  2786. * Dequeue all queued CCBs for that device not yet started,
  2787. * and restart the SCRIPTS processor immediately.
  2788. */
  2789. sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
  2790. OUTL_DSP(np, SCRIPTA_BA(np, start));
  2791. /*
  2792. * Save some info of the actual IO.
  2793. * Compute the data residual.
  2794. */
  2795. cp->sv_scsi_status = cp->ssss_status;
  2796. cp->sv_xerr_status = cp->xerr_status;
  2797. cp->sv_resid = sym_compute_residual(np, cp);
  2798. /*
  2799. * Prepare all needed data structures for
  2800. * requesting sense data.
  2801. */
  2802. cp->scsi_smsg2[0] = IDENTIFY(0, cp->lun);
  2803. msglen = 1;
  2804. /*
  2805. * If we are currently using anything different from
  2806. * async. 8 bit data transfers with that target,
  2807. * start a negotiation, since the device may want
  2808. * to report us a UNIT ATTENTION condition due to
  2809. * a cause we currently ignore, and we donnot want
  2810. * to be stuck with WIDE and/or SYNC data transfer.
  2811. *
  2812. * cp->nego_status is filled by sym_prepare_nego().
  2813. */
  2814. cp->nego_status = 0;
  2815. msglen += sym_prepare_nego(np, cp, &cp->scsi_smsg2[msglen]);
  2816. /*
  2817. * Message table indirect structure.
  2818. */
  2819. cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg2);
  2820. cp->phys.smsg.size = cpu_to_scr(msglen);
  2821. /*
  2822. * sense command
  2823. */
  2824. cp->phys.cmd.addr = CCB_BA(cp, sensecmd);
  2825. cp->phys.cmd.size = cpu_to_scr(6);
  2826. /*
  2827. * patch requested size into sense command
  2828. */
  2829. cp->sensecmd[0] = REQUEST_SENSE;
  2830. cp->sensecmd[1] = 0;
  2831. if (cp->cmd->device->scsi_level <= SCSI_2 && cp->lun <= 7)
  2832. cp->sensecmd[1] = cp->lun << 5;
  2833. cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
  2834. cp->data_len = SYM_SNS_BBUF_LEN;
  2835. /*
  2836. * sense data
  2837. */
  2838. memset(cp->sns_bbuf, 0, SYM_SNS_BBUF_LEN);
  2839. cp->phys.sense.addr = CCB_BA(cp, sns_bbuf);
  2840. cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
  2841. /*
  2842. * requeue the command.
  2843. */
  2844. startp = SCRIPTB_BA(np, sdata_in);
  2845. cp->phys.head.savep = cpu_to_scr(startp);
  2846. cp->phys.head.lastp = cpu_to_scr(startp);
  2847. cp->startp = cpu_to_scr(startp);
  2848. cp->goalp = cpu_to_scr(startp + 16);
  2849. cp->host_xflags = 0;
  2850. cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
  2851. cp->ssss_status = S_ILLEGAL;
  2852. cp->host_flags = (HF_SENSE|HF_DATA_IN);
  2853. cp->xerr_status = 0;
  2854. cp->extra_bytes = 0;
  2855. cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select));
  2856. /*
  2857. * Requeue the command.
  2858. */
  2859. sym_put_start_queue(np, cp);
  2860. /*
  2861. * Give back to upper layer everything we have dequeued.
  2862. */
  2863. sym_flush_comp_queue(np, 0);
  2864. break;
  2865. }
  2866. }
  2867. /*
  2868. * After a device has accepted some management message
  2869. * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
  2870. * a device signals a UNIT ATTENTION condition, some
  2871. * tasks are thrown away by the device. We are required
  2872. * to reflect that on our tasks list since the device
  2873. * will never complete these tasks.
  2874. *
  2875. * This function move from the BUSY queue to the COMP
  2876. * queue all disconnected CCBs for a given target that
  2877. * match the following criteria:
  2878. * - lun=-1 means any logical UNIT otherwise a given one.
  2879. * - task=-1 means any task, otherwise a given one.
  2880. */
  2881. int sym_clear_tasks(struct sym_hcb *np, int cam_status, int target, int lun, int task)
  2882. {
  2883. SYM_QUEHEAD qtmp, *qp;
  2884. int i = 0;
  2885. struct sym_ccb *cp;
  2886. /*
  2887. * Move the entire BUSY queue to our temporary queue.
  2888. */
  2889. sym_que_init(&qtmp);
  2890. sym_que_splice(&np->busy_ccbq, &qtmp);
  2891. sym_que_init(&np->busy_ccbq);
  2892. /*
  2893. * Put all CCBs that matches our criteria into
  2894. * the COMP queue and put back other ones into
  2895. * the BUSY queue.
  2896. */
  2897. while ((qp = sym_remque_head(&qtmp)) != NULL) {
  2898. struct scsi_cmnd *cmd;
  2899. cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  2900. cmd = cp->cmd;
  2901. if (cp->host_status != HS_DISCONNECT ||
  2902. cp->target != target ||
  2903. (lun != -1 && cp->lun != lun) ||
  2904. (task != -1 &&
  2905. (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
  2906. sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
  2907. continue;
  2908. }
  2909. sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
  2910. /* Preserve the software timeout condition */
  2911. if (sym_get_cam_status(cmd) != DID_TIME_OUT)
  2912. sym_set_cam_status(cmd, cam_status);
  2913. ++i;
  2914. #if 0
  2915. printf("XXXX TASK @%p CLEARED\n", cp);
  2916. #endif
  2917. }
  2918. return i;
  2919. }
  2920. /*
  2921. * chip handler for TASKS recovery
  2922. *
  2923. * We cannot safely abort a command, while the SCRIPTS
  2924. * processor is running, since we just would be in race
  2925. * with it.
  2926. *
  2927. * As long as we have tasks to abort, we keep the SEM
  2928. * bit set in the ISTAT. When this bit is set, the
  2929. * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
  2930. * each time it enters the scheduler.
  2931. *
  2932. * If we have to reset a target, clear tasks of a unit,
  2933. * or to perform the abort of a disconnected job, we
  2934. * restart the SCRIPTS for selecting the target. Once
  2935. * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
  2936. * If it loses arbitration, the SCRIPTS will interrupt again
  2937. * the next time it will enter its scheduler, and so on ...
  2938. *
  2939. * On SIR_TARGET_SELECTED, we scan for the more
  2940. * appropriate thing to do:
  2941. *
  2942. * - If nothing, we just sent a M_ABORT message to the
  2943. * target to get rid of the useless SCSI bus ownership.
  2944. * According to the specs, no tasks shall be affected.
  2945. * - If the target is to be reset, we send it a M_RESET
  2946. * message.
  2947. * - If a logical UNIT is to be cleared , we send the
  2948. * IDENTIFY(lun) + M_ABORT.
  2949. * - If an untagged task is to be aborted, we send the
  2950. * IDENTIFY(lun) + M_ABORT.
  2951. * - If a tagged task is to be aborted, we send the
  2952. * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
  2953. *
  2954. * Once our 'kiss of death' :) message has been accepted
  2955. * by the target, the SCRIPTS interrupts again
  2956. * (SIR_ABORT_SENT). On this interrupt, we complete
  2957. * all the CCBs that should have been aborted by the
  2958. * target according to our message.
  2959. */
  2960. static void sym_sir_task_recovery(struct sym_hcb *np, int num)
  2961. {
  2962. SYM_QUEHEAD *qp;
  2963. struct sym_ccb *cp;
  2964. struct sym_tcb *tp = NULL; /* gcc isn't quite smart enough yet */
  2965. struct scsi_target *starget;
  2966. int target=-1, lun=-1, task;
  2967. int i, k;
  2968. switch(num) {
  2969. /*
  2970. * The SCRIPTS processor stopped before starting
  2971. * the next command in order to allow us to perform
  2972. * some task recovery.
  2973. */
  2974. case SIR_SCRIPT_STOPPED:
  2975. /*
  2976. * Do we have any target to reset or unit to clear ?
  2977. */
  2978. for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
  2979. tp = &np->target[i];
  2980. if (tp->to_reset ||
  2981. (tp->lun0p && tp->lun0p->to_clear)) {
  2982. target = i;
  2983. break;
  2984. }
  2985. if (!tp->lunmp)
  2986. continue;
  2987. for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
  2988. if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
  2989. target = i;
  2990. break;
  2991. }
  2992. }
  2993. if (target != -1)
  2994. break;
  2995. }
  2996. /*
  2997. * If not, walk the busy queue for any
  2998. * disconnected CCB to be aborted.
  2999. */
  3000. if (target == -1) {
  3001. FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
  3002. cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
  3003. if (cp->host_status != HS_DISCONNECT)
  3004. continue;
  3005. if (cp->to_abort) {
  3006. target = cp->target;
  3007. break;
  3008. }
  3009. }
  3010. }
  3011. /*
  3012. * If some target is to be selected,
  3013. * prepare and start the selection.
  3014. */
  3015. if (target != -1) {
  3016. tp = &np->target[target];
  3017. np->abrt_sel.sel_id = target;
  3018. np->abrt_sel.sel_scntl3 = tp->head.wval;
  3019. np->abrt_sel.sel_sxfer = tp->head.sval;
  3020. OUTL(np, nc_dsa, np->hcb_ba);
  3021. OUTL_DSP(np, SCRIPTB_BA(np, sel_for_abort));
  3022. return;
  3023. }
  3024. /*
  3025. * Now look for a CCB to abort that haven't started yet.
  3026. * Btw, the SCRIPTS processor is still stopped, so
  3027. * we are not in race.
  3028. */
  3029. i = 0;
  3030. cp = NULL;
  3031. FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
  3032. cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  3033. if (cp->host_status != HS_BUSY &&
  3034. cp->host_status != HS_NEGOTIATE)
  3035. continue;
  3036. if (!cp->to_abort)
  3037. continue;
  3038. #ifdef SYM_CONF_IARB_SUPPORT
  3039. /*
  3040. * If we are using IMMEDIATE ARBITRATION, we donnot
  3041. * want to cancel the last queued CCB, since the
  3042. * SCRIPTS may have anticipated the selection.
  3043. */
  3044. if (cp == np->last_cp) {
  3045. cp->to_abort = 0;
  3046. continue;
  3047. }
  3048. #endif
  3049. i = 1; /* Means we have found some */
  3050. break;
  3051. }
  3052. if (!i) {
  3053. /*
  3054. * We are done, so we donnot need
  3055. * to synchronize with the SCRIPTS anylonger.
  3056. * Remove the SEM flag from the ISTAT.
  3057. */
  3058. np->istat_sem = 0;
  3059. OUTB(np, nc_istat, SIGP);
  3060. break;
  3061. }
  3062. /*
  3063. * Compute index of next position in the start
  3064. * queue the SCRIPTS intends to start and dequeue
  3065. * all CCBs for that device that haven't been started.
  3066. */
  3067. i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
  3068. i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
  3069. /*
  3070. * Make sure at least our IO to abort has been dequeued.
  3071. */
  3072. #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
  3073. assert(i && sym_get_cam_status(cp->cmd) == DID_SOFT_ERROR);
  3074. #else
  3075. sym_remque(&cp->link_ccbq);
  3076. sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
  3077. #endif
  3078. /*
  3079. * Keep track in cam status of the reason of the abort.
  3080. */
  3081. if (cp->to_abort == 2)
  3082. sym_set_cam_status(cp->cmd, DID_TIME_OUT);
  3083. else
  3084. sym_set_cam_status(cp->cmd, DID_ABORT);
  3085. /*
  3086. * Complete with error everything that we have dequeued.
  3087. */
  3088. sym_flush_comp_queue(np, 0);
  3089. break;
  3090. /*
  3091. * The SCRIPTS processor has selected a target
  3092. * we may have some manual recovery to perform for.
  3093. */
  3094. case SIR_TARGET_SELECTED:
  3095. target = INB(np, nc_sdid) & 0xf;
  3096. tp = &np->target[target];
  3097. np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
  3098. /*
  3099. * If the target is to be reset, prepare a
  3100. * M_RESET message and clear the to_reset flag
  3101. * since we donnot expect this operation to fail.
  3102. */
  3103. if (tp->to_reset) {
  3104. np->abrt_msg[0] = M_RESET;
  3105. np->abrt_tbl.size = 1;
  3106. tp->to_reset = 0;
  3107. break;
  3108. }
  3109. /*
  3110. * Otherwise, look for some logical unit to be cleared.
  3111. */
  3112. if (tp->lun0p && tp->lun0p->to_clear)
  3113. lun = 0;
  3114. else if (tp->lunmp) {
  3115. for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
  3116. if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
  3117. lun = k;
  3118. break;
  3119. }
  3120. }
  3121. }
  3122. /*
  3123. * If a logical unit is to be cleared, prepare
  3124. * an IDENTIFY(lun) + ABORT MESSAGE.
  3125. */
  3126. if (lun != -1) {
  3127. struct sym_lcb *lp = sym_lp(tp, lun);
  3128. lp->to_clear = 0; /* We don't expect to fail here */
  3129. np->abrt_msg[0] = IDENTIFY(0, lun);
  3130. np->abrt_msg[1] = M_ABORT;
  3131. np->abrt_tbl.size = 2;
  3132. break;
  3133. }
  3134. /*
  3135. * Otherwise, look for some disconnected job to
  3136. * abort for this target.
  3137. */
  3138. i = 0;
  3139. cp = NULL;
  3140. FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
  3141. cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  3142. if (cp->host_status != HS_DISCONNECT)
  3143. continue;
  3144. if (cp->target != target)
  3145. continue;
  3146. if (!cp->to_abort)
  3147. continue;
  3148. i = 1; /* Means we have some */
  3149. break;
  3150. }
  3151. /*
  3152. * If we have none, probably since the device has
  3153. * completed the command before we won abitration,
  3154. * send a M_ABORT message without IDENTIFY.
  3155. * According to the specs, the device must just
  3156. * disconnect the BUS and not abort any task.
  3157. */
  3158. if (!i) {
  3159. np->abrt_msg[0] = M_ABORT;
  3160. np->abrt_tbl.size = 1;
  3161. break;
  3162. }
  3163. /*
  3164. * We have some task to abort.
  3165. * Set the IDENTIFY(lun)
  3166. */
  3167. np->abrt_msg[0] = IDENTIFY(0, cp->lun);
  3168. /*
  3169. * If we want to abort an untagged command, we
  3170. * will send a IDENTIFY + M_ABORT.
  3171. * Otherwise (tagged command), we will send
  3172. * a IDENTITFY + task attributes + ABORT TAG.
  3173. */
  3174. if (cp->tag == NO_TAG) {
  3175. np->abrt_msg[1] = M_ABORT;
  3176. np->abrt_tbl.size = 2;
  3177. } else {
  3178. np->abrt_msg[1] = cp->scsi_smsg[1];
  3179. np->abrt_msg[2] = cp->scsi_smsg[2];
  3180. np->abrt_msg[3] = M_ABORT_TAG;
  3181. np->abrt_tbl.size = 4;
  3182. }
  3183. /*
  3184. * Keep track of software timeout condition, since the
  3185. * peripheral driver may not count retries on abort
  3186. * conditions not due to timeout.
  3187. */
  3188. if (cp->to_abort == 2)
  3189. sym_set_cam_status(cp->cmd, DID_TIME_OUT);
  3190. cp->to_abort = 0; /* We donnot expect to fail here */
  3191. break;
  3192. /*
  3193. * The target has accepted our message and switched
  3194. * to BUS FREE phase as we expected.
  3195. */
  3196. case SIR_ABORT_SENT:
  3197. target = INB(np, nc_sdid) & 0xf;
  3198. tp = &np->target[target];
  3199. starget = tp->starget;
  3200. /*
  3201. ** If we didn't abort anything, leave here.
  3202. */
  3203. if (np->abrt_msg[0] == M_ABORT)
  3204. break;
  3205. /*
  3206. * If we sent a M_RESET, then a hardware reset has
  3207. * been performed by the target.
  3208. * - Reset everything to async 8 bit
  3209. * - Tell ourself to negotiate next time :-)
  3210. * - Prepare to clear all disconnected CCBs for
  3211. * this target from our task list (lun=task=-1)
  3212. */
  3213. lun = -1;
  3214. task = -1;
  3215. if (np->abrt_msg[0] == M_RESET) {
  3216. tp->head.sval = 0;
  3217. tp->head.wval = np->rv_scntl3;
  3218. tp->head.uval = 0;
  3219. spi_period(starget) = 0;
  3220. spi_offset(starget) = 0;
  3221. spi_width(starget) = 0;
  3222. spi_iu(starget) = 0;
  3223. spi_dt(starget) = 0;
  3224. spi_qas(starget) = 0;
  3225. tp->tgoal.check_nego = 1;
  3226. tp->tgoal.renego = 0;
  3227. }
  3228. /*
  3229. * Otherwise, check for the LUN and TASK(s)
  3230. * concerned by the cancelation.
  3231. * If it is not ABORT_TAG then it is CLEAR_QUEUE
  3232. * or an ABORT message :-)
  3233. */
  3234. else {
  3235. lun = np->abrt_msg[0] & 0x3f;
  3236. if (np->abrt_msg[1] == M_ABORT_TAG)
  3237. task = np->abrt_msg[2];
  3238. }
  3239. /*
  3240. * Complete all the CCBs the device should have
  3241. * aborted due to our 'kiss of death' message.
  3242. */
  3243. i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
  3244. sym_dequeue_from_squeue(np, i, target, lun, -1);
  3245. sym_clear_tasks(np, DID_ABORT, target, lun, task);
  3246. sym_flush_comp_queue(np, 0);
  3247. /*
  3248. * If we sent a BDR, make upper layer aware of that.
  3249. */
  3250. if (np->abrt_msg[0] == M_RESET)
  3251. starget_printk(KERN_NOTICE, starget,
  3252. "has been reset\n");
  3253. break;
  3254. }
  3255. /*
  3256. * Print to the log the message we intend to send.
  3257. */
  3258. if (num == SIR_TARGET_SELECTED) {
  3259. dev_info(&tp->starget->dev, "control msgout:");
  3260. sym_printl_hex(np->abrt_msg, np->abrt_tbl.size);
  3261. np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
  3262. }
  3263. /*
  3264. * Let the SCRIPTS processor continue.
  3265. */
  3266. OUTONB_STD();
  3267. }
  3268. /*
  3269. * Gerard's alchemy:) that deals with with the data
  3270. * pointer for both MDP and the residual calculation.
  3271. *
  3272. * I didn't want to bloat the code by more than 200
  3273. * lines for the handling of both MDP and the residual.
  3274. * This has been achieved by using a data pointer
  3275. * representation consisting in an index in the data
  3276. * array (dp_sg) and a negative offset (dp_ofs) that
  3277. * have the following meaning:
  3278. *
  3279. * - dp_sg = SYM_CONF_MAX_SG
  3280. * we are at the end of the data script.
  3281. * - dp_sg < SYM_CONF_MAX_SG
  3282. * dp_sg points to the next entry of the scatter array
  3283. * we want to transfer.
  3284. * - dp_ofs < 0
  3285. * dp_ofs represents the residual of bytes of the
  3286. * previous entry scatter entry we will send first.
  3287. * - dp_ofs = 0
  3288. * no residual to send first.
  3289. *
  3290. * The function sym_evaluate_dp() accepts an arbitray
  3291. * offset (basically from the MDP message) and returns
  3292. * the corresponding values of dp_sg and dp_ofs.
  3293. */
  3294. static int sym_evaluate_dp(struct sym_hcb *np, struct sym_ccb *cp, u32 scr, int *ofs)
  3295. {
  3296. u32 dp_scr;
  3297. int dp_ofs, dp_sg, dp_sgmin;
  3298. int tmp;
  3299. struct sym_pmc *pm;
  3300. /*
  3301. * Compute the resulted data pointer in term of a script
  3302. * address within some DATA script and a signed byte offset.
  3303. */
  3304. dp_scr = scr;
  3305. dp_ofs = *ofs;
  3306. if (dp_scr == SCRIPTA_BA(np, pm0_data))
  3307. pm = &cp->phys.pm0;
  3308. else if (dp_scr == SCRIPTA_BA(np, pm1_data))
  3309. pm = &cp->phys.pm1;
  3310. else
  3311. pm = NULL;
  3312. if (pm) {
  3313. dp_scr = scr_to_cpu(pm->ret);
  3314. dp_ofs -= scr_to_cpu(pm->sg.size) & 0x00ffffff;
  3315. }
  3316. /*
  3317. * If we are auto-sensing, then we are done.
  3318. */
  3319. if (cp->host_flags & HF_SENSE) {
  3320. *ofs = dp_ofs;
  3321. return 0;
  3322. }
  3323. /*
  3324. * Deduce the index of the sg entry.
  3325. * Keep track of the index of the first valid entry.
  3326. * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
  3327. * end of the data.
  3328. */
  3329. tmp = scr_to_cpu(cp->goalp);
  3330. dp_sg = SYM_CONF_MAX_SG;
  3331. if (dp_scr != tmp)
  3332. dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
  3333. dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
  3334. /*
  3335. * Move to the sg entry the data pointer belongs to.
  3336. *
  3337. * If we are inside the data area, we expect result to be:
  3338. *
  3339. * Either,
  3340. * dp_ofs = 0 and dp_sg is the index of the sg entry
  3341. * the data pointer belongs to (or the end of the data)
  3342. * Or,
  3343. * dp_ofs < 0 and dp_sg is the index of the sg entry
  3344. * the data pointer belongs to + 1.
  3345. */
  3346. if (dp_ofs < 0) {
  3347. int n;
  3348. while (dp_sg > dp_sgmin) {
  3349. --dp_sg;
  3350. tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
  3351. n = dp_ofs + (tmp & 0xffffff);
  3352. if (n > 0) {
  3353. ++dp_sg;
  3354. break;
  3355. }
  3356. dp_ofs = n;
  3357. }
  3358. }
  3359. else if (dp_ofs > 0) {
  3360. while (dp_sg < SYM_CONF_MAX_SG) {
  3361. tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
  3362. dp_ofs -= (tmp & 0xffffff);
  3363. ++dp_sg;
  3364. if (dp_ofs <= 0)
  3365. break;
  3366. }
  3367. }
  3368. /*
  3369. * Make sure the data pointer is inside the data area.
  3370. * If not, return some error.
  3371. */
  3372. if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
  3373. goto out_err;
  3374. else if (dp_sg > SYM_CONF_MAX_SG ||
  3375. (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
  3376. goto out_err;
  3377. /*
  3378. * Save the extreme pointer if needed.
  3379. */
  3380. if (dp_sg > cp->ext_sg ||
  3381. (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
  3382. cp->ext_sg = dp_sg;
  3383. cp->ext_ofs = dp_ofs;
  3384. }
  3385. /*
  3386. * Return data.
  3387. */
  3388. *ofs = dp_ofs;
  3389. return dp_sg;
  3390. out_err:
  3391. return -1;
  3392. }
  3393. /*
  3394. * chip handler for MODIFY DATA POINTER MESSAGE
  3395. *
  3396. * We also call this function on IGNORE WIDE RESIDUE
  3397. * messages that do not match a SWIDE full condition.
  3398. * Btw, we assume in that situation that such a message
  3399. * is equivalent to a MODIFY DATA POINTER (offset=-1).
  3400. */
  3401. static void sym_modify_dp(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp, int ofs)
  3402. {
  3403. int dp_ofs = ofs;
  3404. u32 dp_scr = sym_get_script_dp (np, cp);
  3405. u32 dp_ret;
  3406. u32 tmp;
  3407. u_char hflags;
  3408. int dp_sg;
  3409. struct sym_pmc *pm;
  3410. /*
  3411. * Not supported for auto-sense.
  3412. */
  3413. if (cp->host_flags & HF_SENSE)
  3414. goto out_reject;
  3415. /*
  3416. * Apply our alchemy:) (see comments in sym_evaluate_dp()),
  3417. * to the resulted data pointer.
  3418. */
  3419. dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
  3420. if (dp_sg < 0)
  3421. goto out_reject;
  3422. /*
  3423. * And our alchemy:) allows to easily calculate the data
  3424. * script address we want to return for the next data phase.
  3425. */
  3426. dp_ret = cpu_to_scr(cp->goalp);
  3427. dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
  3428. /*
  3429. * If offset / scatter entry is zero we donnot need
  3430. * a context for the new current data pointer.
  3431. */
  3432. if (dp_ofs == 0) {
  3433. dp_scr = dp_ret;
  3434. goto out_ok;
  3435. }
  3436. /*
  3437. * Get a context for the new current data pointer.
  3438. */
  3439. hflags = INB(np, HF_PRT);
  3440. if (hflags & HF_DP_SAVED)
  3441. hflags ^= HF_ACT_PM;
  3442. if (!(hflags & HF_ACT_PM)) {
  3443. pm = &cp->phys.pm0;
  3444. dp_scr = SCRIPTA_BA(np, pm0_data);
  3445. }
  3446. else {
  3447. pm = &cp->phys.pm1;
  3448. dp_scr = SCRIPTA_BA(np, pm1_data);
  3449. }
  3450. hflags &= ~(HF_DP_SAVED);
  3451. OUTB(np, HF_PRT, hflags);
  3452. /*
  3453. * Set up the new current data pointer.
  3454. * ofs < 0 there, and for the next data phase, we
  3455. * want to transfer part of the data of the sg entry
  3456. * corresponding to index dp_sg-1 prior to returning
  3457. * to the main data script.
  3458. */
  3459. pm->ret = cpu_to_scr(dp_ret);
  3460. tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
  3461. tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
  3462. pm->sg.addr = cpu_to_scr(tmp);
  3463. pm->sg.size = cpu_to_scr(-dp_ofs);
  3464. out_ok:
  3465. sym_set_script_dp (np, cp, dp_scr);
  3466. OUTL_DSP(np, SCRIPTA_BA(np, clrack));
  3467. return;
  3468. out_reject:
  3469. OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
  3470. }
  3471. /*
  3472. * chip calculation of the data residual.
  3473. *
  3474. * As I used to say, the requirement of data residual
  3475. * in SCSI is broken, useless and cannot be achieved
  3476. * without huge complexity.
  3477. * But most OSes and even the official CAM require it.
  3478. * When stupidity happens to be so widely spread inside
  3479. * a community, it gets hard to convince.
  3480. *
  3481. * Anyway, I don't care, since I am not going to use
  3482. * any software that considers this data residual as
  3483. * a relevant information. :)
  3484. */
  3485. int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp)
  3486. {
  3487. int dp_sg, resid = 0;
  3488. int dp_ofs = 0;
  3489. /*
  3490. * Check for some data lost or just thrown away.
  3491. * We are not required to be quite accurate in this
  3492. * situation. Btw, if we are odd for output and the
  3493. * device claims some more data, it may well happen
  3494. * than our residual be zero. :-)
  3495. */
  3496. if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
  3497. if (cp->xerr_status & XE_EXTRA_DATA)
  3498. resid -= cp->extra_bytes;
  3499. if (cp->xerr_status & XE_SODL_UNRUN)
  3500. ++resid;
  3501. if (cp->xerr_status & XE_SWIDE_OVRUN)
  3502. --resid;
  3503. }
  3504. /*
  3505. * If all data has been transferred,
  3506. * there is no residual.
  3507. */
  3508. if (cp->phys.head.lastp == cp->goalp)
  3509. return resid;
  3510. /*
  3511. * If no data transfer occurs, or if the data
  3512. * pointer is weird, return full residual.
  3513. */
  3514. if (cp->startp == cp->phys.head.lastp ||
  3515. sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
  3516. &dp_ofs) < 0) {
  3517. return cp->data_len - cp->odd_byte_adjustment;
  3518. }
  3519. /*
  3520. * If we were auto-sensing, then we are done.
  3521. */
  3522. if (cp->host_flags & HF_SENSE) {
  3523. return -dp_ofs;
  3524. }
  3525. /*
  3526. * We are now full comfortable in the computation
  3527. * of the data residual (2's complement).
  3528. */
  3529. resid = -cp->ext_ofs;
  3530. for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
  3531. u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
  3532. resid += (tmp & 0xffffff);
  3533. }
  3534. resid -= cp->odd_byte_adjustment;
  3535. /*
  3536. * Hopefully, the result is not too wrong.
  3537. */
  3538. return resid;
  3539. }
  3540. /*
  3541. * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
  3542. *
  3543. * When we try to negotiate, we append the negotiation message
  3544. * to the identify and (maybe) simple tag message.
  3545. * The host status field is set to HS_NEGOTIATE to mark this
  3546. * situation.
  3547. *
  3548. * If the target doesn't answer this message immediately
  3549. * (as required by the standard), the SIR_NEGO_FAILED interrupt
  3550. * will be raised eventually.
  3551. * The handler removes the HS_NEGOTIATE status, and sets the
  3552. * negotiated value to the default (async / nowide).
  3553. *
  3554. * If we receive a matching answer immediately, we check it
  3555. * for validity, and set the values.
  3556. *
  3557. * If we receive a Reject message immediately, we assume the
  3558. * negotiation has failed, and fall back to standard values.
  3559. *
  3560. * If we receive a negotiation message while not in HS_NEGOTIATE
  3561. * state, it's a target initiated negotiation. We prepare a
  3562. * (hopefully) valid answer, set our parameters, and send back
  3563. * this answer to the target.
  3564. *
  3565. * If the target doesn't fetch the answer (no message out phase),
  3566. * we assume the negotiation has failed, and fall back to default
  3567. * settings (SIR_NEGO_PROTO interrupt).
  3568. *
  3569. * When we set the values, we adjust them in all ccbs belonging
  3570. * to this target, in the controller's register, and in the "phys"
  3571. * field of the controller's struct sym_hcb.
  3572. */
  3573. /*
  3574. * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
  3575. */
  3576. static int
  3577. sym_sync_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp)
  3578. {
  3579. int target = cp->target;
  3580. u_char chg, ofs, per, fak, div;
  3581. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3582. sym_print_nego_msg(np, target, "sync msgin", np->msgin);
  3583. }
  3584. /*
  3585. * Get requested values.
  3586. */
  3587. chg = 0;
  3588. per = np->msgin[3];
  3589. ofs = np->msgin[4];
  3590. /*
  3591. * Check values against our limits.
  3592. */
  3593. if (ofs) {
  3594. if (ofs > np->maxoffs)
  3595. {chg = 1; ofs = np->maxoffs;}
  3596. }
  3597. if (ofs) {
  3598. if (per < np->minsync)
  3599. {chg = 1; per = np->minsync;}
  3600. }
  3601. /*
  3602. * Get new chip synchronous parameters value.
  3603. */
  3604. div = fak = 0;
  3605. if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
  3606. goto reject_it;
  3607. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3608. sym_print_addr(cp->cmd,
  3609. "sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
  3610. ofs, per, div, fak, chg);
  3611. }
  3612. /*
  3613. * If it was an answer we want to change,
  3614. * then it isn't acceptable. Reject it.
  3615. */
  3616. if (!req && chg)
  3617. goto reject_it;
  3618. /*
  3619. * Apply new values.
  3620. */
  3621. sym_setsync (np, target, ofs, per, div, fak);
  3622. /*
  3623. * It was an answer. We are done.
  3624. */
  3625. if (!req)
  3626. return 0;
  3627. /*
  3628. * It was a request. Prepare an answer message.
  3629. */
  3630. spi_populate_sync_msg(np->msgout, per, ofs);
  3631. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3632. sym_print_nego_msg(np, target, "sync msgout", np->msgout);
  3633. }
  3634. np->msgin [0] = M_NOOP;
  3635. return 0;
  3636. reject_it:
  3637. sym_setsync (np, target, 0, 0, 0, 0);
  3638. return -1;
  3639. }
  3640. static void sym_sync_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
  3641. {
  3642. int req = 1;
  3643. int result;
  3644. /*
  3645. * Request or answer ?
  3646. */
  3647. if (INB(np, HS_PRT) == HS_NEGOTIATE) {
  3648. OUTB(np, HS_PRT, HS_BUSY);
  3649. if (cp->nego_status && cp->nego_status != NS_SYNC)
  3650. goto reject_it;
  3651. req = 0;
  3652. }
  3653. /*
  3654. * Check and apply new values.
  3655. */
  3656. result = sym_sync_nego_check(np, req, cp);
  3657. if (result) /* Not acceptable, reject it */
  3658. goto reject_it;
  3659. if (req) { /* Was a request, send response. */
  3660. cp->nego_status = NS_SYNC;
  3661. OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp));
  3662. }
  3663. else /* Was a response, we are done. */
  3664. OUTL_DSP(np, SCRIPTA_BA(np, clrack));
  3665. return;
  3666. reject_it:
  3667. OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
  3668. }
  3669. /*
  3670. * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
  3671. */
  3672. static int
  3673. sym_ppr_nego_check(struct sym_hcb *np, int req, int target)
  3674. {
  3675. struct sym_tcb *tp = &np->target[target];
  3676. unsigned char fak, div;
  3677. int dt, chg = 0;
  3678. unsigned char per = np->msgin[3];
  3679. unsigned char ofs = np->msgin[5];
  3680. unsigned char wide = np->msgin[6];
  3681. unsigned char opts = np->msgin[7] & PPR_OPT_MASK;
  3682. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3683. sym_print_nego_msg(np, target, "ppr msgin", np->msgin);
  3684. }
  3685. /*
  3686. * Check values against our limits.
  3687. */
  3688. if (wide > np->maxwide) {
  3689. chg = 1;
  3690. wide = np->maxwide;
  3691. }
  3692. if (!wide || !(np->features & FE_U3EN))
  3693. opts = 0;
  3694. if (opts != (np->msgin[7] & PPR_OPT_MASK))
  3695. chg = 1;
  3696. dt = opts & PPR_OPT_DT;
  3697. if (ofs) {
  3698. unsigned char maxoffs = dt ? np->maxoffs_dt : np->maxoffs;
  3699. if (ofs > maxoffs) {
  3700. chg = 1;
  3701. ofs = maxoffs;
  3702. }
  3703. }
  3704. if (ofs) {
  3705. unsigned char minsync = dt ? np->minsync_dt : np->minsync;
  3706. if (per < minsync) {
  3707. chg = 1;
  3708. per = minsync;
  3709. }
  3710. }
  3711. /*
  3712. * Get new chip synchronous parameters value.
  3713. */
  3714. div = fak = 0;
  3715. if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
  3716. goto reject_it;
  3717. /*
  3718. * If it was an answer we want to change,
  3719. * then it isn't acceptable. Reject it.
  3720. */
  3721. if (!req && chg)
  3722. goto reject_it;
  3723. /*
  3724. * Apply new values.
  3725. */
  3726. sym_setpprot(np, target, opts, ofs, per, wide, div, fak);
  3727. /*
  3728. * It was an answer. We are done.
  3729. */
  3730. if (!req)
  3731. return 0;
  3732. /*
  3733. * It was a request. Prepare an answer message.
  3734. */
  3735. spi_populate_ppr_msg(np->msgout, per, ofs, wide, opts);
  3736. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3737. sym_print_nego_msg(np, target, "ppr msgout", np->msgout);
  3738. }
  3739. np->msgin [0] = M_NOOP;
  3740. return 0;
  3741. reject_it:
  3742. sym_setpprot (np, target, 0, 0, 0, 0, 0, 0);
  3743. /*
  3744. * If it is a device response that should result in
  3745. * ST, we may want to try a legacy negotiation later.
  3746. */
  3747. if (!req && !opts) {
  3748. tp->tgoal.period = per;
  3749. tp->tgoal.offset = ofs;
  3750. tp->tgoal.width = wide;
  3751. tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0;
  3752. tp->tgoal.check_nego = 1;
  3753. }
  3754. return -1;
  3755. }
  3756. static void sym_ppr_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
  3757. {
  3758. int req = 1;
  3759. int result;
  3760. /*
  3761. * Request or answer ?
  3762. */
  3763. if (INB(np, HS_PRT) == HS_NEGOTIATE) {
  3764. OUTB(np, HS_PRT, HS_BUSY);
  3765. if (cp->nego_status && cp->nego_status != NS_PPR)
  3766. goto reject_it;
  3767. req = 0;
  3768. }
  3769. /*
  3770. * Check and apply new values.
  3771. */
  3772. result = sym_ppr_nego_check(np, req, cp->target);
  3773. if (result) /* Not acceptable, reject it */
  3774. goto reject_it;
  3775. if (req) { /* Was a request, send response. */
  3776. cp->nego_status = NS_PPR;
  3777. OUTL_DSP(np, SCRIPTB_BA(np, ppr_resp));
  3778. }
  3779. else /* Was a response, we are done. */
  3780. OUTL_DSP(np, SCRIPTA_BA(np, clrack));
  3781. return;
  3782. reject_it:
  3783. OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
  3784. }
  3785. /*
  3786. * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
  3787. */
  3788. static int
  3789. sym_wide_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp)
  3790. {
  3791. int target = cp->target;
  3792. u_char chg, wide;
  3793. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3794. sym_print_nego_msg(np, target, "wide msgin", np->msgin);
  3795. }
  3796. /*
  3797. * Get requested values.
  3798. */
  3799. chg = 0;
  3800. wide = np->msgin[3];
  3801. /*
  3802. * Check values against our limits.
  3803. */
  3804. if (wide > np->maxwide) {
  3805. chg = 1;
  3806. wide = np->maxwide;
  3807. }
  3808. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3809. sym_print_addr(cp->cmd, "wdtr: wide=%d chg=%d.\n",
  3810. wide, chg);
  3811. }
  3812. /*
  3813. * If it was an answer we want to change,
  3814. * then it isn't acceptable. Reject it.
  3815. */
  3816. if (!req && chg)
  3817. goto reject_it;
  3818. /*
  3819. * Apply new values.
  3820. */
  3821. sym_setwide (np, target, wide);
  3822. /*
  3823. * It was an answer. We are done.
  3824. */
  3825. if (!req)
  3826. return 0;
  3827. /*
  3828. * It was a request. Prepare an answer message.
  3829. */
  3830. spi_populate_width_msg(np->msgout, wide);
  3831. np->msgin [0] = M_NOOP;
  3832. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3833. sym_print_nego_msg(np, target, "wide msgout", np->msgout);
  3834. }
  3835. return 0;
  3836. reject_it:
  3837. return -1;
  3838. }
  3839. static void sym_wide_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
  3840. {
  3841. int req = 1;
  3842. int result;
  3843. /*
  3844. * Request or answer ?
  3845. */
  3846. if (INB(np, HS_PRT) == HS_NEGOTIATE) {
  3847. OUTB(np, HS_PRT, HS_BUSY);
  3848. if (cp->nego_status && cp->nego_status != NS_WIDE)
  3849. goto reject_it;
  3850. req = 0;
  3851. }
  3852. /*
  3853. * Check and apply new values.
  3854. */
  3855. result = sym_wide_nego_check(np, req, cp);
  3856. if (result) /* Not acceptable, reject it */
  3857. goto reject_it;
  3858. if (req) { /* Was a request, send response. */
  3859. cp->nego_status = NS_WIDE;
  3860. OUTL_DSP(np, SCRIPTB_BA(np, wdtr_resp));
  3861. } else { /* Was a response. */
  3862. /*
  3863. * Negotiate for SYNC immediately after WIDE response.
  3864. * This allows to negotiate for both WIDE and SYNC on
  3865. * a single SCSI command (Suggested by Justin Gibbs).
  3866. */
  3867. if (tp->tgoal.offset) {
  3868. spi_populate_sync_msg(np->msgout, tp->tgoal.period,
  3869. tp->tgoal.offset);
  3870. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3871. sym_print_nego_msg(np, cp->target,
  3872. "sync msgout", np->msgout);
  3873. }
  3874. cp->nego_status = NS_SYNC;
  3875. OUTB(np, HS_PRT, HS_NEGOTIATE);
  3876. OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp));
  3877. return;
  3878. } else
  3879. OUTL_DSP(np, SCRIPTA_BA(np, clrack));
  3880. }
  3881. return;
  3882. reject_it:
  3883. OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
  3884. }
  3885. /*
  3886. * Reset DT, SYNC or WIDE to default settings.
  3887. *
  3888. * Called when a negotiation does not succeed either
  3889. * on rejection or on protocol error.
  3890. *
  3891. * A target that understands a PPR message should never
  3892. * reject it, and messing with it is very unlikely.
  3893. * So, if a PPR makes problems, we may just want to
  3894. * try a legacy negotiation later.
  3895. */
  3896. static void sym_nego_default(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
  3897. {
  3898. switch (cp->nego_status) {
  3899. case NS_PPR:
  3900. #if 0
  3901. sym_setpprot (np, cp->target, 0, 0, 0, 0, 0, 0);
  3902. #else
  3903. if (tp->tgoal.period < np->minsync)
  3904. tp->tgoal.period = np->minsync;
  3905. if (tp->tgoal.offset > np->maxoffs)
  3906. tp->tgoal.offset = np->maxoffs;
  3907. tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0;
  3908. tp->tgoal.check_nego = 1;
  3909. #endif
  3910. break;
  3911. case NS_SYNC:
  3912. sym_setsync (np, cp->target, 0, 0, 0, 0);
  3913. break;
  3914. case NS_WIDE:
  3915. sym_setwide (np, cp->target, 0);
  3916. break;
  3917. }
  3918. np->msgin [0] = M_NOOP;
  3919. np->msgout[0] = M_NOOP;
  3920. cp->nego_status = 0;
  3921. }
  3922. /*
  3923. * chip handler for MESSAGE REJECT received in response to
  3924. * PPR, WIDE or SYNCHRONOUS negotiation.
  3925. */
  3926. static void sym_nego_rejected(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
  3927. {
  3928. sym_nego_default(np, tp, cp);
  3929. OUTB(np, HS_PRT, HS_BUSY);
  3930. }
  3931. #define sym_printk(lvl, tp, cp, fmt, v...) do { \
  3932. if (cp) \
  3933. scmd_printk(lvl, cp->cmd, fmt, ##v); \
  3934. else \
  3935. starget_printk(lvl, tp->starget, fmt, ##v); \
  3936. } while (0)
  3937. /*
  3938. * chip exception handler for programmed interrupts.
  3939. */
  3940. static void sym_int_sir(struct sym_hcb *np)
  3941. {
  3942. u_char num = INB(np, nc_dsps);
  3943. u32 dsa = INL(np, nc_dsa);
  3944. struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
  3945. u_char target = INB(np, nc_sdid) & 0x0f;
  3946. struct sym_tcb *tp = &np->target[target];
  3947. int tmp;
  3948. if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
  3949. switch (num) {
  3950. #if SYM_CONF_DMA_ADDRESSING_MODE == 2
  3951. /*
  3952. * SCRIPTS tell us that we may have to update
  3953. * 64 bit DMA segment registers.
  3954. */
  3955. case SIR_DMAP_DIRTY:
  3956. sym_update_dmap_regs(np);
  3957. goto out;
  3958. #endif
  3959. /*
  3960. * Command has been completed with error condition
  3961. * or has been auto-sensed.
  3962. */
  3963. case SIR_COMPLETE_ERROR:
  3964. sym_complete_error(np, cp);
  3965. return;
  3966. /*
  3967. * The C code is currently trying to recover from something.
  3968. * Typically, user want to abort some command.
  3969. */
  3970. case SIR_SCRIPT_STOPPED:
  3971. case SIR_TARGET_SELECTED:
  3972. case SIR_ABORT_SENT:
  3973. sym_sir_task_recovery(np, num);
  3974. return;
  3975. /*
  3976. * The device didn't go to MSG OUT phase after having
  3977. * been selected with ATN. We do not want to handle that.
  3978. */
  3979. case SIR_SEL_ATN_NO_MSG_OUT:
  3980. sym_printk(KERN_WARNING, tp, cp,
  3981. "No MSG OUT phase after selection with ATN\n");
  3982. goto out_stuck;
  3983. /*
  3984. * The device didn't switch to MSG IN phase after
  3985. * having reselected the initiator.
  3986. */
  3987. case SIR_RESEL_NO_MSG_IN:
  3988. sym_printk(KERN_WARNING, tp, cp,
  3989. "No MSG IN phase after reselection\n");
  3990. goto out_stuck;
  3991. /*
  3992. * After reselection, the device sent a message that wasn't
  3993. * an IDENTIFY.
  3994. */
  3995. case SIR_RESEL_NO_IDENTIFY:
  3996. sym_printk(KERN_WARNING, tp, cp,
  3997. "No IDENTIFY after reselection\n");
  3998. goto out_stuck;
  3999. /*
  4000. * The device reselected a LUN we do not know about.
  4001. */
  4002. case SIR_RESEL_BAD_LUN:
  4003. np->msgout[0] = M_RESET;
  4004. goto out;
  4005. /*
  4006. * The device reselected for an untagged nexus and we
  4007. * haven't any.
  4008. */
  4009. case SIR_RESEL_BAD_I_T_L:
  4010. np->msgout[0] = M_ABORT;
  4011. goto out;
  4012. /*
  4013. * The device reselected for a tagged nexus that we do not have.
  4014. */
  4015. case SIR_RESEL_BAD_I_T_L_Q:
  4016. np->msgout[0] = M_ABORT_TAG;
  4017. goto out;
  4018. /*
  4019. * The SCRIPTS let us know that the device has grabbed
  4020. * our message and will abort the job.
  4021. */
  4022. case SIR_RESEL_ABORTED:
  4023. np->lastmsg = np->msgout[0];
  4024. np->msgout[0] = M_NOOP;
  4025. sym_printk(KERN_WARNING, tp, cp,
  4026. "message %x sent on bad reselection\n", np->lastmsg);
  4027. goto out;
  4028. /*
  4029. * The SCRIPTS let us know that a message has been
  4030. * successfully sent to the device.
  4031. */
  4032. case SIR_MSG_OUT_DONE:
  4033. np->lastmsg = np->msgout[0];
  4034. np->msgout[0] = M_NOOP;
  4035. /* Should we really care of that */
  4036. if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
  4037. if (cp) {
  4038. cp->xerr_status &= ~XE_PARITY_ERR;
  4039. if (!cp->xerr_status)
  4040. OUTOFFB(np, HF_PRT, HF_EXT_ERR);
  4041. }
  4042. }
  4043. goto out;
  4044. /*
  4045. * The device didn't send a GOOD SCSI status.
  4046. * We may have some work to do prior to allow
  4047. * the SCRIPTS processor to continue.
  4048. */
  4049. case SIR_BAD_SCSI_STATUS:
  4050. if (!cp)
  4051. goto out;
  4052. sym_sir_bad_scsi_status(np, num, cp);
  4053. return;
  4054. /*
  4055. * We are asked by the SCRIPTS to prepare a
  4056. * REJECT message.
  4057. */
  4058. case SIR_REJECT_TO_SEND:
  4059. sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
  4060. np->msgout[0] = M_REJECT;
  4061. goto out;
  4062. /*
  4063. * We have been ODD at the end of a DATA IN
  4064. * transfer and the device didn't send a
  4065. * IGNORE WIDE RESIDUE message.
  4066. * It is a data overrun condition.
  4067. */
  4068. case SIR_SWIDE_OVERRUN:
  4069. if (cp) {
  4070. OUTONB(np, HF_PRT, HF_EXT_ERR);
  4071. cp->xerr_status |= XE_SWIDE_OVRUN;
  4072. }
  4073. goto out;
  4074. /*
  4075. * We have been ODD at the end of a DATA OUT
  4076. * transfer.
  4077. * It is a data underrun condition.
  4078. */
  4079. case SIR_SODL_UNDERRUN:
  4080. if (cp) {
  4081. OUTONB(np, HF_PRT, HF_EXT_ERR);
  4082. cp->xerr_status |= XE_SODL_UNRUN;
  4083. }
  4084. goto out;
  4085. /*
  4086. * The device wants us to tranfer more data than
  4087. * expected or in the wrong direction.
  4088. * The number of extra bytes is in scratcha.
  4089. * It is a data overrun condition.
  4090. */
  4091. case SIR_DATA_OVERRUN:
  4092. if (cp) {
  4093. OUTONB(np, HF_PRT, HF_EXT_ERR);
  4094. cp->xerr_status |= XE_EXTRA_DATA;
  4095. cp->extra_bytes += INL(np, nc_scratcha);
  4096. }
  4097. goto out;
  4098. /*
  4099. * The device switched to an illegal phase (4/5).
  4100. */
  4101. case SIR_BAD_PHASE:
  4102. if (cp) {
  4103. OUTONB(np, HF_PRT, HF_EXT_ERR);
  4104. cp->xerr_status |= XE_BAD_PHASE;
  4105. }
  4106. goto out;
  4107. /*
  4108. * We received a message.
  4109. */
  4110. case SIR_MSG_RECEIVED:
  4111. if (!cp)
  4112. goto out_stuck;
  4113. switch (np->msgin [0]) {
  4114. /*
  4115. * We received an extended message.
  4116. * We handle MODIFY DATA POINTER, SDTR, WDTR
  4117. * and reject all other extended messages.
  4118. */
  4119. case M_EXTENDED:
  4120. switch (np->msgin [2]) {
  4121. case M_X_MODIFY_DP:
  4122. if (DEBUG_FLAGS & DEBUG_POINTER)
  4123. sym_print_msg(cp, "extended msg ",
  4124. np->msgin);
  4125. tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
  4126. (np->msgin[5]<<8) + (np->msgin[6]);
  4127. sym_modify_dp(np, tp, cp, tmp);
  4128. return;
  4129. case M_X_SYNC_REQ:
  4130. sym_sync_nego(np, tp, cp);
  4131. return;
  4132. case M_X_PPR_REQ:
  4133. sym_ppr_nego(np, tp, cp);
  4134. return;
  4135. case M_X_WIDE_REQ:
  4136. sym_wide_nego(np, tp, cp);
  4137. return;
  4138. default:
  4139. goto out_reject;
  4140. }
  4141. break;
  4142. /*
  4143. * We received a 1/2 byte message not handled from SCRIPTS.
  4144. * We are only expecting MESSAGE REJECT and IGNORE WIDE
  4145. * RESIDUE messages that haven't been anticipated by
  4146. * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
  4147. * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
  4148. */
  4149. case M_IGN_RESIDUE:
  4150. if (DEBUG_FLAGS & DEBUG_POINTER)
  4151. sym_print_msg(cp, "1 or 2 byte ", np->msgin);
  4152. if (cp->host_flags & HF_SENSE)
  4153. OUTL_DSP(np, SCRIPTA_BA(np, clrack));
  4154. else
  4155. sym_modify_dp(np, tp, cp, -1);
  4156. return;
  4157. case M_REJECT:
  4158. if (INB(np, HS_PRT) == HS_NEGOTIATE)
  4159. sym_nego_rejected(np, tp, cp);
  4160. else {
  4161. sym_print_addr(cp->cmd,
  4162. "M_REJECT received (%x:%x).\n",
  4163. scr_to_cpu(np->lastmsg), np->msgout[0]);
  4164. }
  4165. goto out_clrack;
  4166. break;
  4167. default:
  4168. goto out_reject;
  4169. }
  4170. break;
  4171. /*
  4172. * We received an unknown message.
  4173. * Ignore all MSG IN phases and reject it.
  4174. */
  4175. case SIR_MSG_WEIRD:
  4176. sym_print_msg(cp, "WEIRD message received", np->msgin);
  4177. OUTL_DSP(np, SCRIPTB_BA(np, msg_weird));
  4178. return;
  4179. /*
  4180. * Negotiation failed.
  4181. * Target does not send us the reply.
  4182. * Remove the HS_NEGOTIATE status.
  4183. */
  4184. case SIR_NEGO_FAILED:
  4185. OUTB(np, HS_PRT, HS_BUSY);
  4186. /*
  4187. * Negotiation failed.
  4188. * Target does not want answer message.
  4189. */
  4190. fallthrough;
  4191. case SIR_NEGO_PROTO:
  4192. sym_nego_default(np, tp, cp);
  4193. goto out;
  4194. }
  4195. out:
  4196. OUTONB_STD();
  4197. return;
  4198. out_reject:
  4199. OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
  4200. return;
  4201. out_clrack:
  4202. OUTL_DSP(np, SCRIPTA_BA(np, clrack));
  4203. return;
  4204. out_stuck:
  4205. return;
  4206. }
  4207. /*
  4208. * Acquire a control block
  4209. */
  4210. struct sym_ccb *sym_get_ccb (struct sym_hcb *np, struct scsi_cmnd *cmd, u_char tag_order)
  4211. {
  4212. u_char tn = cmd->device->id;
  4213. u_char ln = cmd->device->lun;
  4214. struct sym_tcb *tp = &np->target[tn];
  4215. struct sym_lcb *lp = sym_lp(tp, ln);
  4216. u_short tag = NO_TAG;
  4217. SYM_QUEHEAD *qp;
  4218. struct sym_ccb *cp = NULL;
  4219. /*
  4220. * Look for a free CCB
  4221. */
  4222. if (sym_que_empty(&np->free_ccbq))
  4223. sym_alloc_ccb(np);
  4224. qp = sym_remque_head(&np->free_ccbq);
  4225. if (!qp)
  4226. goto out;
  4227. cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  4228. {
  4229. /*
  4230. * If we have been asked for a tagged command.
  4231. */
  4232. if (tag_order) {
  4233. /*
  4234. * Debugging purpose.
  4235. */
  4236. #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4237. if (lp->busy_itl != 0)
  4238. goto out_free;
  4239. #endif
  4240. /*
  4241. * Allocate resources for tags if not yet.
  4242. */
  4243. if (!lp->cb_tags) {
  4244. sym_alloc_lcb_tags(np, tn, ln);
  4245. if (!lp->cb_tags)
  4246. goto out_free;
  4247. }
  4248. /*
  4249. * Get a tag for this SCSI IO and set up
  4250. * the CCB bus address for reselection,
  4251. * and count it for this LUN.
  4252. * Toggle reselect path to tagged.
  4253. */
  4254. if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
  4255. tag = lp->cb_tags[lp->ia_tag];
  4256. if (++lp->ia_tag == SYM_CONF_MAX_TASK)
  4257. lp->ia_tag = 0;
  4258. ++lp->busy_itlq;
  4259. #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4260. lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
  4261. lp->head.resel_sa =
  4262. cpu_to_scr(SCRIPTA_BA(np, resel_tag));
  4263. #endif
  4264. #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
  4265. cp->tags_si = lp->tags_si;
  4266. ++lp->tags_sum[cp->tags_si];
  4267. ++lp->tags_since;
  4268. #endif
  4269. }
  4270. else
  4271. goto out_free;
  4272. }
  4273. /*
  4274. * This command will not be tagged.
  4275. * If we already have either a tagged or untagged
  4276. * one, refuse to overlap this untagged one.
  4277. */
  4278. else {
  4279. /*
  4280. * Debugging purpose.
  4281. */
  4282. #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4283. if (lp->busy_itl != 0 || lp->busy_itlq != 0)
  4284. goto out_free;
  4285. #endif
  4286. /*
  4287. * Count this nexus for this LUN.
  4288. * Set up the CCB bus address for reselection.
  4289. * Toggle reselect path to untagged.
  4290. */
  4291. ++lp->busy_itl;
  4292. #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4293. if (lp->busy_itl == 1) {
  4294. lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
  4295. lp->head.resel_sa =
  4296. cpu_to_scr(SCRIPTA_BA(np, resel_no_tag));
  4297. }
  4298. else
  4299. goto out_free;
  4300. #endif
  4301. }
  4302. }
  4303. /*
  4304. * Put the CCB into the busy queue.
  4305. */
  4306. sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
  4307. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4308. if (lp) {
  4309. sym_remque(&cp->link2_ccbq);
  4310. sym_insque_tail(&cp->link2_ccbq, &lp->waiting_ccbq);
  4311. }
  4312. #endif
  4313. cp->to_abort = 0;
  4314. cp->odd_byte_adjustment = 0;
  4315. cp->tag = tag;
  4316. cp->order = tag_order;
  4317. cp->target = tn;
  4318. cp->lun = ln;
  4319. if (DEBUG_FLAGS & DEBUG_TAGS) {
  4320. sym_print_addr(cmd, "ccb @%p using tag %d.\n", cp, tag);
  4321. }
  4322. out:
  4323. return cp;
  4324. out_free:
  4325. sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
  4326. return NULL;
  4327. }
  4328. /*
  4329. * Release one control block
  4330. */
  4331. void sym_free_ccb (struct sym_hcb *np, struct sym_ccb *cp)
  4332. {
  4333. struct sym_tcb *tp = &np->target[cp->target];
  4334. struct sym_lcb *lp = sym_lp(tp, cp->lun);
  4335. if (DEBUG_FLAGS & DEBUG_TAGS) {
  4336. sym_print_addr(cp->cmd, "ccb @%p freeing tag %d.\n",
  4337. cp, cp->tag);
  4338. }
  4339. /*
  4340. * If LCB available,
  4341. */
  4342. if (lp) {
  4343. /*
  4344. * If tagged, release the tag, set the relect path
  4345. */
  4346. if (cp->tag != NO_TAG) {
  4347. #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
  4348. --lp->tags_sum[cp->tags_si];
  4349. #endif
  4350. /*
  4351. * Free the tag value.
  4352. */
  4353. lp->cb_tags[lp->if_tag] = cp->tag;
  4354. if (++lp->if_tag == SYM_CONF_MAX_TASK)
  4355. lp->if_tag = 0;
  4356. /*
  4357. * Make the reselect path invalid,
  4358. * and uncount this CCB.
  4359. */
  4360. lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
  4361. --lp->busy_itlq;
  4362. } else { /* Untagged */
  4363. /*
  4364. * Make the reselect path invalid,
  4365. * and uncount this CCB.
  4366. */
  4367. lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
  4368. --lp->busy_itl;
  4369. }
  4370. /*
  4371. * If no JOB active, make the LUN reselect path invalid.
  4372. */
  4373. if (lp->busy_itlq == 0 && lp->busy_itl == 0)
  4374. lp->head.resel_sa =
  4375. cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
  4376. }
  4377. /*
  4378. * We donnot queue more than 1 ccb per target
  4379. * with negotiation at any time. If this ccb was
  4380. * used for negotiation, clear this info in the tcb.
  4381. */
  4382. if (cp == tp->nego_cp)
  4383. tp->nego_cp = NULL;
  4384. #ifdef SYM_CONF_IARB_SUPPORT
  4385. /*
  4386. * If we just complete the last queued CCB,
  4387. * clear this info that is no longer relevant.
  4388. */
  4389. if (cp == np->last_cp)
  4390. np->last_cp = 0;
  4391. #endif
  4392. /*
  4393. * Make this CCB available.
  4394. */
  4395. cp->cmd = NULL;
  4396. cp->host_status = HS_IDLE;
  4397. sym_remque(&cp->link_ccbq);
  4398. sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
  4399. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4400. if (lp) {
  4401. sym_remque(&cp->link2_ccbq);
  4402. sym_insque_tail(&cp->link2_ccbq, &np->dummy_ccbq);
  4403. if (cp->started) {
  4404. if (cp->tag != NO_TAG)
  4405. --lp->started_tags;
  4406. else
  4407. --lp->started_no_tag;
  4408. }
  4409. }
  4410. cp->started = 0;
  4411. #endif
  4412. }
  4413. /*
  4414. * Allocate a CCB from memory and initialize its fixed part.
  4415. */
  4416. static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np)
  4417. {
  4418. struct sym_ccb *cp = NULL;
  4419. int hcode;
  4420. /*
  4421. * Prevent from allocating more CCBs than we can
  4422. * queue to the controller.
  4423. */
  4424. if (np->actccbs >= SYM_CONF_MAX_START)
  4425. return NULL;
  4426. /*
  4427. * Allocate memory for this CCB.
  4428. */
  4429. cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
  4430. if (!cp)
  4431. goto out_free;
  4432. /*
  4433. * Count it.
  4434. */
  4435. np->actccbs++;
  4436. /*
  4437. * Compute the bus address of this ccb.
  4438. */
  4439. cp->ccb_ba = vtobus(cp);
  4440. /*
  4441. * Insert this ccb into the hashed list.
  4442. */
  4443. hcode = CCB_HASH_CODE(cp->ccb_ba);
  4444. cp->link_ccbh = np->ccbh[hcode];
  4445. np->ccbh[hcode] = cp;
  4446. /*
  4447. * Initialyze the start and restart actions.
  4448. */
  4449. cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, idle));
  4450. cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
  4451. /*
  4452. * Initilialyze some other fields.
  4453. */
  4454. cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
  4455. /*
  4456. * Chain into free ccb queue.
  4457. */
  4458. sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
  4459. /*
  4460. * Chain into optionnal lists.
  4461. */
  4462. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4463. sym_insque_head(&cp->link2_ccbq, &np->dummy_ccbq);
  4464. #endif
  4465. return cp;
  4466. out_free:
  4467. if (cp)
  4468. sym_mfree_dma(cp, sizeof(*cp), "CCB");
  4469. return NULL;
  4470. }
  4471. /*
  4472. * Look up a CCB from a DSA value.
  4473. */
  4474. static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa)
  4475. {
  4476. int hcode;
  4477. struct sym_ccb *cp;
  4478. hcode = CCB_HASH_CODE(dsa);
  4479. cp = np->ccbh[hcode];
  4480. while (cp) {
  4481. if (cp->ccb_ba == dsa)
  4482. break;
  4483. cp = cp->link_ccbh;
  4484. }
  4485. return cp;
  4486. }
  4487. /*
  4488. * Target control block initialisation.
  4489. * Nothing important to do at the moment.
  4490. */
  4491. static void sym_init_tcb (struct sym_hcb *np, u_char tn)
  4492. {
  4493. #if 0 /* Hmmm... this checking looks paranoid. */
  4494. /*
  4495. * Check some alignments required by the chip.
  4496. */
  4497. assert (((offsetof(struct sym_reg, nc_sxfer) ^
  4498. offsetof(struct sym_tcb, head.sval)) &3) == 0);
  4499. assert (((offsetof(struct sym_reg, nc_scntl3) ^
  4500. offsetof(struct sym_tcb, head.wval)) &3) == 0);
  4501. #endif
  4502. }
  4503. /*
  4504. * Lun control block allocation and initialization.
  4505. */
  4506. struct sym_lcb *sym_alloc_lcb (struct sym_hcb *np, u_char tn, u_char ln)
  4507. {
  4508. struct sym_tcb *tp = &np->target[tn];
  4509. struct sym_lcb *lp = NULL;
  4510. /*
  4511. * Initialize the target control block if not yet.
  4512. */
  4513. sym_init_tcb (np, tn);
  4514. /*
  4515. * Allocate the LCB bus address array.
  4516. * Compute the bus address of this table.
  4517. */
  4518. if (ln && !tp->luntbl) {
  4519. tp->luntbl = sym_calloc_dma(256, "LUNTBL");
  4520. if (!tp->luntbl)
  4521. goto fail;
  4522. memset32(tp->luntbl, cpu_to_scr(vtobus(&np->badlun_sa)), 64);
  4523. tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
  4524. }
  4525. /*
  4526. * Allocate the table of pointers for LUN(s) > 0, if needed.
  4527. */
  4528. if (ln && !tp->lunmp) {
  4529. tp->lunmp = kcalloc(SYM_CONF_MAX_LUN, sizeof(struct sym_lcb *),
  4530. GFP_ATOMIC);
  4531. if (!tp->lunmp)
  4532. goto fail;
  4533. }
  4534. /*
  4535. * Allocate the lcb.
  4536. * Make it available to the chip.
  4537. */
  4538. lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
  4539. if (!lp)
  4540. goto fail;
  4541. if (ln) {
  4542. tp->lunmp[ln] = lp;
  4543. tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
  4544. }
  4545. else {
  4546. tp->lun0p = lp;
  4547. tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
  4548. }
  4549. tp->nlcb++;
  4550. /*
  4551. * Let the itl task point to error handling.
  4552. */
  4553. lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
  4554. /*
  4555. * Set the reselect pattern to our default. :)
  4556. */
  4557. lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
  4558. /*
  4559. * Set user capabilities.
  4560. */
  4561. lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
  4562. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4563. /*
  4564. * Initialize device queueing.
  4565. */
  4566. sym_que_init(&lp->waiting_ccbq);
  4567. sym_que_init(&lp->started_ccbq);
  4568. lp->started_max = SYM_CONF_MAX_TASK;
  4569. lp->started_limit = SYM_CONF_MAX_TASK;
  4570. #endif
  4571. fail:
  4572. return lp;
  4573. }
  4574. /*
  4575. * Allocate LCB resources for tagged command queuing.
  4576. */
  4577. static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln)
  4578. {
  4579. struct sym_tcb *tp = &np->target[tn];
  4580. struct sym_lcb *lp = sym_lp(tp, ln);
  4581. int i;
  4582. /*
  4583. * Allocate the task table and and the tag allocation
  4584. * circular buffer. We want both or none.
  4585. */
  4586. lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
  4587. if (!lp->itlq_tbl)
  4588. goto fail;
  4589. lp->cb_tags = kcalloc(SYM_CONF_MAX_TASK, 1, GFP_ATOMIC);
  4590. if (!lp->cb_tags) {
  4591. sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
  4592. lp->itlq_tbl = NULL;
  4593. goto fail;
  4594. }
  4595. /*
  4596. * Initialize the task table with invalid entries.
  4597. */
  4598. memset32(lp->itlq_tbl, cpu_to_scr(np->notask_ba), SYM_CONF_MAX_TASK);
  4599. /*
  4600. * Fill up the tag buffer with tag numbers.
  4601. */
  4602. for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
  4603. lp->cb_tags[i] = i;
  4604. /*
  4605. * Make the task table available to SCRIPTS,
  4606. * And accept tagged commands now.
  4607. */
  4608. lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
  4609. return;
  4610. fail:
  4611. return;
  4612. }
  4613. /*
  4614. * Lun control block deallocation. Returns the number of valid remaining LCBs
  4615. * for the target.
  4616. */
  4617. int sym_free_lcb(struct sym_hcb *np, u_char tn, u_char ln)
  4618. {
  4619. struct sym_tcb *tp = &np->target[tn];
  4620. struct sym_lcb *lp = sym_lp(tp, ln);
  4621. tp->nlcb--;
  4622. if (ln) {
  4623. if (!tp->nlcb) {
  4624. kfree(tp->lunmp);
  4625. sym_mfree_dma(tp->luntbl, 256, "LUNTBL");
  4626. tp->lunmp = NULL;
  4627. tp->luntbl = NULL;
  4628. tp->head.luntbl_sa = cpu_to_scr(vtobus(np->badluntbl));
  4629. } else {
  4630. tp->luntbl[ln] = cpu_to_scr(vtobus(&np->badlun_sa));
  4631. tp->lunmp[ln] = NULL;
  4632. }
  4633. } else {
  4634. tp->lun0p = NULL;
  4635. tp->head.lun0_sa = cpu_to_scr(vtobus(&np->badlun_sa));
  4636. }
  4637. if (lp->itlq_tbl) {
  4638. sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
  4639. kfree(lp->cb_tags);
  4640. }
  4641. sym_mfree_dma(lp, sizeof(*lp), "LCB");
  4642. return tp->nlcb;
  4643. }
  4644. /*
  4645. * Queue a SCSI IO to the controller.
  4646. */
  4647. int sym_queue_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, struct sym_ccb *cp)
  4648. {
  4649. struct scsi_device *sdev = cmd->device;
  4650. struct sym_tcb *tp;
  4651. struct sym_lcb *lp;
  4652. u_char *msgptr;
  4653. u_int msglen;
  4654. int can_disconnect;
  4655. /*
  4656. * Keep track of the IO in our CCB.
  4657. */
  4658. cp->cmd = cmd;
  4659. /*
  4660. * Retrieve the target descriptor.
  4661. */
  4662. tp = &np->target[cp->target];
  4663. /*
  4664. * Retrieve the lun descriptor.
  4665. */
  4666. lp = sym_lp(tp, sdev->lun);
  4667. can_disconnect = (cp->tag != NO_TAG) ||
  4668. (lp && (lp->curr_flags & SYM_DISC_ENABLED));
  4669. msgptr = cp->scsi_smsg;
  4670. msglen = 0;
  4671. msgptr[msglen++] = IDENTIFY(can_disconnect, sdev->lun);
  4672. /*
  4673. * Build the tag message if present.
  4674. */
  4675. if (cp->tag != NO_TAG) {
  4676. u_char order = cp->order;
  4677. switch(order) {
  4678. case M_ORDERED_TAG:
  4679. break;
  4680. case M_HEAD_TAG:
  4681. break;
  4682. default:
  4683. order = M_SIMPLE_TAG;
  4684. }
  4685. #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
  4686. /*
  4687. * Avoid too much reordering of SCSI commands.
  4688. * The algorithm tries to prevent completion of any
  4689. * tagged command from being delayed against more
  4690. * than 3 times the max number of queued commands.
  4691. */
  4692. if (lp && lp->tags_since > 3*SYM_CONF_MAX_TAG) {
  4693. lp->tags_si = !(lp->tags_si);
  4694. if (lp->tags_sum[lp->tags_si]) {
  4695. order = M_ORDERED_TAG;
  4696. if ((DEBUG_FLAGS & DEBUG_TAGS)||sym_verbose>1) {
  4697. sym_print_addr(cmd,
  4698. "ordered tag forced.\n");
  4699. }
  4700. }
  4701. lp->tags_since = 0;
  4702. }
  4703. #endif
  4704. msgptr[msglen++] = order;
  4705. /*
  4706. * For less than 128 tags, actual tags are numbered
  4707. * 1,3,5,..2*MAXTAGS+1,since we may have to deal
  4708. * with devices that have problems with #TAG 0 or too
  4709. * great #TAG numbers. For more tags (up to 256),
  4710. * we use directly our tag number.
  4711. */
  4712. #if SYM_CONF_MAX_TASK > (512/4)
  4713. msgptr[msglen++] = cp->tag;
  4714. #else
  4715. msgptr[msglen++] = (cp->tag << 1) + 1;
  4716. #endif
  4717. }
  4718. /*
  4719. * Build a negotiation message if needed.
  4720. * (nego_status is filled by sym_prepare_nego())
  4721. *
  4722. * Always negotiate on INQUIRY and REQUEST SENSE.
  4723. *
  4724. */
  4725. cp->nego_status = 0;
  4726. if ((tp->tgoal.check_nego ||
  4727. cmd->cmnd[0] == INQUIRY || cmd->cmnd[0] == REQUEST_SENSE) &&
  4728. !tp->nego_cp && lp) {
  4729. msglen += sym_prepare_nego(np, cp, msgptr + msglen);
  4730. }
  4731. /*
  4732. * Startqueue
  4733. */
  4734. cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select));
  4735. cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA(np, resel_dsa));
  4736. /*
  4737. * select
  4738. */
  4739. cp->phys.select.sel_id = cp->target;
  4740. cp->phys.select.sel_scntl3 = tp->head.wval;
  4741. cp->phys.select.sel_sxfer = tp->head.sval;
  4742. cp->phys.select.sel_scntl4 = tp->head.uval;
  4743. /*
  4744. * message
  4745. */
  4746. cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg);
  4747. cp->phys.smsg.size = cpu_to_scr(msglen);
  4748. /*
  4749. * status
  4750. */
  4751. cp->host_xflags = 0;
  4752. cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
  4753. cp->ssss_status = S_ILLEGAL;
  4754. cp->xerr_status = 0;
  4755. cp->host_flags = 0;
  4756. cp->extra_bytes = 0;
  4757. /*
  4758. * extreme data pointer.
  4759. * shall be positive, so -1 is lower than lowest.:)
  4760. */
  4761. cp->ext_sg = -1;
  4762. cp->ext_ofs = 0;
  4763. /*
  4764. * Build the CDB and DATA descriptor block
  4765. * and start the IO.
  4766. */
  4767. return sym_setup_data_and_start(np, cmd, cp);
  4768. }
  4769. /*
  4770. * Reset a SCSI target (all LUNs of this target).
  4771. */
  4772. int sym_reset_scsi_target(struct sym_hcb *np, int target)
  4773. {
  4774. struct sym_tcb *tp;
  4775. if (target == np->myaddr || (u_int)target >= SYM_CONF_MAX_TARGET)
  4776. return -1;
  4777. tp = &np->target[target];
  4778. tp->to_reset = 1;
  4779. np->istat_sem = SEM;
  4780. OUTB(np, nc_istat, SIGP|SEM);
  4781. return 0;
  4782. }
  4783. /*
  4784. * Abort a SCSI IO.
  4785. */
  4786. static int sym_abort_ccb(struct sym_hcb *np, struct sym_ccb *cp, int timed_out)
  4787. {
  4788. /*
  4789. * Check that the IO is active.
  4790. */
  4791. if (!cp || !cp->host_status || cp->host_status == HS_WAIT)
  4792. return -1;
  4793. /*
  4794. * If a previous abort didn't succeed in time,
  4795. * perform a BUS reset.
  4796. */
  4797. if (cp->to_abort) {
  4798. sym_reset_scsi_bus(np, 1);
  4799. return 0;
  4800. }
  4801. /*
  4802. * Mark the CCB for abort and allow time for.
  4803. */
  4804. cp->to_abort = timed_out ? 2 : 1;
  4805. /*
  4806. * Tell the SCRIPTS processor to stop and synchronize with us.
  4807. */
  4808. np->istat_sem = SEM;
  4809. OUTB(np, nc_istat, SIGP|SEM);
  4810. return 0;
  4811. }
  4812. int sym_abort_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, int timed_out)
  4813. {
  4814. struct sym_ccb *cp;
  4815. SYM_QUEHEAD *qp;
  4816. /*
  4817. * Look up our CCB control block.
  4818. */
  4819. cp = NULL;
  4820. FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
  4821. struct sym_ccb *cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  4822. if (cp2->cmd == cmd) {
  4823. cp = cp2;
  4824. break;
  4825. }
  4826. }
  4827. return sym_abort_ccb(np, cp, timed_out);
  4828. }
  4829. /*
  4830. * Complete execution of a SCSI command with extended
  4831. * error, SCSI status error, or having been auto-sensed.
  4832. *
  4833. * The SCRIPTS processor is not running there, so we
  4834. * can safely access IO registers and remove JOBs from
  4835. * the START queue.
  4836. * SCRATCHA is assumed to have been loaded with STARTPOS
  4837. * before the SCRIPTS called the C code.
  4838. */
  4839. void sym_complete_error(struct sym_hcb *np, struct sym_ccb *cp)
  4840. {
  4841. struct scsi_device *sdev;
  4842. struct scsi_cmnd *cmd;
  4843. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4844. struct sym_tcb *tp;
  4845. struct sym_lcb *lp;
  4846. #endif
  4847. int resid;
  4848. int i;
  4849. /*
  4850. * Paranoid check. :)
  4851. */
  4852. if (!cp || !cp->cmd)
  4853. return;
  4854. cmd = cp->cmd;
  4855. sdev = cmd->device;
  4856. if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
  4857. dev_info(&sdev->sdev_gendev, "CCB=%p STAT=%x/%x/%x\n", cp,
  4858. cp->host_status, cp->ssss_status, cp->host_flags);
  4859. }
  4860. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4861. /*
  4862. * Get target and lun pointers.
  4863. */
  4864. tp = &np->target[cp->target];
  4865. lp = sym_lp(tp, sdev->lun);
  4866. #endif
  4867. /*
  4868. * Check for extended errors.
  4869. */
  4870. if (cp->xerr_status) {
  4871. if (sym_verbose)
  4872. sym_print_xerr(cmd, cp->xerr_status);
  4873. if (cp->host_status == HS_COMPLETE)
  4874. cp->host_status = HS_COMP_ERR;
  4875. }
  4876. /*
  4877. * Calculate the residual.
  4878. */
  4879. resid = sym_compute_residual(np, cp);
  4880. if (!SYM_SETUP_RESIDUAL_SUPPORT) {/* If user does not want residuals */
  4881. resid = 0; /* throw them away. :) */
  4882. cp->sv_resid = 0;
  4883. }
  4884. #ifdef DEBUG_2_0_X
  4885. if (resid)
  4886. printf("XXXX RESID= %d - 0x%x\n", resid, resid);
  4887. #endif
  4888. /*
  4889. * Dequeue all queued CCBs for that device
  4890. * not yet started by SCRIPTS.
  4891. */
  4892. i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
  4893. i = sym_dequeue_from_squeue(np, i, cp->target, sdev->lun, -1);
  4894. /*
  4895. * Restart the SCRIPTS processor.
  4896. */
  4897. OUTL_DSP(np, SCRIPTA_BA(np, start));
  4898. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4899. if (cp->host_status == HS_COMPLETE &&
  4900. cp->ssss_status == S_QUEUE_FULL) {
  4901. if (!lp || lp->started_tags - i < 2)
  4902. goto weirdness;
  4903. /*
  4904. * Decrease queue depth as needed.
  4905. */
  4906. lp->started_max = lp->started_tags - i - 1;
  4907. lp->num_sgood = 0;
  4908. if (sym_verbose >= 2) {
  4909. sym_print_addr(cmd, " queue depth is now %d\n",
  4910. lp->started_max);
  4911. }
  4912. /*
  4913. * Repair the CCB.
  4914. */
  4915. cp->host_status = HS_BUSY;
  4916. cp->ssss_status = S_ILLEGAL;
  4917. /*
  4918. * Let's requeue it to device.
  4919. */
  4920. sym_set_cam_status(cmd, DID_SOFT_ERROR);
  4921. goto finish;
  4922. }
  4923. weirdness:
  4924. #endif
  4925. /*
  4926. * Build result in CAM ccb.
  4927. */
  4928. sym_set_cam_result_error(np, cp, resid);
  4929. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4930. finish:
  4931. #endif
  4932. /*
  4933. * Add this one to the COMP queue.
  4934. */
  4935. sym_remque(&cp->link_ccbq);
  4936. sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
  4937. /*
  4938. * Complete all those commands with either error
  4939. * or requeue condition.
  4940. */
  4941. sym_flush_comp_queue(np, 0);
  4942. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4943. /*
  4944. * Donnot start more than 1 command after an error.
  4945. */
  4946. sym_start_next_ccbs(np, lp, 1);
  4947. #endif
  4948. }
  4949. /*
  4950. * Complete execution of a successful SCSI command.
  4951. *
  4952. * Only successful commands go to the DONE queue,
  4953. * since we need to have the SCRIPTS processor
  4954. * stopped on any error condition.
  4955. * The SCRIPTS processor is running while we are
  4956. * completing successful commands.
  4957. */
  4958. void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp)
  4959. {
  4960. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4961. struct sym_tcb *tp;
  4962. struct sym_lcb *lp;
  4963. #endif
  4964. struct scsi_cmnd *cmd;
  4965. int resid;
  4966. /*
  4967. * Paranoid check. :)
  4968. */
  4969. if (!cp || !cp->cmd)
  4970. return;
  4971. assert (cp->host_status == HS_COMPLETE);
  4972. /*
  4973. * Get user command.
  4974. */
  4975. cmd = cp->cmd;
  4976. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4977. /*
  4978. * Get target and lun pointers.
  4979. */
  4980. tp = &np->target[cp->target];
  4981. lp = sym_lp(tp, cp->lun);
  4982. #endif
  4983. /*
  4984. * If all data have been transferred, given than no
  4985. * extended error did occur, there is no residual.
  4986. */
  4987. resid = 0;
  4988. if (cp->phys.head.lastp != cp->goalp)
  4989. resid = sym_compute_residual(np, cp);
  4990. /*
  4991. * Wrong transfer residuals may be worse than just always
  4992. * returning zero. User can disable this feature in
  4993. * sym53c8xx.h. Residual support is enabled by default.
  4994. */
  4995. if (!SYM_SETUP_RESIDUAL_SUPPORT)
  4996. resid = 0;
  4997. #ifdef DEBUG_2_0_X
  4998. if (resid)
  4999. printf("XXXX RESID= %d - 0x%x\n", resid, resid);
  5000. #endif
  5001. /*
  5002. * Build result in CAM ccb.
  5003. */
  5004. sym_set_cam_result_ok(cp, cmd, resid);
  5005. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  5006. /*
  5007. * If max number of started ccbs had been reduced,
  5008. * increase it if 200 good status received.
  5009. */
  5010. if (lp && lp->started_max < lp->started_limit) {
  5011. ++lp->num_sgood;
  5012. if (lp->num_sgood >= 200) {
  5013. lp->num_sgood = 0;
  5014. ++lp->started_max;
  5015. if (sym_verbose >= 2) {
  5016. sym_print_addr(cmd, " queue depth is now %d\n",
  5017. lp->started_max);
  5018. }
  5019. }
  5020. }
  5021. #endif
  5022. /*
  5023. * Free our CCB.
  5024. */
  5025. sym_free_ccb (np, cp);
  5026. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  5027. /*
  5028. * Requeue a couple of awaiting scsi commands.
  5029. */
  5030. if (!sym_que_empty(&lp->waiting_ccbq))
  5031. sym_start_next_ccbs(np, lp, 2);
  5032. #endif
  5033. /*
  5034. * Complete the command.
  5035. */
  5036. sym_xpt_done(np, cmd);
  5037. }
  5038. /*
  5039. * Soft-attach the controller.
  5040. */
  5041. int sym_hcb_attach(struct Scsi_Host *shost, struct sym_fw *fw, struct sym_nvram *nvram)
  5042. {
  5043. struct sym_hcb *np = sym_get_hcb(shost);
  5044. int i;
  5045. /*
  5046. * Get some info about the firmware.
  5047. */
  5048. np->scripta_sz = fw->a_size;
  5049. np->scriptb_sz = fw->b_size;
  5050. np->scriptz_sz = fw->z_size;
  5051. np->fw_setup = fw->setup;
  5052. np->fw_patch = fw->patch;
  5053. np->fw_name = fw->name;
  5054. /*
  5055. * Save setting of some IO registers, so we will
  5056. * be able to probe specific implementations.
  5057. */
  5058. sym_save_initial_setting (np);
  5059. /*
  5060. * Reset the chip now, since it has been reported
  5061. * that SCSI clock calibration may not work properly
  5062. * if the chip is currently active.
  5063. */
  5064. sym_chip_reset(np);
  5065. /*
  5066. * Prepare controller and devices settings, according
  5067. * to chip features, user set-up and driver set-up.
  5068. */
  5069. sym_prepare_setting(shost, np, nvram);
  5070. /*
  5071. * Check the PCI clock frequency.
  5072. * Must be performed after prepare_setting since it destroys
  5073. * STEST1 that is used to probe for the clock doubler.
  5074. */
  5075. i = sym_getpciclock(np);
  5076. if (i > 37000 && !(np->features & FE_66MHZ))
  5077. printf("%s: PCI BUS clock seems too high: %u KHz.\n",
  5078. sym_name(np), i);
  5079. /*
  5080. * Allocate the start queue.
  5081. */
  5082. np->squeue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
  5083. if (!np->squeue)
  5084. goto attach_failed;
  5085. np->squeue_ba = vtobus(np->squeue);
  5086. /*
  5087. * Allocate the done queue.
  5088. */
  5089. np->dqueue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
  5090. if (!np->dqueue)
  5091. goto attach_failed;
  5092. np->dqueue_ba = vtobus(np->dqueue);
  5093. /*
  5094. * Allocate the target bus address array.
  5095. */
  5096. np->targtbl = sym_calloc_dma(256, "TARGTBL");
  5097. if (!np->targtbl)
  5098. goto attach_failed;
  5099. np->targtbl_ba = vtobus(np->targtbl);
  5100. /*
  5101. * Allocate SCRIPTS areas.
  5102. */
  5103. np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
  5104. np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
  5105. np->scriptz0 = sym_calloc_dma(np->scriptz_sz, "SCRIPTZ0");
  5106. if (!np->scripta0 || !np->scriptb0 || !np->scriptz0)
  5107. goto attach_failed;
  5108. /*
  5109. * Allocate the array of lists of CCBs hashed by DSA.
  5110. */
  5111. np->ccbh = kcalloc(CCB_HASH_SIZE, sizeof(*np->ccbh), GFP_KERNEL);
  5112. if (!np->ccbh)
  5113. goto attach_failed;
  5114. /*
  5115. * Initialyze the CCB free and busy queues.
  5116. */
  5117. sym_que_init(&np->free_ccbq);
  5118. sym_que_init(&np->busy_ccbq);
  5119. sym_que_init(&np->comp_ccbq);
  5120. /*
  5121. * Initialization for optional handling
  5122. * of device queueing.
  5123. */
  5124. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  5125. sym_que_init(&np->dummy_ccbq);
  5126. #endif
  5127. /*
  5128. * Allocate some CCB. We need at least ONE.
  5129. */
  5130. if (!sym_alloc_ccb(np))
  5131. goto attach_failed;
  5132. /*
  5133. * Calculate BUS addresses where we are going
  5134. * to load the SCRIPTS.
  5135. */
  5136. np->scripta_ba = vtobus(np->scripta0);
  5137. np->scriptb_ba = vtobus(np->scriptb0);
  5138. np->scriptz_ba = vtobus(np->scriptz0);
  5139. if (np->ram_ba) {
  5140. np->scripta_ba = np->ram_ba;
  5141. if (np->features & FE_RAM8K) {
  5142. np->scriptb_ba = np->scripta_ba + 4096;
  5143. #if 0 /* May get useful for 64 BIT PCI addressing */
  5144. np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
  5145. #endif
  5146. }
  5147. }
  5148. /*
  5149. * Copy scripts to controller instance.
  5150. */
  5151. memcpy(np->scripta0, fw->a_base, np->scripta_sz);
  5152. memcpy(np->scriptb0, fw->b_base, np->scriptb_sz);
  5153. memcpy(np->scriptz0, fw->z_base, np->scriptz_sz);
  5154. /*
  5155. * Setup variable parts in scripts and compute
  5156. * scripts bus addresses used from the C code.
  5157. */
  5158. np->fw_setup(np, fw);
  5159. /*
  5160. * Bind SCRIPTS with physical addresses usable by the
  5161. * SCRIPTS processor (as seen from the BUS = BUS addresses).
  5162. */
  5163. sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
  5164. sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
  5165. sym_fw_bind_script(np, (u32 *) np->scriptz0, np->scriptz_sz);
  5166. #ifdef SYM_CONF_IARB_SUPPORT
  5167. /*
  5168. * If user wants IARB to be set when we win arbitration
  5169. * and have other jobs, compute the max number of consecutive
  5170. * settings of IARB hints before we leave devices a chance to
  5171. * arbitrate for reselection.
  5172. */
  5173. #ifdef SYM_SETUP_IARB_MAX
  5174. np->iarb_max = SYM_SETUP_IARB_MAX;
  5175. #else
  5176. np->iarb_max = 4;
  5177. #endif
  5178. #endif
  5179. /*
  5180. * Prepare the idle and invalid task actions.
  5181. */
  5182. np->idletask.start = cpu_to_scr(SCRIPTA_BA(np, idle));
  5183. np->idletask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
  5184. np->idletask_ba = vtobus(&np->idletask);
  5185. np->notask.start = cpu_to_scr(SCRIPTA_BA(np, idle));
  5186. np->notask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
  5187. np->notask_ba = vtobus(&np->notask);
  5188. np->bad_itl.start = cpu_to_scr(SCRIPTA_BA(np, idle));
  5189. np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
  5190. np->bad_itl_ba = vtobus(&np->bad_itl);
  5191. np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA(np, idle));
  5192. np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA(np,bad_i_t_l_q));
  5193. np->bad_itlq_ba = vtobus(&np->bad_itlq);
  5194. /*
  5195. * Allocate and prepare the lun JUMP table that is used
  5196. * for a target prior the probing of devices (bad lun table).
  5197. * A private table will be allocated for the target on the
  5198. * first INQUIRY response received.
  5199. */
  5200. np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
  5201. if (!np->badluntbl)
  5202. goto attach_failed;
  5203. np->badlun_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
  5204. memset32(np->badluntbl, cpu_to_scr(vtobus(&np->badlun_sa)), 64);
  5205. /*
  5206. * Prepare the bus address array that contains the bus
  5207. * address of each target control block.
  5208. * For now, assume all logical units are wrong. :)
  5209. */
  5210. for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
  5211. np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
  5212. np->target[i].head.luntbl_sa =
  5213. cpu_to_scr(vtobus(np->badluntbl));
  5214. np->target[i].head.lun0_sa =
  5215. cpu_to_scr(vtobus(&np->badlun_sa));
  5216. }
  5217. /*
  5218. * Now check the cache handling of the pci chipset.
  5219. */
  5220. if (sym_snooptest (np)) {
  5221. printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np));
  5222. goto attach_failed;
  5223. }
  5224. /*
  5225. * Sigh! we are done.
  5226. */
  5227. return 0;
  5228. attach_failed:
  5229. return -ENXIO;
  5230. }
  5231. /*
  5232. * Free everything that has been allocated for this device.
  5233. */
  5234. void sym_hcb_free(struct sym_hcb *np)
  5235. {
  5236. SYM_QUEHEAD *qp;
  5237. struct sym_ccb *cp;
  5238. struct sym_tcb *tp;
  5239. int target;
  5240. if (np->scriptz0)
  5241. sym_mfree_dma(np->scriptz0, np->scriptz_sz, "SCRIPTZ0");
  5242. if (np->scriptb0)
  5243. sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
  5244. if (np->scripta0)
  5245. sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
  5246. if (np->squeue)
  5247. sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
  5248. if (np->dqueue)
  5249. sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
  5250. if (np->actccbs) {
  5251. while ((qp = sym_remque_head(&np->free_ccbq)) != NULL) {
  5252. cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  5253. sym_mfree_dma(cp, sizeof(*cp), "CCB");
  5254. }
  5255. }
  5256. kfree(np->ccbh);
  5257. if (np->badluntbl)
  5258. sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
  5259. for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
  5260. tp = &np->target[target];
  5261. if (tp->luntbl)
  5262. sym_mfree_dma(tp->luntbl, 256, "LUNTBL");
  5263. #if SYM_CONF_MAX_LUN > 1
  5264. kfree(tp->lunmp);
  5265. #endif
  5266. }
  5267. if (np->targtbl)
  5268. sym_mfree_dma(np->targtbl, 256, "TARGTBL");
  5269. }