sym_fw1.h 44 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777
  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
  4. * of PCI-SCSI IO processors.
  5. *
  6. * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
  7. *
  8. * This driver is derived from the Linux sym53c8xx driver.
  9. * Copyright (C) 1998-2000 Gerard Roudier
  10. *
  11. * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
  12. * a port of the FreeBSD ncr driver to Linux-1.2.13.
  13. *
  14. * The original ncr driver has been written for 386bsd and FreeBSD by
  15. * Wolfgang Stanglmeier <wolf@cologne.de>
  16. * Stefan Esser <se@mi.Uni-Koeln.de>
  17. * Copyright (C) 1994 Wolfgang Stanglmeier
  18. *
  19. * Other major contributions:
  20. *
  21. * NVRAM detection and reading.
  22. * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
  23. *
  24. *-----------------------------------------------------------------------------
  25. */
  26. /*
  27. * Scripts for SYMBIOS-Processor
  28. *
  29. * We have to know the offsets of all labels before we reach
  30. * them (for forward jumps). Therefore we declare a struct
  31. * here. If you make changes inside the script,
  32. *
  33. * DONT FORGET TO CHANGE THE LENGTHS HERE!
  34. */
  35. /*
  36. * Script fragments which are loaded into the on-chip RAM
  37. * of 825A, 875, 876, 895, 895A, 896 and 1010 chips.
  38. * Must not exceed 4K bytes.
  39. */
  40. struct SYM_FWA_SCR {
  41. u32 start [ 11];
  42. u32 getjob_begin [ 4];
  43. u32 _sms_a10 [ 5];
  44. u32 getjob_end [ 4];
  45. u32 _sms_a20 [ 4];
  46. #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
  47. u32 select [ 8];
  48. #else
  49. u32 select [ 6];
  50. #endif
  51. u32 _sms_a30 [ 5];
  52. u32 wf_sel_done [ 2];
  53. u32 send_ident [ 2];
  54. #ifdef SYM_CONF_IARB_SUPPORT
  55. u32 select2 [ 8];
  56. #else
  57. u32 select2 [ 2];
  58. #endif
  59. u32 command [ 2];
  60. u32 dispatch [ 28];
  61. u32 sel_no_cmd [ 10];
  62. u32 init [ 6];
  63. u32 clrack [ 4];
  64. u32 datai_done [ 11];
  65. u32 datai_done_wsr [ 20];
  66. u32 datao_done [ 11];
  67. u32 datao_done_wss [ 6];
  68. u32 datai_phase [ 5];
  69. u32 datao_phase [ 5];
  70. u32 msg_in [ 2];
  71. u32 msg_in2 [ 10];
  72. #ifdef SYM_CONF_IARB_SUPPORT
  73. u32 status [ 14];
  74. #else
  75. u32 status [ 10];
  76. #endif
  77. u32 complete [ 6];
  78. u32 complete2 [ 8];
  79. u32 _sms_a40 [ 12];
  80. u32 done [ 5];
  81. u32 _sms_a50 [ 5];
  82. u32 _sms_a60 [ 2];
  83. u32 done_end [ 4];
  84. u32 complete_error [ 5];
  85. u32 save_dp [ 11];
  86. u32 restore_dp [ 7];
  87. u32 disconnect [ 11];
  88. u32 disconnect2 [ 5];
  89. u32 _sms_a65 [ 3];
  90. #ifdef SYM_CONF_IARB_SUPPORT
  91. u32 idle [ 4];
  92. #else
  93. u32 idle [ 2];
  94. #endif
  95. #ifdef SYM_CONF_IARB_SUPPORT
  96. u32 ungetjob [ 7];
  97. #else
  98. u32 ungetjob [ 5];
  99. #endif
  100. #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
  101. u32 reselect [ 4];
  102. #else
  103. u32 reselect [ 2];
  104. #endif
  105. u32 reselected [ 19];
  106. u32 _sms_a70 [ 6];
  107. u32 _sms_a80 [ 4];
  108. u32 reselected1 [ 25];
  109. u32 _sms_a90 [ 4];
  110. u32 resel_lun0 [ 7];
  111. u32 _sms_a100 [ 4];
  112. u32 resel_tag [ 8];
  113. #if SYM_CONF_MAX_TASK*4 > 512
  114. u32 _sms_a110 [ 23];
  115. #elif SYM_CONF_MAX_TASK*4 > 256
  116. u32 _sms_a110 [ 17];
  117. #else
  118. u32 _sms_a110 [ 13];
  119. #endif
  120. u32 _sms_a120 [ 2];
  121. u32 resel_go [ 4];
  122. u32 _sms_a130 [ 7];
  123. u32 resel_dsa [ 2];
  124. u32 resel_dsa1 [ 4];
  125. u32 _sms_a140 [ 7];
  126. u32 resel_no_tag [ 4];
  127. u32 _sms_a145 [ 7];
  128. u32 data_in [SYM_CONF_MAX_SG * 2];
  129. u32 data_in2 [ 4];
  130. u32 data_out [SYM_CONF_MAX_SG * 2];
  131. u32 data_out2 [ 4];
  132. u32 pm0_data [ 12];
  133. u32 pm0_data_out [ 6];
  134. u32 pm0_data_end [ 7];
  135. u32 pm_data_end [ 4];
  136. u32 _sms_a150 [ 4];
  137. u32 pm1_data [ 12];
  138. u32 pm1_data_out [ 6];
  139. u32 pm1_data_end [ 9];
  140. };
  141. /*
  142. * Script fragments which stay in main memory for all chips
  143. * except for chips that support 8K on-chip RAM.
  144. */
  145. struct SYM_FWB_SCR {
  146. u32 no_data [ 2];
  147. #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
  148. u32 sel_for_abort [ 18];
  149. #else
  150. u32 sel_for_abort [ 16];
  151. #endif
  152. u32 sel_for_abort_1 [ 2];
  153. u32 msg_in_etc [ 12];
  154. u32 msg_received [ 5];
  155. u32 msg_weird_seen [ 5];
  156. u32 msg_extended [ 17];
  157. u32 _sms_b10 [ 4];
  158. u32 msg_bad [ 6];
  159. u32 msg_weird [ 4];
  160. u32 msg_weird1 [ 8];
  161. u32 wdtr_resp [ 6];
  162. u32 send_wdtr [ 4];
  163. u32 sdtr_resp [ 6];
  164. u32 send_sdtr [ 4];
  165. u32 ppr_resp [ 6];
  166. u32 send_ppr [ 4];
  167. u32 nego_bad_phase [ 4];
  168. u32 msg_out [ 4];
  169. u32 msg_out_done [ 4];
  170. u32 data_ovrun [ 3];
  171. u32 data_ovrun1 [ 22];
  172. u32 data_ovrun2 [ 8];
  173. u32 abort_resel [ 16];
  174. u32 resend_ident [ 4];
  175. u32 ident_break [ 4];
  176. u32 ident_break_atn [ 4];
  177. u32 sdata_in [ 6];
  178. u32 resel_bad_lun [ 4];
  179. u32 bad_i_t_l [ 4];
  180. u32 bad_i_t_l_q [ 4];
  181. u32 bad_status [ 7];
  182. u32 wsr_ma_helper [ 4];
  183. /* Data area */
  184. u32 zero [ 1];
  185. u32 scratch [ 1];
  186. u32 scratch1 [ 1];
  187. u32 prev_done [ 1];
  188. u32 done_pos [ 1];
  189. u32 nextjob [ 1];
  190. u32 startpos [ 1];
  191. u32 targtbl [ 1];
  192. };
  193. /*
  194. * Script fragments used at initialisations.
  195. * Only runs out of main memory.
  196. */
  197. struct SYM_FWZ_SCR {
  198. u32 snooptest [ 9];
  199. u32 snoopend [ 2];
  200. };
  201. static struct SYM_FWA_SCR SYM_FWA_SCR = {
  202. /*--------------------------< START >----------------------------*/ {
  203. /*
  204. * Switch the LED on.
  205. * Will be patched with a NO_OP if LED
  206. * not needed or not desired.
  207. */
  208. SCR_REG_REG (gpreg, SCR_AND, 0xfe),
  209. 0,
  210. /*
  211. * Clear SIGP.
  212. */
  213. SCR_FROM_REG (ctest2),
  214. 0,
  215. /*
  216. * Stop here if the C code wants to perform
  217. * some error recovery procedure manually.
  218. * (Indicate this by setting SEM in ISTAT)
  219. */
  220. SCR_FROM_REG (istat),
  221. 0,
  222. /*
  223. * Report to the C code the next position in
  224. * the start queue the SCRIPTS will schedule.
  225. * The C code must not change SCRATCHA.
  226. */
  227. SCR_COPY (4),
  228. PADDR_B (startpos),
  229. RADDR_1 (scratcha),
  230. SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
  231. SIR_SCRIPT_STOPPED,
  232. /*
  233. * Start the next job.
  234. *
  235. * @DSA = start point for this job.
  236. * SCRATCHA = address of this job in the start queue.
  237. *
  238. * We will restore startpos with SCRATCHA if we fails the
  239. * arbitration or if it is the idle job.
  240. *
  241. * The below GETJOB_BEGIN to GETJOB_END section of SCRIPTS
  242. * is a critical path. If it is partially executed, it then
  243. * may happen that the job address is not yet in the DSA
  244. * and the next queue position points to the next JOB.
  245. */
  246. }/*-------------------------< GETJOB_BEGIN >---------------------*/,{
  247. /*
  248. * Copy to a fixed location both the next STARTPOS
  249. * and the current JOB address, using self modifying
  250. * SCRIPTS.
  251. */
  252. SCR_COPY (4),
  253. RADDR_1 (scratcha),
  254. PADDR_A (_sms_a10),
  255. SCR_COPY (8),
  256. }/*-------------------------< _SMS_A10 >-------------------------*/,{
  257. 0,
  258. PADDR_B (nextjob),
  259. /*
  260. * Move the start address to TEMP using self-
  261. * modifying SCRIPTS and jump indirectly to
  262. * that address.
  263. */
  264. SCR_COPY (4),
  265. PADDR_B (nextjob),
  266. RADDR_1 (dsa),
  267. }/*-------------------------< GETJOB_END >-----------------------*/,{
  268. SCR_COPY (4),
  269. RADDR_1 (dsa),
  270. PADDR_A (_sms_a20),
  271. SCR_COPY (4),
  272. }/*-------------------------< _SMS_A20 >-------------------------*/,{
  273. 0,
  274. RADDR_1 (temp),
  275. SCR_RETURN,
  276. 0,
  277. }/*-------------------------< SELECT >---------------------------*/,{
  278. /*
  279. * DSA contains the address of a scheduled
  280. * data structure.
  281. *
  282. * SCRATCHA contains the address of the start queue
  283. * entry which points to the next job.
  284. *
  285. * Set Initiator mode.
  286. *
  287. * (Target mode is left as an exercise for the reader)
  288. */
  289. #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
  290. SCR_CLR (SCR_TRG),
  291. 0,
  292. #endif
  293. /*
  294. * And try to select this target.
  295. */
  296. SCR_SEL_TBL_ATN ^ offsetof (struct sym_dsb, select),
  297. PADDR_A (ungetjob),
  298. /*
  299. * Now there are 4 possibilities:
  300. *
  301. * (1) The chip loses arbitration.
  302. * This is ok, because it will try again,
  303. * when the bus becomes idle.
  304. * (But beware of the timeout function!)
  305. *
  306. * (2) The chip is reselected.
  307. * Then the script processor takes the jump
  308. * to the RESELECT label.
  309. *
  310. * (3) The chip wins arbitration.
  311. * Then it will execute SCRIPTS instruction until
  312. * the next instruction that checks SCSI phase.
  313. * Then will stop and wait for selection to be
  314. * complete or selection time-out to occur.
  315. *
  316. * After having won arbitration, the SCRIPTS
  317. * processor is able to execute instructions while
  318. * the SCSI core is performing SCSI selection.
  319. */
  320. /*
  321. * Copy the CCB header to a fixed location
  322. * in the HCB using self-modifying SCRIPTS.
  323. */
  324. SCR_COPY (4),
  325. RADDR_1 (dsa),
  326. PADDR_A (_sms_a30),
  327. SCR_COPY (sizeof(struct sym_ccbh)),
  328. }/*-------------------------< _SMS_A30 >-------------------------*/,{
  329. 0,
  330. HADDR_1 (ccb_head),
  331. /*
  332. * Initialize the status register
  333. */
  334. SCR_COPY (4),
  335. HADDR_1 (ccb_head.status),
  336. RADDR_1 (scr0),
  337. }/*-------------------------< WF_SEL_DONE >----------------------*/,{
  338. SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
  339. SIR_SEL_ATN_NO_MSG_OUT,
  340. }/*-------------------------< SEND_IDENT >-----------------------*/,{
  341. /*
  342. * Selection complete.
  343. * Send the IDENTIFY and possibly the TAG message
  344. * and negotiation message if present.
  345. */
  346. SCR_MOVE_TBL ^ SCR_MSG_OUT,
  347. offsetof (struct sym_dsb, smsg),
  348. }/*-------------------------< SELECT2 >--------------------------*/,{
  349. #ifdef SYM_CONF_IARB_SUPPORT
  350. /*
  351. * Set IMMEDIATE ARBITRATION if we have been given
  352. * a hint to do so. (Some job to do after this one).
  353. */
  354. SCR_FROM_REG (HF_REG),
  355. 0,
  356. SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
  357. 8,
  358. SCR_REG_REG (scntl1, SCR_OR, IARB),
  359. 0,
  360. #endif
  361. /*
  362. * Anticipate the COMMAND phase.
  363. * This is the PHASE we expect at this point.
  364. */
  365. SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)),
  366. PADDR_A (sel_no_cmd),
  367. }/*-------------------------< COMMAND >--------------------------*/,{
  368. /*
  369. * ... and send the command
  370. */
  371. SCR_MOVE_TBL ^ SCR_COMMAND,
  372. offsetof (struct sym_dsb, cmd),
  373. }/*-------------------------< DISPATCH >-------------------------*/,{
  374. /*
  375. * MSG_IN is the only phase that shall be
  376. * entered at least once for each (re)selection.
  377. * So we test it first.
  378. */
  379. SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
  380. PADDR_A (msg_in),
  381. SCR_JUMP ^ IFTRUE (IF (SCR_DATA_OUT)),
  382. PADDR_A (datao_phase),
  383. SCR_JUMP ^ IFTRUE (IF (SCR_DATA_IN)),
  384. PADDR_A (datai_phase),
  385. SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
  386. PADDR_A (status),
  387. SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
  388. PADDR_A (command),
  389. SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
  390. PADDR_B (msg_out),
  391. /*
  392. * Discard as many illegal phases as
  393. * required and tell the C code about.
  394. */
  395. SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_OUT)),
  396. 16,
  397. SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
  398. HADDR_1 (scratch),
  399. SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_OUT)),
  400. -16,
  401. SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_IN)),
  402. 16,
  403. SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
  404. HADDR_1 (scratch),
  405. SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_IN)),
  406. -16,
  407. SCR_INT,
  408. SIR_BAD_PHASE,
  409. SCR_JUMP,
  410. PADDR_A (dispatch),
  411. }/*-------------------------< SEL_NO_CMD >-----------------------*/,{
  412. /*
  413. * The target does not switch to command
  414. * phase after IDENTIFY has been sent.
  415. *
  416. * If it stays in MSG OUT phase send it
  417. * the IDENTIFY again.
  418. */
  419. SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
  420. PADDR_B (resend_ident),
  421. /*
  422. * If target does not switch to MSG IN phase
  423. * and we sent a negotiation, assert the
  424. * failure immediately.
  425. */
  426. SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
  427. PADDR_A (dispatch),
  428. SCR_FROM_REG (HS_REG),
  429. 0,
  430. SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
  431. SIR_NEGO_FAILED,
  432. /*
  433. * Jump to dispatcher.
  434. */
  435. SCR_JUMP,
  436. PADDR_A (dispatch),
  437. }/*-------------------------< INIT >-----------------------------*/,{
  438. /*
  439. * Wait for the SCSI RESET signal to be
  440. * inactive before restarting operations,
  441. * since the chip may hang on SEL_ATN
  442. * if SCSI RESET is active.
  443. */
  444. SCR_FROM_REG (sstat0),
  445. 0,
  446. SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
  447. -16,
  448. SCR_JUMP,
  449. PADDR_A (start),
  450. }/*-------------------------< CLRACK >---------------------------*/,{
  451. /*
  452. * Terminate possible pending message phase.
  453. */
  454. SCR_CLR (SCR_ACK),
  455. 0,
  456. SCR_JUMP,
  457. PADDR_A (dispatch),
  458. }/*-------------------------< DATAI_DONE >-----------------------*/,{
  459. /*
  460. * Save current pointer to LASTP.
  461. */
  462. SCR_COPY (4),
  463. RADDR_1 (temp),
  464. HADDR_1 (ccb_head.lastp),
  465. /*
  466. * If the SWIDE is not full, jump to dispatcher.
  467. * We anticipate a STATUS phase.
  468. */
  469. SCR_FROM_REG (scntl2),
  470. 0,
  471. SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),
  472. PADDR_A (datai_done_wsr),
  473. SCR_JUMP ^ IFTRUE (WHEN (SCR_STATUS)),
  474. PADDR_A (status),
  475. SCR_JUMP,
  476. PADDR_A (dispatch),
  477. }/*-------------------------< DATAI_DONE_WSR >-------------------*/,{
  478. /*
  479. * The SWIDE is full.
  480. * Clear this condition.
  481. */
  482. SCR_REG_REG (scntl2, SCR_OR, WSR),
  483. 0,
  484. /*
  485. * We are expecting an IGNORE RESIDUE message
  486. * from the device, otherwise we are in data
  487. * overrun condition. Check against MSG_IN phase.
  488. */
  489. SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
  490. SIR_SWIDE_OVERRUN,
  491. SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
  492. PADDR_A (dispatch),
  493. /*
  494. * We are in MSG_IN phase,
  495. * Read the first byte of the message.
  496. * If it is not an IGNORE RESIDUE message,
  497. * signal overrun and jump to message
  498. * processing.
  499. */
  500. SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
  501. HADDR_1 (msgin[0]),
  502. SCR_INT ^ IFFALSE (DATA (M_IGN_RESIDUE)),
  503. SIR_SWIDE_OVERRUN,
  504. SCR_JUMP ^ IFFALSE (DATA (M_IGN_RESIDUE)),
  505. PADDR_A (msg_in2),
  506. /*
  507. * We got the message we expected.
  508. * Read the 2nd byte, and jump to dispatcher.
  509. */
  510. SCR_CLR (SCR_ACK),
  511. 0,
  512. SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
  513. HADDR_1 (msgin[1]),
  514. SCR_CLR (SCR_ACK),
  515. 0,
  516. SCR_JUMP,
  517. PADDR_A (dispatch),
  518. }/*-------------------------< DATAO_DONE >-----------------------*/,{
  519. /*
  520. * Save current pointer to LASTP.
  521. */
  522. SCR_COPY (4),
  523. RADDR_1 (temp),
  524. HADDR_1 (ccb_head.lastp),
  525. /*
  526. * If the SODL is not full jump to dispatcher.
  527. * We anticipate a STATUS phase.
  528. */
  529. SCR_FROM_REG (scntl2),
  530. 0,
  531. SCR_JUMP ^ IFTRUE (MASK (WSS, WSS)),
  532. PADDR_A (datao_done_wss),
  533. SCR_JUMP ^ IFTRUE (WHEN (SCR_STATUS)),
  534. PADDR_A (status),
  535. SCR_JUMP,
  536. PADDR_A (dispatch),
  537. }/*-------------------------< DATAO_DONE_WSS >-------------------*/,{
  538. /*
  539. * The SODL is full, clear this condition.
  540. */
  541. SCR_REG_REG (scntl2, SCR_OR, WSS),
  542. 0,
  543. /*
  544. * And signal a DATA UNDERRUN condition
  545. * to the C code.
  546. */
  547. SCR_INT,
  548. SIR_SODL_UNDERRUN,
  549. SCR_JUMP,
  550. PADDR_A (dispatch),
  551. }/*-------------------------< DATAI_PHASE >----------------------*/,{
  552. /*
  553. * Jump to current pointer.
  554. */
  555. SCR_COPY (4),
  556. HADDR_1 (ccb_head.lastp),
  557. RADDR_1 (temp),
  558. SCR_RETURN,
  559. 0,
  560. }/*-------------------------< DATAO_PHASE >----------------------*/,{
  561. /*
  562. * Jump to current pointer.
  563. */
  564. SCR_COPY (4),
  565. HADDR_1 (ccb_head.lastp),
  566. RADDR_1 (temp),
  567. SCR_RETURN,
  568. 0,
  569. }/*-------------------------< MSG_IN >---------------------------*/,{
  570. /*
  571. * Get the first byte of the message.
  572. *
  573. * The script processor doesn't negate the
  574. * ACK signal after this transfer.
  575. */
  576. SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
  577. HADDR_1 (msgin[0]),
  578. }/*-------------------------< MSG_IN2 >--------------------------*/,{
  579. /*
  580. * Check first against 1 byte messages
  581. * that we handle from SCRIPTS.
  582. */
  583. SCR_JUMP ^ IFTRUE (DATA (M_COMPLETE)),
  584. PADDR_A (complete),
  585. SCR_JUMP ^ IFTRUE (DATA (M_DISCONNECT)),
  586. PADDR_A (disconnect),
  587. SCR_JUMP ^ IFTRUE (DATA (M_SAVE_DP)),
  588. PADDR_A (save_dp),
  589. SCR_JUMP ^ IFTRUE (DATA (M_RESTORE_DP)),
  590. PADDR_A (restore_dp),
  591. /*
  592. * We handle all other messages from the
  593. * C code, so no need to waste on-chip RAM
  594. * for those ones.
  595. */
  596. SCR_JUMP,
  597. PADDR_B (msg_in_etc),
  598. }/*-------------------------< STATUS >---------------------------*/,{
  599. /*
  600. * get the status
  601. */
  602. SCR_MOVE_ABS (1) ^ SCR_STATUS,
  603. HADDR_1 (scratch),
  604. #ifdef SYM_CONF_IARB_SUPPORT
  605. /*
  606. * If STATUS is not GOOD, clear IMMEDIATE ARBITRATION,
  607. * since we may have to tamper the start queue from
  608. * the C code.
  609. */
  610. SCR_JUMPR ^ IFTRUE (DATA (S_GOOD)),
  611. 8,
  612. SCR_REG_REG (scntl1, SCR_AND, ~IARB),
  613. 0,
  614. #endif
  615. /*
  616. * save status to scsi_status.
  617. * mark as complete.
  618. */
  619. SCR_TO_REG (SS_REG),
  620. 0,
  621. SCR_LOAD_REG (HS_REG, HS_COMPLETE),
  622. 0,
  623. /*
  624. * Anticipate the MESSAGE PHASE for
  625. * the TASK COMPLETE message.
  626. */
  627. SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
  628. PADDR_A (msg_in),
  629. SCR_JUMP,
  630. PADDR_A (dispatch),
  631. }/*-------------------------< COMPLETE >-------------------------*/,{
  632. /*
  633. * Complete message.
  634. *
  635. * When we terminate the cycle by clearing ACK,
  636. * the target may disconnect immediately.
  637. *
  638. * We don't want to be told of an "unexpected disconnect",
  639. * so we disable this feature.
  640. */
  641. SCR_REG_REG (scntl2, SCR_AND, 0x7f),
  642. 0,
  643. /*
  644. * Terminate cycle ...
  645. */
  646. SCR_CLR (SCR_ACK|SCR_ATN),
  647. 0,
  648. /*
  649. * ... and wait for the disconnect.
  650. */
  651. SCR_WAIT_DISC,
  652. 0,
  653. }/*-------------------------< COMPLETE2 >------------------------*/,{
  654. /*
  655. * Save host status.
  656. */
  657. SCR_COPY (4),
  658. RADDR_1 (scr0),
  659. HADDR_1 (ccb_head.status),
  660. /*
  661. * Move back the CCB header using self-modifying
  662. * SCRIPTS.
  663. */
  664. SCR_COPY (4),
  665. RADDR_1 (dsa),
  666. PADDR_A (_sms_a40),
  667. SCR_COPY (sizeof(struct sym_ccbh)),
  668. HADDR_1 (ccb_head),
  669. }/*-------------------------< _SMS_A40 >-------------------------*/,{
  670. 0,
  671. /*
  672. * Some bridges may reorder DMA writes to memory.
  673. * We donnot want the CPU to deal with completions
  674. * without all the posted write having been flushed
  675. * to memory. This DUMMY READ should flush posted
  676. * buffers prior to the CPU having to deal with
  677. * completions.
  678. */
  679. SCR_COPY (4), /* DUMMY READ */
  680. HADDR_1 (ccb_head.status),
  681. RADDR_1 (scr0),
  682. /*
  683. * If command resulted in not GOOD status,
  684. * call the C code if needed.
  685. */
  686. SCR_FROM_REG (SS_REG),
  687. 0,
  688. SCR_CALL ^ IFFALSE (DATA (S_GOOD)),
  689. PADDR_B (bad_status),
  690. /*
  691. * If we performed an auto-sense, call
  692. * the C code to synchronyze task aborts
  693. * with UNIT ATTENTION conditions.
  694. */
  695. SCR_FROM_REG (HF_REG),
  696. 0,
  697. SCR_JUMP ^ IFFALSE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),
  698. PADDR_A (complete_error),
  699. }/*-------------------------< DONE >-----------------------------*/,{
  700. /*
  701. * Copy the DSA to the DONE QUEUE and
  702. * signal completion to the host.
  703. * If we are interrupted between DONE
  704. * and DONE_END, we must reset, otherwise
  705. * the completed CCB may be lost.
  706. */
  707. SCR_COPY (4),
  708. PADDR_B (done_pos),
  709. PADDR_A (_sms_a50),
  710. SCR_COPY (4),
  711. RADDR_1 (dsa),
  712. }/*-------------------------< _SMS_A50 >-------------------------*/,{
  713. 0,
  714. SCR_COPY (4),
  715. PADDR_B (done_pos),
  716. PADDR_A (_sms_a60),
  717. /*
  718. * The instruction below reads the DONE QUEUE next
  719. * free position from memory.
  720. * In addition it ensures that all PCI posted writes
  721. * are flushed and so the DSA value of the done
  722. * CCB is visible by the CPU before INTFLY is raised.
  723. */
  724. SCR_COPY (8),
  725. }/*-------------------------< _SMS_A60 >-------------------------*/,{
  726. 0,
  727. PADDR_B (prev_done),
  728. }/*-------------------------< DONE_END >-------------------------*/,{
  729. SCR_INT_FLY,
  730. 0,
  731. SCR_JUMP,
  732. PADDR_A (start),
  733. }/*-------------------------< COMPLETE_ERROR >-------------------*/,{
  734. SCR_COPY (4),
  735. PADDR_B (startpos),
  736. RADDR_1 (scratcha),
  737. SCR_INT,
  738. SIR_COMPLETE_ERROR,
  739. }/*-------------------------< SAVE_DP >--------------------------*/,{
  740. /*
  741. * Clear ACK immediately.
  742. * No need to delay it.
  743. */
  744. SCR_CLR (SCR_ACK),
  745. 0,
  746. /*
  747. * Keep track we received a SAVE DP, so
  748. * we will switch to the other PM context
  749. * on the next PM since the DP may point
  750. * to the current PM context.
  751. */
  752. SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
  753. 0,
  754. /*
  755. * SAVE_DP message:
  756. * Copy LASTP to SAVEP.
  757. */
  758. SCR_COPY (4),
  759. HADDR_1 (ccb_head.lastp),
  760. HADDR_1 (ccb_head.savep),
  761. /*
  762. * Anticipate the MESSAGE PHASE for
  763. * the DISCONNECT message.
  764. */
  765. SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
  766. PADDR_A (msg_in),
  767. SCR_JUMP,
  768. PADDR_A (dispatch),
  769. }/*-------------------------< RESTORE_DP >-----------------------*/,{
  770. /*
  771. * Clear ACK immediately.
  772. * No need to delay it.
  773. */
  774. SCR_CLR (SCR_ACK),
  775. 0,
  776. /*
  777. * Copy SAVEP to LASTP.
  778. */
  779. SCR_COPY (4),
  780. HADDR_1 (ccb_head.savep),
  781. HADDR_1 (ccb_head.lastp),
  782. SCR_JUMP,
  783. PADDR_A (dispatch),
  784. }/*-------------------------< DISCONNECT >-----------------------*/,{
  785. /*
  786. * DISCONNECTing ...
  787. *
  788. * disable the "unexpected disconnect" feature,
  789. * and remove the ACK signal.
  790. */
  791. SCR_REG_REG (scntl2, SCR_AND, 0x7f),
  792. 0,
  793. SCR_CLR (SCR_ACK|SCR_ATN),
  794. 0,
  795. /*
  796. * Wait for the disconnect.
  797. */
  798. SCR_WAIT_DISC,
  799. 0,
  800. /*
  801. * Status is: DISCONNECTED.
  802. */
  803. SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
  804. 0,
  805. /*
  806. * Save host status.
  807. */
  808. SCR_COPY (4),
  809. RADDR_1 (scr0),
  810. HADDR_1 (ccb_head.status),
  811. }/*-------------------------< DISCONNECT2 >----------------------*/,{
  812. /*
  813. * Move back the CCB header using self-modifying
  814. * SCRIPTS.
  815. */
  816. SCR_COPY (4),
  817. RADDR_1 (dsa),
  818. PADDR_A (_sms_a65),
  819. SCR_COPY (sizeof(struct sym_ccbh)),
  820. HADDR_1 (ccb_head),
  821. }/*-------------------------< _SMS_A65 >-------------------------*/,{
  822. 0,
  823. SCR_JUMP,
  824. PADDR_A (start),
  825. }/*-------------------------< IDLE >-----------------------------*/,{
  826. /*
  827. * Nothing to do?
  828. * Switch the LED off and wait for reselect.
  829. * Will be patched with a NO_OP if LED
  830. * not needed or not desired.
  831. */
  832. SCR_REG_REG (gpreg, SCR_OR, 0x01),
  833. 0,
  834. #ifdef SYM_CONF_IARB_SUPPORT
  835. SCR_JUMPR,
  836. 8,
  837. #endif
  838. }/*-------------------------< UNGETJOB >-------------------------*/,{
  839. #ifdef SYM_CONF_IARB_SUPPORT
  840. /*
  841. * Set IMMEDIATE ARBITRATION, for the next time.
  842. * This will give us better chance to win arbitration
  843. * for the job we just wanted to do.
  844. */
  845. SCR_REG_REG (scntl1, SCR_OR, IARB),
  846. 0,
  847. #endif
  848. /*
  849. * We are not able to restart the SCRIPTS if we are
  850. * interrupted and these instruction haven't been
  851. * all executed. BTW, this is very unlikely to
  852. * happen, but we check that from the C code.
  853. */
  854. SCR_LOAD_REG (dsa, 0xff),
  855. 0,
  856. SCR_COPY (4),
  857. RADDR_1 (scratcha),
  858. PADDR_B (startpos),
  859. }/*-------------------------< RESELECT >-------------------------*/,{
  860. #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
  861. /*
  862. * Make sure we are in initiator mode.
  863. */
  864. SCR_CLR (SCR_TRG),
  865. 0,
  866. #endif
  867. /*
  868. * Sleep waiting for a reselection.
  869. */
  870. SCR_WAIT_RESEL,
  871. PADDR_A(start),
  872. }/*-------------------------< RESELECTED >-----------------------*/,{
  873. /*
  874. * Switch the LED on.
  875. * Will be patched with a NO_OP if LED
  876. * not needed or not desired.
  877. */
  878. SCR_REG_REG (gpreg, SCR_AND, 0xfe),
  879. 0,
  880. /*
  881. * load the target id into the sdid
  882. */
  883. SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
  884. 0,
  885. SCR_TO_REG (sdid),
  886. 0,
  887. /*
  888. * Load the target control block address
  889. */
  890. SCR_COPY (4),
  891. PADDR_B (targtbl),
  892. RADDR_1 (dsa),
  893. SCR_SFBR_REG (dsa, SCR_SHL, 0),
  894. 0,
  895. SCR_REG_REG (dsa, SCR_SHL, 0),
  896. 0,
  897. SCR_REG_REG (dsa, SCR_AND, 0x3c),
  898. 0,
  899. SCR_COPY (4),
  900. RADDR_1 (dsa),
  901. PADDR_A (_sms_a70),
  902. SCR_COPY (4),
  903. }/*-------------------------< _SMS_A70 >-------------------------*/,{
  904. 0,
  905. RADDR_1 (dsa),
  906. /*
  907. * Copy the TCB header to a fixed place in
  908. * the HCB.
  909. */
  910. SCR_COPY (4),
  911. RADDR_1 (dsa),
  912. PADDR_A (_sms_a80),
  913. SCR_COPY (sizeof(struct sym_tcbh)),
  914. }/*-------------------------< _SMS_A80 >-------------------------*/,{
  915. 0,
  916. HADDR_1 (tcb_head),
  917. /*
  918. * We expect MESSAGE IN phase.
  919. * If not, get help from the C code.
  920. */
  921. SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
  922. SIR_RESEL_NO_MSG_IN,
  923. }/*-------------------------< RESELECTED1 >----------------------*/,{
  924. /*
  925. * Load the synchronous transfer registers.
  926. */
  927. SCR_COPY (1),
  928. HADDR_1 (tcb_head.wval),
  929. RADDR_1 (scntl3),
  930. SCR_COPY (1),
  931. HADDR_1 (tcb_head.sval),
  932. RADDR_1 (sxfer),
  933. /*
  934. * Get the IDENTIFY message.
  935. */
  936. SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
  937. HADDR_1 (msgin),
  938. /*
  939. * If IDENTIFY LUN #0, use a faster path
  940. * to find the LCB structure.
  941. */
  942. SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
  943. PADDR_A (resel_lun0),
  944. /*
  945. * If message isn't an IDENTIFY,
  946. * tell the C code about.
  947. */
  948. SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
  949. SIR_RESEL_NO_IDENTIFY,
  950. /*
  951. * It is an IDENTIFY message,
  952. * Load the LUN control block address.
  953. */
  954. SCR_COPY (4),
  955. HADDR_1 (tcb_head.luntbl_sa),
  956. RADDR_1 (dsa),
  957. SCR_SFBR_REG (dsa, SCR_SHL, 0),
  958. 0,
  959. SCR_REG_REG (dsa, SCR_SHL, 0),
  960. 0,
  961. SCR_REG_REG (dsa, SCR_AND, 0xfc),
  962. 0,
  963. SCR_COPY (4),
  964. RADDR_1 (dsa),
  965. PADDR_A (_sms_a90),
  966. SCR_COPY (4),
  967. }/*-------------------------< _SMS_A90 >-------------------------*/,{
  968. 0,
  969. RADDR_1 (dsa),
  970. SCR_JUMPR,
  971. 12,
  972. }/*-------------------------< RESEL_LUN0 >-----------------------*/,{
  973. /*
  974. * LUN 0 special case (but usual one :))
  975. */
  976. SCR_COPY (4),
  977. HADDR_1 (tcb_head.lun0_sa),
  978. RADDR_1 (dsa),
  979. /*
  980. * Jump indirectly to the reselect action for this LUN.
  981. * (lcb.head.resel_sa assumed at offset zero of lcb).
  982. */
  983. SCR_COPY (4),
  984. RADDR_1 (dsa),
  985. PADDR_A (_sms_a100),
  986. SCR_COPY (4),
  987. }/*-------------------------< _SMS_A100 >------------------------*/,{
  988. 0,
  989. RADDR_1 (temp),
  990. SCR_RETURN,
  991. 0,
  992. /* In normal situations, we jump to RESEL_TAG or RESEL_NO_TAG */
  993. }/*-------------------------< RESEL_TAG >------------------------*/,{
  994. /*
  995. * ACK the IDENTIFY previously received.
  996. */
  997. SCR_CLR (SCR_ACK),
  998. 0,
  999. /*
  1000. * It shall be a tagged command.
  1001. * Read SIMPLE+TAG.
  1002. * The C code will deal with errors.
  1003. * Aggressive optimization, isn't it? :)
  1004. */
  1005. SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
  1006. HADDR_1 (msgin),
  1007. /*
  1008. * Copy the LCB header to a fixed place in
  1009. * the HCB using self-modifying SCRIPTS.
  1010. */
  1011. SCR_COPY (4),
  1012. RADDR_1 (dsa),
  1013. PADDR_A (_sms_a110),
  1014. SCR_COPY (sizeof(struct sym_lcbh)),
  1015. }/*-------------------------< _SMS_A110 >------------------------*/,{
  1016. 0,
  1017. HADDR_1 (lcb_head),
  1018. /*
  1019. * Load the pointer to the tagged task
  1020. * table for this LUN.
  1021. */
  1022. SCR_COPY (4),
  1023. HADDR_1 (lcb_head.itlq_tbl_sa),
  1024. RADDR_1 (dsa),
  1025. /*
  1026. * The SIDL still contains the TAG value.
  1027. * Aggressive optimization, isn't it? :):)
  1028. */
  1029. SCR_REG_SFBR (sidl, SCR_SHL, 0),
  1030. 0,
  1031. #if SYM_CONF_MAX_TASK*4 > 512
  1032. SCR_JUMPR ^ IFFALSE (CARRYSET),
  1033. 8,
  1034. SCR_REG_REG (dsa1, SCR_OR, 2),
  1035. 0,
  1036. SCR_REG_REG (sfbr, SCR_SHL, 0),
  1037. 0,
  1038. SCR_JUMPR ^ IFFALSE (CARRYSET),
  1039. 8,
  1040. SCR_REG_REG (dsa1, SCR_OR, 1),
  1041. 0,
  1042. #elif SYM_CONF_MAX_TASK*4 > 256
  1043. SCR_JUMPR ^ IFFALSE (CARRYSET),
  1044. 8,
  1045. SCR_REG_REG (dsa1, SCR_OR, 1),
  1046. 0,
  1047. #endif
  1048. /*
  1049. * Retrieve the DSA of this task.
  1050. * JUMP indirectly to the restart point of the CCB.
  1051. */
  1052. SCR_SFBR_REG (dsa, SCR_AND, 0xfc),
  1053. 0,
  1054. SCR_COPY (4),
  1055. RADDR_1 (dsa),
  1056. PADDR_A (_sms_a120),
  1057. SCR_COPY (4),
  1058. }/*-------------------------< _SMS_A120 >------------------------*/,{
  1059. 0,
  1060. RADDR_1 (dsa),
  1061. }/*-------------------------< RESEL_GO >-------------------------*/,{
  1062. SCR_COPY (4),
  1063. RADDR_1 (dsa),
  1064. PADDR_A (_sms_a130),
  1065. /*
  1066. * Move 'ccb.phys.head.go' action to
  1067. * scratch/scratch1. So scratch1 will
  1068. * contain the 'restart' field of the
  1069. * 'go' structure.
  1070. */
  1071. SCR_COPY (8),
  1072. }/*-------------------------< _SMS_A130 >------------------------*/,{
  1073. 0,
  1074. PADDR_B (scratch),
  1075. SCR_COPY (4),
  1076. PADDR_B (scratch1), /* phys.head.go.restart */
  1077. RADDR_1 (temp),
  1078. SCR_RETURN,
  1079. 0,
  1080. /* In normal situations we branch to RESEL_DSA */
  1081. }/*-------------------------< RESEL_DSA >------------------------*/,{
  1082. /*
  1083. * ACK the IDENTIFY or TAG previously received.
  1084. */
  1085. SCR_CLR (SCR_ACK),
  1086. 0,
  1087. }/*-------------------------< RESEL_DSA1 >-----------------------*/,{
  1088. /*
  1089. * Copy the CCB header to a fixed location
  1090. * in the HCB using self-modifying SCRIPTS.
  1091. */
  1092. SCR_COPY (4),
  1093. RADDR_1 (dsa),
  1094. PADDR_A (_sms_a140),
  1095. SCR_COPY (sizeof(struct sym_ccbh)),
  1096. }/*-------------------------< _SMS_A140 >------------------------*/,{
  1097. 0,
  1098. HADDR_1 (ccb_head),
  1099. /*
  1100. * Initialize the status register
  1101. */
  1102. SCR_COPY (4),
  1103. HADDR_1 (ccb_head.status),
  1104. RADDR_1 (scr0),
  1105. /*
  1106. * Jump to dispatcher.
  1107. */
  1108. SCR_JUMP,
  1109. PADDR_A (dispatch),
  1110. }/*-------------------------< RESEL_NO_TAG >---------------------*/,{
  1111. /*
  1112. * Copy the LCB header to a fixed place in
  1113. * the HCB using self-modifying SCRIPTS.
  1114. */
  1115. SCR_COPY (4),
  1116. RADDR_1 (dsa),
  1117. PADDR_A (_sms_a145),
  1118. SCR_COPY (sizeof(struct sym_lcbh)),
  1119. }/*-------------------------< _SMS_A145 >------------------------*/,{
  1120. 0,
  1121. HADDR_1 (lcb_head),
  1122. /*
  1123. * Load the DSA with the unique ITL task.
  1124. */
  1125. SCR_COPY (4),
  1126. HADDR_1 (lcb_head.itl_task_sa),
  1127. RADDR_1 (dsa),
  1128. SCR_JUMP,
  1129. PADDR_A (resel_go),
  1130. }/*-------------------------< DATA_IN >--------------------------*/,{
  1131. /*
  1132. * Because the size depends on the
  1133. * #define SYM_CONF_MAX_SG parameter,
  1134. * it is filled in at runtime.
  1135. *
  1136. * ##===========< i=0; i<SYM_CONF_MAX_SG >=========
  1137. * || SCR_CHMOV_TBL ^ SCR_DATA_IN,
  1138. * || offsetof (struct sym_dsb, data[ i]),
  1139. * ##==========================================
  1140. */
  1141. 0
  1142. }/*-------------------------< DATA_IN2 >-------------------------*/,{
  1143. SCR_CALL,
  1144. PADDR_A (datai_done),
  1145. SCR_JUMP,
  1146. PADDR_B (data_ovrun),
  1147. }/*-------------------------< DATA_OUT >-------------------------*/,{
  1148. /*
  1149. * Because the size depends on the
  1150. * #define SYM_CONF_MAX_SG parameter,
  1151. * it is filled in at runtime.
  1152. *
  1153. * ##===========< i=0; i<SYM_CONF_MAX_SG >=========
  1154. * || SCR_CHMOV_TBL ^ SCR_DATA_OUT,
  1155. * || offsetof (struct sym_dsb, data[ i]),
  1156. * ##==========================================
  1157. */
  1158. 0
  1159. }/*-------------------------< DATA_OUT2 >------------------------*/,{
  1160. SCR_CALL,
  1161. PADDR_A (datao_done),
  1162. SCR_JUMP,
  1163. PADDR_B (data_ovrun),
  1164. }/*-------------------------< PM0_DATA >-------------------------*/,{
  1165. /*
  1166. * Read our host flags to SFBR, so we will be able
  1167. * to check against the data direction we expect.
  1168. */
  1169. SCR_FROM_REG (HF_REG),
  1170. 0,
  1171. /*
  1172. * Check against actual DATA PHASE.
  1173. */
  1174. SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
  1175. PADDR_A (pm0_data_out),
  1176. /*
  1177. * Actual phase is DATA IN.
  1178. * Check against expected direction.
  1179. */
  1180. SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
  1181. PADDR_B (data_ovrun),
  1182. /*
  1183. * Keep track we are moving data from the
  1184. * PM0 DATA mini-script.
  1185. */
  1186. SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
  1187. 0,
  1188. /*
  1189. * Move the data to memory.
  1190. */
  1191. SCR_CHMOV_TBL ^ SCR_DATA_IN,
  1192. offsetof (struct sym_ccb, phys.pm0.sg),
  1193. SCR_JUMP,
  1194. PADDR_A (pm0_data_end),
  1195. }/*-------------------------< PM0_DATA_OUT >---------------------*/,{
  1196. /*
  1197. * Actual phase is DATA OUT.
  1198. * Check against expected direction.
  1199. */
  1200. SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
  1201. PADDR_B (data_ovrun),
  1202. /*
  1203. * Keep track we are moving data from the
  1204. * PM0 DATA mini-script.
  1205. */
  1206. SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
  1207. 0,
  1208. /*
  1209. * Move the data from memory.
  1210. */
  1211. SCR_CHMOV_TBL ^ SCR_DATA_OUT,
  1212. offsetof (struct sym_ccb, phys.pm0.sg),
  1213. }/*-------------------------< PM0_DATA_END >---------------------*/,{
  1214. /*
  1215. * Clear the flag that told we were moving
  1216. * data from the PM0 DATA mini-script.
  1217. */
  1218. SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM0)),
  1219. 0,
  1220. /*
  1221. * Return to the previous DATA script which
  1222. * is guaranteed by design (if no bug) to be
  1223. * the main DATA script for this transfer.
  1224. */
  1225. SCR_COPY (4),
  1226. RADDR_1 (dsa),
  1227. RADDR_1 (scratcha),
  1228. SCR_REG_REG (scratcha, SCR_ADD, offsetof (struct sym_ccb,phys.pm0.ret)),
  1229. 0,
  1230. }/*-------------------------< PM_DATA_END >----------------------*/,{
  1231. SCR_COPY (4),
  1232. RADDR_1 (scratcha),
  1233. PADDR_A (_sms_a150),
  1234. SCR_COPY (4),
  1235. }/*-------------------------< _SMS_A150 >------------------------*/,{
  1236. 0,
  1237. RADDR_1 (temp),
  1238. SCR_RETURN,
  1239. 0,
  1240. }/*-------------------------< PM1_DATA >-------------------------*/,{
  1241. /*
  1242. * Read our host flags to SFBR, so we will be able
  1243. * to check against the data direction we expect.
  1244. */
  1245. SCR_FROM_REG (HF_REG),
  1246. 0,
  1247. /*
  1248. * Check against actual DATA PHASE.
  1249. */
  1250. SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
  1251. PADDR_A (pm1_data_out),
  1252. /*
  1253. * Actual phase is DATA IN.
  1254. * Check against expected direction.
  1255. */
  1256. SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
  1257. PADDR_B (data_ovrun),
  1258. /*
  1259. * Keep track we are moving data from the
  1260. * PM1 DATA mini-script.
  1261. */
  1262. SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
  1263. 0,
  1264. /*
  1265. * Move the data to memory.
  1266. */
  1267. SCR_CHMOV_TBL ^ SCR_DATA_IN,
  1268. offsetof (struct sym_ccb, phys.pm1.sg),
  1269. SCR_JUMP,
  1270. PADDR_A (pm1_data_end),
  1271. }/*-------------------------< PM1_DATA_OUT >---------------------*/,{
  1272. /*
  1273. * Actual phase is DATA OUT.
  1274. * Check against expected direction.
  1275. */
  1276. SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
  1277. PADDR_B (data_ovrun),
  1278. /*
  1279. * Keep track we are moving data from the
  1280. * PM1 DATA mini-script.
  1281. */
  1282. SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
  1283. 0,
  1284. /*
  1285. * Move the data from memory.
  1286. */
  1287. SCR_CHMOV_TBL ^ SCR_DATA_OUT,
  1288. offsetof (struct sym_ccb, phys.pm1.sg),
  1289. }/*-------------------------< PM1_DATA_END >---------------------*/,{
  1290. /*
  1291. * Clear the flag that told we were moving
  1292. * data from the PM1 DATA mini-script.
  1293. */
  1294. SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM1)),
  1295. 0,
  1296. /*
  1297. * Return to the previous DATA script which
  1298. * is guaranteed by design (if no bug) to be
  1299. * the main DATA script for this transfer.
  1300. */
  1301. SCR_COPY (4),
  1302. RADDR_1 (dsa),
  1303. RADDR_1 (scratcha),
  1304. SCR_REG_REG (scratcha, SCR_ADD, offsetof (struct sym_ccb,phys.pm1.ret)),
  1305. 0,
  1306. SCR_JUMP,
  1307. PADDR_A (pm_data_end),
  1308. }/*--------------------------<>----------------------------------*/
  1309. };
  1310. static struct SYM_FWB_SCR SYM_FWB_SCR = {
  1311. /*-------------------------< NO_DATA >--------------------------*/ {
  1312. SCR_JUMP,
  1313. PADDR_B (data_ovrun),
  1314. }/*-------------------------< SEL_FOR_ABORT >--------------------*/,{
  1315. /*
  1316. * We are jumped here by the C code, if we have
  1317. * some target to reset or some disconnected
  1318. * job to abort. Since error recovery is a serious
  1319. * busyness, we will really reset the SCSI BUS, if
  1320. * case of a SCSI interrupt occurring in this path.
  1321. */
  1322. #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
  1323. /*
  1324. * Set initiator mode.
  1325. */
  1326. SCR_CLR (SCR_TRG),
  1327. 0,
  1328. #endif
  1329. /*
  1330. * And try to select this target.
  1331. */
  1332. SCR_SEL_TBL_ATN ^ offsetof (struct sym_hcb, abrt_sel),
  1333. PADDR_A (reselect),
  1334. /*
  1335. * Wait for the selection to complete or
  1336. * the selection to time out.
  1337. */
  1338. SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
  1339. -8,
  1340. /*
  1341. * Call the C code.
  1342. */
  1343. SCR_INT,
  1344. SIR_TARGET_SELECTED,
  1345. /*
  1346. * The C code should let us continue here.
  1347. * Send the 'kiss of death' message.
  1348. * We expect an immediate disconnect once
  1349. * the target has eaten the message.
  1350. */
  1351. SCR_REG_REG (scntl2, SCR_AND, 0x7f),
  1352. 0,
  1353. SCR_MOVE_TBL ^ SCR_MSG_OUT,
  1354. offsetof (struct sym_hcb, abrt_tbl),
  1355. SCR_CLR (SCR_ACK|SCR_ATN),
  1356. 0,
  1357. SCR_WAIT_DISC,
  1358. 0,
  1359. /*
  1360. * Tell the C code that we are done.
  1361. */
  1362. SCR_INT,
  1363. SIR_ABORT_SENT,
  1364. }/*-------------------------< SEL_FOR_ABORT_1 >------------------*/,{
  1365. /*
  1366. * Jump at scheduler.
  1367. */
  1368. SCR_JUMP,
  1369. PADDR_A (start),
  1370. }/*-------------------------< MSG_IN_ETC >-----------------------*/,{
  1371. /*
  1372. * If it is an EXTENDED (variable size message)
  1373. * Handle it.
  1374. */
  1375. SCR_JUMP ^ IFTRUE (DATA (M_EXTENDED)),
  1376. PADDR_B (msg_extended),
  1377. /*
  1378. * Let the C code handle any other
  1379. * 1 byte message.
  1380. */
  1381. SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),
  1382. PADDR_B (msg_received),
  1383. SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),
  1384. PADDR_B (msg_received),
  1385. /*
  1386. * We donnot handle 2 bytes messages from SCRIPTS.
  1387. * So, let the C code deal with these ones too.
  1388. */
  1389. SCR_JUMP ^ IFFALSE (MASK (0x20, 0xf0)),
  1390. PADDR_B (msg_weird_seen),
  1391. SCR_CLR (SCR_ACK),
  1392. 0,
  1393. SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
  1394. HADDR_1 (msgin[1]),
  1395. }/*-------------------------< MSG_RECEIVED >---------------------*/,{
  1396. SCR_COPY (4), /* DUMMY READ */
  1397. HADDR_1 (scratch),
  1398. RADDR_1 (scratcha),
  1399. SCR_INT,
  1400. SIR_MSG_RECEIVED,
  1401. }/*-------------------------< MSG_WEIRD_SEEN >-------------------*/,{
  1402. SCR_COPY (4), /* DUMMY READ */
  1403. HADDR_1 (scratch),
  1404. RADDR_1 (scratcha),
  1405. SCR_INT,
  1406. SIR_MSG_WEIRD,
  1407. }/*-------------------------< MSG_EXTENDED >---------------------*/,{
  1408. /*
  1409. * Clear ACK and get the next byte
  1410. * assumed to be the message length.
  1411. */
  1412. SCR_CLR (SCR_ACK),
  1413. 0,
  1414. SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
  1415. HADDR_1 (msgin[1]),
  1416. /*
  1417. * Try to catch some unlikely situations as 0 length
  1418. * or too large the length.
  1419. */
  1420. SCR_JUMP ^ IFTRUE (DATA (0)),
  1421. PADDR_B (msg_weird_seen),
  1422. SCR_TO_REG (scratcha),
  1423. 0,
  1424. SCR_REG_REG (sfbr, SCR_ADD, (256-8)),
  1425. 0,
  1426. SCR_JUMP ^ IFTRUE (CARRYSET),
  1427. PADDR_B (msg_weird_seen),
  1428. /*
  1429. * We donnot handle extended messages from SCRIPTS.
  1430. * Read the amount of data corresponding to the
  1431. * message length and call the C code.
  1432. */
  1433. SCR_COPY (1),
  1434. RADDR_1 (scratcha),
  1435. PADDR_B (_sms_b10),
  1436. SCR_CLR (SCR_ACK),
  1437. 0,
  1438. }/*-------------------------< _SMS_B10 >-------------------------*/,{
  1439. SCR_MOVE_ABS (0) ^ SCR_MSG_IN,
  1440. HADDR_1 (msgin[2]),
  1441. SCR_JUMP,
  1442. PADDR_B (msg_received),
  1443. }/*-------------------------< MSG_BAD >--------------------------*/,{
  1444. /*
  1445. * unimplemented message - reject it.
  1446. */
  1447. SCR_INT,
  1448. SIR_REJECT_TO_SEND,
  1449. SCR_SET (SCR_ATN),
  1450. 0,
  1451. SCR_JUMP,
  1452. PADDR_A (clrack),
  1453. }/*-------------------------< MSG_WEIRD >------------------------*/,{
  1454. /*
  1455. * weird message received
  1456. * ignore all MSG IN phases and reject it.
  1457. */
  1458. SCR_INT,
  1459. SIR_REJECT_TO_SEND,
  1460. SCR_SET (SCR_ATN),
  1461. 0,
  1462. }/*-------------------------< MSG_WEIRD1 >-----------------------*/,{
  1463. SCR_CLR (SCR_ACK),
  1464. 0,
  1465. SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
  1466. PADDR_A (dispatch),
  1467. SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
  1468. HADDR_1 (scratch),
  1469. SCR_JUMP,
  1470. PADDR_B (msg_weird1),
  1471. }/*-------------------------< WDTR_RESP >------------------------*/,{
  1472. /*
  1473. * let the target fetch our answer.
  1474. */
  1475. SCR_SET (SCR_ATN),
  1476. 0,
  1477. SCR_CLR (SCR_ACK),
  1478. 0,
  1479. SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
  1480. PADDR_B (nego_bad_phase),
  1481. }/*-------------------------< SEND_WDTR >------------------------*/,{
  1482. /*
  1483. * Send the M_X_WIDE_REQ
  1484. */
  1485. SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
  1486. HADDR_1 (msgout),
  1487. SCR_JUMP,
  1488. PADDR_B (msg_out_done),
  1489. }/*-------------------------< SDTR_RESP >------------------------*/,{
  1490. /*
  1491. * let the target fetch our answer.
  1492. */
  1493. SCR_SET (SCR_ATN),
  1494. 0,
  1495. SCR_CLR (SCR_ACK),
  1496. 0,
  1497. SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
  1498. PADDR_B (nego_bad_phase),
  1499. }/*-------------------------< SEND_SDTR >------------------------*/,{
  1500. /*
  1501. * Send the M_X_SYNC_REQ
  1502. */
  1503. SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
  1504. HADDR_1 (msgout),
  1505. SCR_JUMP,
  1506. PADDR_B (msg_out_done),
  1507. }/*-------------------------< PPR_RESP >-------------------------*/,{
  1508. /*
  1509. * let the target fetch our answer.
  1510. */
  1511. SCR_SET (SCR_ATN),
  1512. 0,
  1513. SCR_CLR (SCR_ACK),
  1514. 0,
  1515. SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
  1516. PADDR_B (nego_bad_phase),
  1517. }/*-------------------------< SEND_PPR >-------------------------*/,{
  1518. /*
  1519. * Send the M_X_PPR_REQ
  1520. */
  1521. SCR_MOVE_ABS (8) ^ SCR_MSG_OUT,
  1522. HADDR_1 (msgout),
  1523. SCR_JUMP,
  1524. PADDR_B (msg_out_done),
  1525. }/*-------------------------< NEGO_BAD_PHASE >-------------------*/,{
  1526. SCR_INT,
  1527. SIR_NEGO_PROTO,
  1528. SCR_JUMP,
  1529. PADDR_A (dispatch),
  1530. }/*-------------------------< MSG_OUT >--------------------------*/,{
  1531. /*
  1532. * The target requests a message.
  1533. * We donnot send messages that may
  1534. * require the device to go to bus free.
  1535. */
  1536. SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
  1537. HADDR_1 (msgout),
  1538. /*
  1539. * ... wait for the next phase
  1540. * if it's a message out, send it again, ...
  1541. */
  1542. SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
  1543. PADDR_B (msg_out),
  1544. }/*-------------------------< MSG_OUT_DONE >---------------------*/,{
  1545. /*
  1546. * Let the C code be aware of the
  1547. * sent message and clear the message.
  1548. */
  1549. SCR_INT,
  1550. SIR_MSG_OUT_DONE,
  1551. /*
  1552. * ... and process the next phase
  1553. */
  1554. SCR_JUMP,
  1555. PADDR_A (dispatch),
  1556. }/*-------------------------< DATA_OVRUN >-----------------------*/,{
  1557. /*
  1558. * Zero scratcha that will count the
  1559. * extras bytes.
  1560. */
  1561. SCR_COPY (4),
  1562. PADDR_B (zero),
  1563. RADDR_1 (scratcha),
  1564. }/*-------------------------< DATA_OVRUN1 >----------------------*/,{
  1565. /*
  1566. * The target may want to transfer too much data.
  1567. *
  1568. * If phase is DATA OUT write 1 byte and count it.
  1569. */
  1570. SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
  1571. 16,
  1572. SCR_CHMOV_ABS (1) ^ SCR_DATA_OUT,
  1573. HADDR_1 (scratch),
  1574. SCR_JUMP,
  1575. PADDR_B (data_ovrun2),
  1576. /*
  1577. * If WSR is set, clear this condition, and
  1578. * count this byte.
  1579. */
  1580. SCR_FROM_REG (scntl2),
  1581. 0,
  1582. SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
  1583. 16,
  1584. SCR_REG_REG (scntl2, SCR_OR, WSR),
  1585. 0,
  1586. SCR_JUMP,
  1587. PADDR_B (data_ovrun2),
  1588. /*
  1589. * Finally check against DATA IN phase.
  1590. * Signal data overrun to the C code
  1591. * and jump to dispatcher if not so.
  1592. * Read 1 byte otherwise and count it.
  1593. */
  1594. SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_IN)),
  1595. 16,
  1596. SCR_INT,
  1597. SIR_DATA_OVERRUN,
  1598. SCR_JUMP,
  1599. PADDR_A (dispatch),
  1600. SCR_CHMOV_ABS (1) ^ SCR_DATA_IN,
  1601. HADDR_1 (scratch),
  1602. }/*-------------------------< DATA_OVRUN2 >----------------------*/,{
  1603. /*
  1604. * Count this byte.
  1605. * This will allow to return a negative
  1606. * residual to user.
  1607. */
  1608. SCR_REG_REG (scratcha, SCR_ADD, 0x01),
  1609. 0,
  1610. SCR_REG_REG (scratcha1, SCR_ADDC, 0),
  1611. 0,
  1612. SCR_REG_REG (scratcha2, SCR_ADDC, 0),
  1613. 0,
  1614. /*
  1615. * .. and repeat as required.
  1616. */
  1617. SCR_JUMP,
  1618. PADDR_B (data_ovrun1),
  1619. }/*-------------------------< ABORT_RESEL >----------------------*/,{
  1620. SCR_SET (SCR_ATN),
  1621. 0,
  1622. SCR_CLR (SCR_ACK),
  1623. 0,
  1624. /*
  1625. * send the abort/abortag/reset message
  1626. * we expect an immediate disconnect
  1627. */
  1628. SCR_REG_REG (scntl2, SCR_AND, 0x7f),
  1629. 0,
  1630. SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
  1631. HADDR_1 (msgout),
  1632. SCR_CLR (SCR_ACK|SCR_ATN),
  1633. 0,
  1634. SCR_WAIT_DISC,
  1635. 0,
  1636. SCR_INT,
  1637. SIR_RESEL_ABORTED,
  1638. SCR_JUMP,
  1639. PADDR_A (start),
  1640. }/*-------------------------< RESEND_IDENT >---------------------*/,{
  1641. /*
  1642. * The target stays in MSG OUT phase after having acked
  1643. * Identify [+ Tag [+ Extended message ]]. Targets shall
  1644. * behave this way on parity error.
  1645. * We must send it again all the messages.
  1646. */
  1647. SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */
  1648. 0, /* 1rst ACK = 90 ns. Hope the chip isn't too fast */
  1649. SCR_JUMP,
  1650. PADDR_A (send_ident),
  1651. }/*-------------------------< IDENT_BREAK >----------------------*/,{
  1652. SCR_CLR (SCR_ATN),
  1653. 0,
  1654. SCR_JUMP,
  1655. PADDR_A (select2),
  1656. }/*-------------------------< IDENT_BREAK_ATN >------------------*/,{
  1657. SCR_SET (SCR_ATN),
  1658. 0,
  1659. SCR_JUMP,
  1660. PADDR_A (select2),
  1661. }/*-------------------------< SDATA_IN >-------------------------*/,{
  1662. SCR_CHMOV_TBL ^ SCR_DATA_IN,
  1663. offsetof (struct sym_dsb, sense),
  1664. SCR_CALL,
  1665. PADDR_A (datai_done),
  1666. SCR_JUMP,
  1667. PADDR_B (data_ovrun),
  1668. }/*-------------------------< RESEL_BAD_LUN >--------------------*/,{
  1669. /*
  1670. * Message is an IDENTIFY, but lun is unknown.
  1671. * Signal problem to C code for logging the event.
  1672. * Send a M_ABORT to clear all pending tasks.
  1673. */
  1674. SCR_INT,
  1675. SIR_RESEL_BAD_LUN,
  1676. SCR_JUMP,
  1677. PADDR_B (abort_resel),
  1678. }/*-------------------------< BAD_I_T_L >------------------------*/,{
  1679. /*
  1680. * We donnot have a task for that I_T_L.
  1681. * Signal problem to C code for logging the event.
  1682. * Send a M_ABORT message.
  1683. */
  1684. SCR_INT,
  1685. SIR_RESEL_BAD_I_T_L,
  1686. SCR_JUMP,
  1687. PADDR_B (abort_resel),
  1688. }/*-------------------------< BAD_I_T_L_Q >----------------------*/,{
  1689. /*
  1690. * We donnot have a task that matches the tag.
  1691. * Signal problem to C code for logging the event.
  1692. * Send a M_ABORTTAG message.
  1693. */
  1694. SCR_INT,
  1695. SIR_RESEL_BAD_I_T_L_Q,
  1696. SCR_JUMP,
  1697. PADDR_B (abort_resel),
  1698. }/*-------------------------< BAD_STATUS >-----------------------*/,{
  1699. /*
  1700. * Anything different from INTERMEDIATE
  1701. * CONDITION MET should be a bad SCSI status,
  1702. * given that GOOD status has already been tested.
  1703. * Call the C code.
  1704. */
  1705. SCR_COPY (4),
  1706. PADDR_B (startpos),
  1707. RADDR_1 (scratcha),
  1708. SCR_INT ^ IFFALSE (DATA (S_COND_MET)),
  1709. SIR_BAD_SCSI_STATUS,
  1710. SCR_RETURN,
  1711. 0,
  1712. }/*-------------------------< WSR_MA_HELPER >--------------------*/,{
  1713. /*
  1714. * Helper for the C code when WSR bit is set.
  1715. * Perform the move of the residual byte.
  1716. */
  1717. SCR_CHMOV_TBL ^ SCR_DATA_IN,
  1718. offsetof (struct sym_ccb, phys.wresid),
  1719. SCR_JUMP,
  1720. PADDR_A (dispatch),
  1721. }/*-------------------------< ZERO >-----------------------------*/,{
  1722. SCR_DATA_ZERO,
  1723. }/*-------------------------< SCRATCH >--------------------------*/,{
  1724. SCR_DATA_ZERO, /* MUST BE BEFORE SCRATCH1 */
  1725. }/*-------------------------< SCRATCH1 >-------------------------*/,{
  1726. SCR_DATA_ZERO,
  1727. }/*-------------------------< PREV_DONE >------------------------*/,{
  1728. SCR_DATA_ZERO, /* MUST BE BEFORE DONE_POS ! */
  1729. }/*-------------------------< DONE_POS >-------------------------*/,{
  1730. SCR_DATA_ZERO,
  1731. }/*-------------------------< NEXTJOB >--------------------------*/,{
  1732. SCR_DATA_ZERO, /* MUST BE BEFORE STARTPOS ! */
  1733. }/*-------------------------< STARTPOS >-------------------------*/,{
  1734. SCR_DATA_ZERO,
  1735. }/*-------------------------< TARGTBL >--------------------------*/,{
  1736. SCR_DATA_ZERO,
  1737. }/*--------------------------<>----------------------------------*/
  1738. };
  1739. static struct SYM_FWZ_SCR SYM_FWZ_SCR = {
  1740. /*-------------------------< SNOOPTEST >------------------------*/{
  1741. /*
  1742. * Read the variable.
  1743. */
  1744. SCR_COPY (4),
  1745. HADDR_1 (scratch),
  1746. RADDR_1 (scratcha),
  1747. /*
  1748. * Write the variable.
  1749. */
  1750. SCR_COPY (4),
  1751. RADDR_1 (temp),
  1752. HADDR_1 (scratch),
  1753. /*
  1754. * Read back the variable.
  1755. */
  1756. SCR_COPY (4),
  1757. HADDR_1 (scratch),
  1758. RADDR_1 (temp),
  1759. }/*-------------------------< SNOOPEND >-------------------------*/,{
  1760. /*
  1761. * And stop.
  1762. */
  1763. SCR_INT,
  1764. 99,
  1765. }/*--------------------------<>----------------------------------*/
  1766. };