pmcraid.c 163 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
  4. *
  5. * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
  6. * PMC-Sierra Inc
  7. *
  8. * Copyright (C) 2008, 2009 PMC Sierra Inc
  9. */
  10. #include <linux/fs.h>
  11. #include <linux/init.h>
  12. #include <linux/types.h>
  13. #include <linux/errno.h>
  14. #include <linux/kernel.h>
  15. #include <linux/ioport.h>
  16. #include <linux/delay.h>
  17. #include <linux/pci.h>
  18. #include <linux/wait.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/sched.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/blkdev.h>
  23. #include <linux/firmware.h>
  24. #include <linux/module.h>
  25. #include <linux/moduleparam.h>
  26. #include <linux/hdreg.h>
  27. #include <linux/io.h>
  28. #include <linux/slab.h>
  29. #include <asm/irq.h>
  30. #include <asm/processor.h>
  31. #include <linux/libata.h>
  32. #include <linux/mutex.h>
  33. #include <linux/ktime.h>
  34. #include <scsi/scsi.h>
  35. #include <scsi/scsi_host.h>
  36. #include <scsi/scsi_device.h>
  37. #include <scsi/scsi_tcq.h>
  38. #include <scsi/scsi_eh.h>
  39. #include <scsi/scsi_cmnd.h>
  40. #include <scsi/scsicam.h>
  41. #include "pmcraid.h"
  42. /*
  43. * Module configuration parameters
  44. */
  45. static unsigned int pmcraid_debug_log;
  46. static unsigned int pmcraid_disable_aen;
  47. static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
  48. static unsigned int pmcraid_enable_msix;
  49. /*
  50. * Data structures to support multiple adapters by the LLD.
  51. * pmcraid_adapter_count - count of configured adapters
  52. */
  53. static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
  54. /*
  55. * Supporting user-level control interface through IOCTL commands.
  56. * pmcraid_major - major number to use
  57. * pmcraid_minor - minor number(s) to use
  58. */
  59. static unsigned int pmcraid_major;
  60. static struct class *pmcraid_class;
  61. static DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
  62. /*
  63. * Module parameters
  64. */
  65. MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
  66. MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
  67. MODULE_LICENSE("GPL");
  68. MODULE_VERSION(PMCRAID_DRIVER_VERSION);
  69. module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
  70. MODULE_PARM_DESC(log_level,
  71. "Enables firmware error code logging, default :1 high-severity"
  72. " errors, 2: all errors including high-severity errors,"
  73. " 0: disables logging");
  74. module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
  75. MODULE_PARM_DESC(debug,
  76. "Enable driver verbose message logging. Set 1 to enable."
  77. "(default: 0)");
  78. module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
  79. MODULE_PARM_DESC(disable_aen,
  80. "Disable driver aen notifications to apps. Set 1 to disable."
  81. "(default: 0)");
  82. /* chip specific constants for PMC MaxRAID controllers (same for
  83. * 0x5220 and 0x8010
  84. */
  85. static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
  86. {
  87. .ioastatus = 0x0,
  88. .ioarrin = 0x00040,
  89. .mailbox = 0x7FC30,
  90. .global_intr_mask = 0x00034,
  91. .ioa_host_intr = 0x0009C,
  92. .ioa_host_intr_clr = 0x000A0,
  93. .ioa_host_msix_intr = 0x7FC40,
  94. .ioa_host_mask = 0x7FC28,
  95. .ioa_host_mask_clr = 0x7FC28,
  96. .host_ioa_intr = 0x00020,
  97. .host_ioa_intr_clr = 0x00020,
  98. .transop_timeout = 300
  99. }
  100. };
  101. /*
  102. * PCI device ids supported by pmcraid driver
  103. */
  104. static struct pci_device_id pmcraid_pci_table[] = {
  105. { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
  106. 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
  107. },
  108. {}
  109. };
  110. MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
  111. /**
  112. * pmcraid_slave_alloc - Prepare for commands to a device
  113. * @scsi_dev: scsi device struct
  114. *
  115. * This function is called by mid-layer prior to sending any command to the new
  116. * device. Stores resource entry details of the device in scsi_device struct.
  117. * Queuecommand uses the resource handle and other details to fill up IOARCB
  118. * while sending commands to the device.
  119. *
  120. * Return value:
  121. * 0 on success / -ENXIO if device does not exist
  122. */
  123. static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
  124. {
  125. struct pmcraid_resource_entry *temp, *res = NULL;
  126. struct pmcraid_instance *pinstance;
  127. u8 target, bus, lun;
  128. unsigned long lock_flags;
  129. int rc = -ENXIO;
  130. u16 fw_version;
  131. pinstance = shost_priv(scsi_dev->host);
  132. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  133. /* Driver exposes VSET and GSCSI resources only; all other device types
  134. * are not exposed. Resource list is synchronized using resource lock
  135. * so any traversal or modifications to the list should be done inside
  136. * this lock
  137. */
  138. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  139. list_for_each_entry(temp, &pinstance->used_res_q, queue) {
  140. /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */
  141. if (RES_IS_VSET(temp->cfg_entry)) {
  142. if (fw_version <= PMCRAID_FW_VERSION_1)
  143. target = temp->cfg_entry.unique_flags1;
  144. else
  145. target = le16_to_cpu(temp->cfg_entry.array_id) & 0xFF;
  146. if (target > PMCRAID_MAX_VSET_TARGETS)
  147. continue;
  148. bus = PMCRAID_VSET_BUS_ID;
  149. lun = 0;
  150. } else if (RES_IS_GSCSI(temp->cfg_entry)) {
  151. target = RES_TARGET(temp->cfg_entry.resource_address);
  152. bus = PMCRAID_PHYS_BUS_ID;
  153. lun = RES_LUN(temp->cfg_entry.resource_address);
  154. } else {
  155. continue;
  156. }
  157. if (bus == scsi_dev->channel &&
  158. target == scsi_dev->id &&
  159. lun == scsi_dev->lun) {
  160. res = temp;
  161. break;
  162. }
  163. }
  164. if (res) {
  165. res->scsi_dev = scsi_dev;
  166. scsi_dev->hostdata = res;
  167. res->change_detected = 0;
  168. atomic_set(&res->read_failures, 0);
  169. atomic_set(&res->write_failures, 0);
  170. rc = 0;
  171. }
  172. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  173. return rc;
  174. }
  175. /**
  176. * pmcraid_slave_configure - Configures a SCSI device
  177. * @scsi_dev: scsi device struct
  178. *
  179. * This function is executed by SCSI mid layer just after a device is first
  180. * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the
  181. * timeout value (default 30s) will be over-written to a higher value (60s)
  182. * and max_sectors value will be over-written to 512. It also sets queue depth
  183. * to host->cmd_per_lun value
  184. *
  185. * Return value:
  186. * 0 on success
  187. */
  188. static int pmcraid_slave_configure(struct scsi_device *scsi_dev)
  189. {
  190. struct pmcraid_resource_entry *res = scsi_dev->hostdata;
  191. if (!res)
  192. return 0;
  193. /* LLD exposes VSETs and Enclosure devices only */
  194. if (RES_IS_GSCSI(res->cfg_entry) &&
  195. scsi_dev->type != TYPE_ENCLOSURE)
  196. return -ENXIO;
  197. pmcraid_info("configuring %x:%x:%x:%x\n",
  198. scsi_dev->host->unique_id,
  199. scsi_dev->channel,
  200. scsi_dev->id,
  201. (u8)scsi_dev->lun);
  202. if (RES_IS_GSCSI(res->cfg_entry)) {
  203. scsi_dev->allow_restart = 1;
  204. } else if (RES_IS_VSET(res->cfg_entry)) {
  205. scsi_dev->allow_restart = 1;
  206. blk_queue_rq_timeout(scsi_dev->request_queue,
  207. PMCRAID_VSET_IO_TIMEOUT);
  208. blk_queue_max_hw_sectors(scsi_dev->request_queue,
  209. PMCRAID_VSET_MAX_SECTORS);
  210. }
  211. /*
  212. * We never want to report TCQ support for these types of devices.
  213. */
  214. if (!RES_IS_GSCSI(res->cfg_entry) && !RES_IS_VSET(res->cfg_entry))
  215. scsi_dev->tagged_supported = 0;
  216. return 0;
  217. }
  218. /**
  219. * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it
  220. *
  221. * @scsi_dev: scsi device struct
  222. *
  223. * This is called by mid-layer before removing a device. Pointer assignments
  224. * done in pmcraid_slave_alloc will be reset to NULL here.
  225. *
  226. * Return value
  227. * none
  228. */
  229. static void pmcraid_slave_destroy(struct scsi_device *scsi_dev)
  230. {
  231. struct pmcraid_resource_entry *res;
  232. res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
  233. if (res)
  234. res->scsi_dev = NULL;
  235. scsi_dev->hostdata = NULL;
  236. }
  237. /**
  238. * pmcraid_change_queue_depth - Change the device's queue depth
  239. * @scsi_dev: scsi device struct
  240. * @depth: depth to set
  241. *
  242. * Return value
  243. * actual depth set
  244. */
  245. static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth)
  246. {
  247. if (depth > PMCRAID_MAX_CMD_PER_LUN)
  248. depth = PMCRAID_MAX_CMD_PER_LUN;
  249. return scsi_change_queue_depth(scsi_dev, depth);
  250. }
  251. /**
  252. * pmcraid_init_cmdblk - initializes a command block
  253. *
  254. * @cmd: pointer to struct pmcraid_cmd to be initialized
  255. * @index: if >=0 first time initialization; otherwise reinitialization
  256. *
  257. * Return Value
  258. * None
  259. */
  260. static void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
  261. {
  262. struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
  263. dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
  264. if (index >= 0) {
  265. /* first time initialization (called from probe) */
  266. u32 ioasa_offset =
  267. offsetof(struct pmcraid_control_block, ioasa);
  268. cmd->index = index;
  269. ioarcb->response_handle = cpu_to_le32(index << 2);
  270. ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
  271. ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
  272. ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
  273. } else {
  274. /* re-initialization of various lengths, called once command is
  275. * processed by IOA
  276. */
  277. memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
  278. ioarcb->hrrq_id = 0;
  279. ioarcb->request_flags0 = 0;
  280. ioarcb->request_flags1 = 0;
  281. ioarcb->cmd_timeout = 0;
  282. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
  283. ioarcb->ioadl_bus_addr = 0;
  284. ioarcb->ioadl_length = 0;
  285. ioarcb->data_transfer_length = 0;
  286. ioarcb->add_cmd_param_length = 0;
  287. ioarcb->add_cmd_param_offset = 0;
  288. cmd->ioa_cb->ioasa.ioasc = 0;
  289. cmd->ioa_cb->ioasa.residual_data_length = 0;
  290. cmd->time_left = 0;
  291. }
  292. cmd->cmd_done = NULL;
  293. cmd->scsi_cmd = NULL;
  294. cmd->release = 0;
  295. cmd->completion_req = 0;
  296. cmd->sense_buffer = NULL;
  297. cmd->sense_buffer_dma = 0;
  298. cmd->dma_handle = 0;
  299. timer_setup(&cmd->timer, NULL, 0);
  300. }
  301. /**
  302. * pmcraid_reinit_cmdblk - reinitialize a command block
  303. *
  304. * @cmd: pointer to struct pmcraid_cmd to be reinitialized
  305. *
  306. * Return Value
  307. * None
  308. */
  309. static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
  310. {
  311. pmcraid_init_cmdblk(cmd, -1);
  312. }
  313. /**
  314. * pmcraid_get_free_cmd - get a free cmd block from command block pool
  315. * @pinstance: adapter instance structure
  316. *
  317. * Return Value:
  318. * returns pointer to cmd block or NULL if no blocks are available
  319. */
  320. static struct pmcraid_cmd *pmcraid_get_free_cmd(
  321. struct pmcraid_instance *pinstance
  322. )
  323. {
  324. struct pmcraid_cmd *cmd = NULL;
  325. unsigned long lock_flags;
  326. /* free cmd block list is protected by free_pool_lock */
  327. spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
  328. if (!list_empty(&pinstance->free_cmd_pool)) {
  329. cmd = list_entry(pinstance->free_cmd_pool.next,
  330. struct pmcraid_cmd, free_list);
  331. list_del(&cmd->free_list);
  332. }
  333. spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
  334. /* Initialize the command block before giving it the caller */
  335. if (cmd != NULL)
  336. pmcraid_reinit_cmdblk(cmd);
  337. return cmd;
  338. }
  339. /**
  340. * pmcraid_return_cmd - return a completed command block back into free pool
  341. * @cmd: pointer to the command block
  342. *
  343. * Return Value:
  344. * nothing
  345. */
  346. static void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
  347. {
  348. struct pmcraid_instance *pinstance = cmd->drv_inst;
  349. unsigned long lock_flags;
  350. spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
  351. list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
  352. spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
  353. }
  354. /**
  355. * pmcraid_read_interrupts - reads IOA interrupts
  356. *
  357. * @pinstance: pointer to adapter instance structure
  358. *
  359. * Return value
  360. * interrupts read from IOA
  361. */
  362. static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
  363. {
  364. return (pinstance->interrupt_mode) ?
  365. ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
  366. ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  367. }
  368. /**
  369. * pmcraid_disable_interrupts - Masks and clears all specified interrupts
  370. *
  371. * @pinstance: pointer to per adapter instance structure
  372. * @intrs: interrupts to disable
  373. *
  374. * Return Value
  375. * None
  376. */
  377. static void pmcraid_disable_interrupts(
  378. struct pmcraid_instance *pinstance,
  379. u32 intrs
  380. )
  381. {
  382. u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  383. u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
  384. iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
  385. iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
  386. ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  387. if (!pinstance->interrupt_mode) {
  388. iowrite32(intrs,
  389. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  390. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  391. }
  392. }
  393. /**
  394. * pmcraid_enable_interrupts - Enables specified interrupts
  395. *
  396. * @pinstance: pointer to per adapter instance structure
  397. * @intr: interrupts to enable
  398. *
  399. * Return Value
  400. * None
  401. */
  402. static void pmcraid_enable_interrupts(
  403. struct pmcraid_instance *pinstance,
  404. u32 intrs
  405. )
  406. {
  407. u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  408. u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
  409. iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
  410. if (!pinstance->interrupt_mode) {
  411. iowrite32(~intrs,
  412. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  413. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  414. }
  415. pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
  416. ioread32(pinstance->int_regs.global_interrupt_mask_reg),
  417. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
  418. }
  419. /**
  420. * pmcraid_clr_trans_op - clear trans to op interrupt
  421. *
  422. * @pinstance: pointer to per adapter instance structure
  423. *
  424. * Return Value
  425. * None
  426. */
  427. static void pmcraid_clr_trans_op(
  428. struct pmcraid_instance *pinstance
  429. )
  430. {
  431. unsigned long lock_flags;
  432. if (!pinstance->interrupt_mode) {
  433. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  434. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  435. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  436. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  437. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  438. ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
  439. }
  440. if (pinstance->reset_cmd != NULL) {
  441. del_timer(&pinstance->reset_cmd->timer);
  442. spin_lock_irqsave(
  443. pinstance->host->host_lock, lock_flags);
  444. pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
  445. spin_unlock_irqrestore(
  446. pinstance->host->host_lock, lock_flags);
  447. }
  448. }
  449. /**
  450. * pmcraid_reset_type - Determine the required reset type
  451. * @pinstance: pointer to adapter instance structure
  452. *
  453. * IOA requires hard reset if any of the following conditions is true.
  454. * 1. If HRRQ valid interrupt is not masked
  455. * 2. IOA reset alert doorbell is set
  456. * 3. If there are any error interrupts
  457. */
  458. static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
  459. {
  460. u32 mask;
  461. u32 intrs;
  462. u32 alerts;
  463. mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  464. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  465. alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  466. if ((mask & INTRS_HRRQ_VALID) == 0 ||
  467. (alerts & DOORBELL_IOA_RESET_ALERT) ||
  468. (intrs & PMCRAID_ERROR_INTERRUPTS)) {
  469. pmcraid_info("IOA requires hard reset\n");
  470. pinstance->ioa_hard_reset = 1;
  471. }
  472. /* If unit check is active, trigger the dump */
  473. if (intrs & INTRS_IOA_UNIT_CHECK)
  474. pinstance->ioa_unit_check = 1;
  475. }
  476. /**
  477. * pmcraid_bist_done - completion function for PCI BIST
  478. * @cmd: pointer to reset command
  479. * Return Value
  480. * none
  481. */
  482. static void pmcraid_ioa_reset(struct pmcraid_cmd *);
  483. static void pmcraid_bist_done(struct timer_list *t)
  484. {
  485. struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
  486. struct pmcraid_instance *pinstance = cmd->drv_inst;
  487. unsigned long lock_flags;
  488. int rc;
  489. u16 pci_reg;
  490. rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
  491. /* If PCI config space can't be accessed wait for another two secs */
  492. if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
  493. cmd->time_left > 0) {
  494. pmcraid_info("BIST not complete, waiting another 2 secs\n");
  495. cmd->timer.expires = jiffies + cmd->time_left;
  496. cmd->time_left = 0;
  497. add_timer(&cmd->timer);
  498. } else {
  499. cmd->time_left = 0;
  500. pmcraid_info("BIST is complete, proceeding with reset\n");
  501. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  502. pmcraid_ioa_reset(cmd);
  503. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  504. }
  505. }
  506. /**
  507. * pmcraid_start_bist - starts BIST
  508. * @cmd: pointer to reset cmd
  509. * Return Value
  510. * none
  511. */
  512. static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
  513. {
  514. struct pmcraid_instance *pinstance = cmd->drv_inst;
  515. u32 doorbells, intrs;
  516. /* proceed with bist and wait for 2 seconds */
  517. iowrite32(DOORBELL_IOA_START_BIST,
  518. pinstance->int_regs.host_ioa_interrupt_reg);
  519. doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  520. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  521. pmcraid_info("doorbells after start bist: %x intrs: %x\n",
  522. doorbells, intrs);
  523. cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
  524. cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
  525. cmd->timer.function = pmcraid_bist_done;
  526. add_timer(&cmd->timer);
  527. }
  528. /**
  529. * pmcraid_reset_alert_done - completion routine for reset_alert
  530. * @cmd: pointer to command block used in reset sequence
  531. * Return value
  532. * None
  533. */
  534. static void pmcraid_reset_alert_done(struct timer_list *t)
  535. {
  536. struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
  537. struct pmcraid_instance *pinstance = cmd->drv_inst;
  538. u32 status = ioread32(pinstance->ioa_status);
  539. unsigned long lock_flags;
  540. /* if the critical operation in progress bit is set or the wait times
  541. * out, invoke reset engine to proceed with hard reset. If there is
  542. * some more time to wait, restart the timer
  543. */
  544. if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
  545. cmd->time_left <= 0) {
  546. pmcraid_info("critical op is reset proceeding with reset\n");
  547. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  548. pmcraid_ioa_reset(cmd);
  549. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  550. } else {
  551. pmcraid_info("critical op is not yet reset waiting again\n");
  552. /* restart timer if some more time is available to wait */
  553. cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  554. cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  555. cmd->timer.function = pmcraid_reset_alert_done;
  556. add_timer(&cmd->timer);
  557. }
  558. }
  559. /**
  560. * pmcraid_reset_alert - alerts IOA for a possible reset
  561. * @cmd : command block to be used for reset sequence.
  562. *
  563. * Return Value
  564. * returns 0 if pci config-space is accessible and RESET_DOORBELL is
  565. * successfully written to IOA. Returns non-zero in case pci_config_space
  566. * is not accessible
  567. */
  568. static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32);
  569. static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
  570. {
  571. struct pmcraid_instance *pinstance = cmd->drv_inst;
  572. u32 doorbells;
  573. int rc;
  574. u16 pci_reg;
  575. /* If we are able to access IOA PCI config space, alert IOA that we are
  576. * going to reset it soon. This enables IOA to preserv persistent error
  577. * data if any. In case memory space is not accessible, proceed with
  578. * BIST or slot_reset
  579. */
  580. rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
  581. if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
  582. /* wait for IOA permission i.e until CRITICAL_OPERATION bit is
  583. * reset IOA doesn't generate any interrupts when CRITICAL
  584. * OPERATION bit is reset. A timer is started to wait for this
  585. * bit to be reset.
  586. */
  587. cmd->time_left = PMCRAID_RESET_TIMEOUT;
  588. cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  589. cmd->timer.function = pmcraid_reset_alert_done;
  590. add_timer(&cmd->timer);
  591. iowrite32(DOORBELL_IOA_RESET_ALERT,
  592. pinstance->int_regs.host_ioa_interrupt_reg);
  593. doorbells =
  594. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  595. pmcraid_info("doorbells after reset alert: %x\n", doorbells);
  596. } else {
  597. pmcraid_info("PCI config is not accessible starting BIST\n");
  598. pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
  599. pmcraid_start_bist(cmd);
  600. }
  601. }
  602. /**
  603. * pmcraid_timeout_handler - Timeout handler for internally generated ops
  604. *
  605. * @cmd : pointer to command structure, that got timedout
  606. *
  607. * This function blocks host requests and initiates an adapter reset.
  608. *
  609. * Return value:
  610. * None
  611. */
  612. static void pmcraid_timeout_handler(struct timer_list *t)
  613. {
  614. struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
  615. struct pmcraid_instance *pinstance = cmd->drv_inst;
  616. unsigned long lock_flags;
  617. dev_info(&pinstance->pdev->dev,
  618. "Adapter being reset due to cmd(CDB[0] = %x) timeout\n",
  619. cmd->ioa_cb->ioarcb.cdb[0]);
  620. /* Command timeouts result in hard reset sequence. The command that got
  621. * timed out may be the one used as part of reset sequence. In this
  622. * case restart reset sequence using the same command block even if
  623. * reset is in progress. Otherwise fail this command and get a free
  624. * command block to restart the reset sequence.
  625. */
  626. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  627. if (!pinstance->ioa_reset_in_progress) {
  628. pinstance->ioa_reset_attempts = 0;
  629. cmd = pmcraid_get_free_cmd(pinstance);
  630. /* If we are out of command blocks, just return here itself.
  631. * Some other command's timeout handler can do the reset job
  632. */
  633. if (cmd == NULL) {
  634. spin_unlock_irqrestore(pinstance->host->host_lock,
  635. lock_flags);
  636. pmcraid_err("no free cmnd block for timeout handler\n");
  637. return;
  638. }
  639. pinstance->reset_cmd = cmd;
  640. pinstance->ioa_reset_in_progress = 1;
  641. } else {
  642. pmcraid_info("reset is already in progress\n");
  643. if (pinstance->reset_cmd != cmd) {
  644. /* This command should have been given to IOA, this
  645. * command will be completed by fail_outstanding_cmds
  646. * anyway
  647. */
  648. pmcraid_err("cmd is pending but reset in progress\n");
  649. }
  650. /* If this command was being used as part of the reset
  651. * sequence, set cmd_done pointer to pmcraid_ioa_reset. This
  652. * causes fail_outstanding_commands not to return the command
  653. * block back to free pool
  654. */
  655. if (cmd == pinstance->reset_cmd)
  656. cmd->cmd_done = pmcraid_ioa_reset;
  657. }
  658. /* Notify apps of important IOA bringup/bringdown sequences */
  659. if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START &&
  660. pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START)
  661. pmcraid_notify_ioastate(pinstance,
  662. PMC_DEVICE_EVENT_RESET_START);
  663. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  664. scsi_block_requests(pinstance->host);
  665. pmcraid_reset_alert(cmd);
  666. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  667. }
  668. /**
  669. * pmcraid_internal_done - completion routine for internally generated cmds
  670. *
  671. * @cmd: command that got response from IOA
  672. *
  673. * Return Value:
  674. * none
  675. */
  676. static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
  677. {
  678. pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
  679. cmd->ioa_cb->ioarcb.cdb[0],
  680. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  681. /* Some of the internal commands are sent with callers blocking for the
  682. * response. Same will be indicated as part of cmd->completion_req
  683. * field. Response path needs to wake up any waiters waiting for cmd
  684. * completion if this flag is set.
  685. */
  686. if (cmd->completion_req) {
  687. cmd->completion_req = 0;
  688. complete(&cmd->wait_for_completion);
  689. }
  690. /* most of the internal commands are completed by caller itself, so
  691. * no need to return the command block back to free pool until we are
  692. * required to do so (e.g once done with initialization).
  693. */
  694. if (cmd->release) {
  695. cmd->release = 0;
  696. pmcraid_return_cmd(cmd);
  697. }
  698. }
  699. /**
  700. * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization
  701. *
  702. * @cmd: command that got response from IOA
  703. *
  704. * This routine is called after driver re-reads configuration table due to a
  705. * lost CCN. It returns the command block back to free pool and schedules
  706. * worker thread to add/delete devices into the system.
  707. *
  708. * Return Value:
  709. * none
  710. */
  711. static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
  712. {
  713. pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
  714. cmd->ioa_cb->ioarcb.cdb[0],
  715. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  716. if (cmd->release) {
  717. cmd->release = 0;
  718. pmcraid_return_cmd(cmd);
  719. }
  720. pmcraid_info("scheduling worker for config table reinitialization\n");
  721. schedule_work(&cmd->drv_inst->worker_q);
  722. }
  723. /**
  724. * pmcraid_erp_done - Process completion of SCSI error response from device
  725. * @cmd: pmcraid_command
  726. *
  727. * This function copies the sense buffer into the scsi_cmd struct and completes
  728. * scsi_cmd by calling scsi_done function.
  729. *
  730. * Return value:
  731. * none
  732. */
  733. static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
  734. {
  735. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  736. struct pmcraid_instance *pinstance = cmd->drv_inst;
  737. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  738. if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
  739. scsi_cmd->result |= (DID_ERROR << 16);
  740. scmd_printk(KERN_INFO, scsi_cmd,
  741. "command CDB[0] = %x failed with IOASC: 0x%08X\n",
  742. cmd->ioa_cb->ioarcb.cdb[0], ioasc);
  743. }
  744. if (cmd->sense_buffer) {
  745. dma_unmap_single(&pinstance->pdev->dev, cmd->sense_buffer_dma,
  746. SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
  747. cmd->sense_buffer = NULL;
  748. cmd->sense_buffer_dma = 0;
  749. }
  750. scsi_dma_unmap(scsi_cmd);
  751. pmcraid_return_cmd(cmd);
  752. scsi_cmd->scsi_done(scsi_cmd);
  753. }
  754. /**
  755. * pmcraid_fire_command - sends an IOA command to adapter
  756. *
  757. * This function adds the given block into pending command list
  758. * and returns without waiting
  759. *
  760. * @cmd : command to be sent to the device
  761. *
  762. * Return Value
  763. * None
  764. */
  765. static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
  766. {
  767. struct pmcraid_instance *pinstance = cmd->drv_inst;
  768. unsigned long lock_flags;
  769. /* Add this command block to pending cmd pool. We do this prior to
  770. * writting IOARCB to ioarrin because IOA might complete the command
  771. * by the time we are about to add it to the list. Response handler
  772. * (isr/tasklet) looks for cmd block in the pending pending list.
  773. */
  774. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  775. list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
  776. spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
  777. atomic_inc(&pinstance->outstanding_cmds);
  778. /* driver writes lower 32-bit value of IOARCB address only */
  779. mb();
  780. iowrite32(le64_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), pinstance->ioarrin);
  781. }
  782. /**
  783. * pmcraid_send_cmd - fires a command to IOA
  784. *
  785. * This function also sets up timeout function, and command completion
  786. * function
  787. *
  788. * @cmd: pointer to the command block to be fired to IOA
  789. * @cmd_done: command completion function, called once IOA responds
  790. * @timeout: timeout to wait for this command completion
  791. * @timeout_func: timeout handler
  792. *
  793. * Return value
  794. * none
  795. */
  796. static void pmcraid_send_cmd(
  797. struct pmcraid_cmd *cmd,
  798. void (*cmd_done) (struct pmcraid_cmd *),
  799. unsigned long timeout,
  800. void (*timeout_func) (struct timer_list *)
  801. )
  802. {
  803. /* initialize done function */
  804. cmd->cmd_done = cmd_done;
  805. if (timeout_func) {
  806. /* setup timeout handler */
  807. cmd->timer.expires = jiffies + timeout;
  808. cmd->timer.function = timeout_func;
  809. add_timer(&cmd->timer);
  810. }
  811. /* fire the command to IOA */
  812. _pmcraid_fire_command(cmd);
  813. }
  814. /**
  815. * pmcraid_ioa_shutdown_done - completion function for IOA shutdown command
  816. * @cmd: pointer to the command block used for sending IOA shutdown command
  817. *
  818. * Return value
  819. * None
  820. */
  821. static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd)
  822. {
  823. struct pmcraid_instance *pinstance = cmd->drv_inst;
  824. unsigned long lock_flags;
  825. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  826. pmcraid_ioa_reset(cmd);
  827. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  828. }
  829. /**
  830. * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa
  831. *
  832. * @cmd: pointer to the command block used as part of reset sequence
  833. *
  834. * Return Value
  835. * None
  836. */
  837. static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
  838. {
  839. pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
  840. cmd->ioa_cb->ioarcb.cdb[0],
  841. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  842. /* Note that commands sent during reset require next command to be sent
  843. * to IOA. Hence reinit the done function as well as timeout function
  844. */
  845. pmcraid_reinit_cmdblk(cmd);
  846. cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
  847. cmd->ioa_cb->ioarcb.resource_handle =
  848. cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  849. cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
  850. cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
  851. /* fire shutdown command to hardware. */
  852. pmcraid_info("firing normal shutdown command (%d) to IOA\n",
  853. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
  854. pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
  855. pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
  856. PMCRAID_SHUTDOWN_TIMEOUT,
  857. pmcraid_timeout_handler);
  858. }
  859. /**
  860. * pmcraid_get_fwversion_done - completion function for get_fwversion
  861. *
  862. * @cmd: pointer to command block used to send INQUIRY command
  863. *
  864. * Return Value
  865. * none
  866. */
  867. static void pmcraid_querycfg(struct pmcraid_cmd *);
  868. static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
  869. {
  870. struct pmcraid_instance *pinstance = cmd->drv_inst;
  871. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  872. unsigned long lock_flags;
  873. /* configuration table entry size depends on firmware version. If fw
  874. * version is not known, it is not possible to interpret IOA config
  875. * table
  876. */
  877. if (ioasc) {
  878. pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
  879. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  880. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  881. pmcraid_reset_alert(cmd);
  882. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  883. } else {
  884. pmcraid_querycfg(cmd);
  885. }
  886. }
  887. /**
  888. * pmcraid_get_fwversion - reads firmware version information
  889. *
  890. * @cmd: pointer to command block used to send INQUIRY command
  891. *
  892. * Return Value
  893. * none
  894. */
  895. static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
  896. {
  897. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  898. struct pmcraid_ioadl_desc *ioadl;
  899. struct pmcraid_instance *pinstance = cmd->drv_inst;
  900. u16 data_size = sizeof(struct pmcraid_inquiry_data);
  901. pmcraid_reinit_cmdblk(cmd);
  902. ioarcb->request_type = REQ_TYPE_SCSI;
  903. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  904. ioarcb->cdb[0] = INQUIRY;
  905. ioarcb->cdb[1] = 1;
  906. ioarcb->cdb[2] = 0xD0;
  907. ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
  908. ioarcb->cdb[4] = data_size & 0xFF;
  909. /* Since entire inquiry data it can be part of IOARCB itself
  910. */
  911. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  912. offsetof(struct pmcraid_ioarcb,
  913. add_data.u.ioadl[0]));
  914. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  915. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
  916. ioarcb->request_flags0 |= NO_LINK_DESCS;
  917. ioarcb->data_transfer_length = cpu_to_le32(data_size);
  918. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  919. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  920. ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
  921. ioadl->data_len = cpu_to_le32(data_size);
  922. pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
  923. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  924. }
  925. /**
  926. * pmcraid_identify_hrrq - registers host rrq buffers with IOA
  927. * @cmd: pointer to command block to be used for identify hrrq
  928. *
  929. * Return Value
  930. * none
  931. */
  932. static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
  933. {
  934. struct pmcraid_instance *pinstance = cmd->drv_inst;
  935. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  936. int index = cmd->hrrq_index;
  937. __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
  938. __be32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
  939. void (*done_function)(struct pmcraid_cmd *);
  940. pmcraid_reinit_cmdblk(cmd);
  941. cmd->hrrq_index = index + 1;
  942. if (cmd->hrrq_index < pinstance->num_hrrq) {
  943. done_function = pmcraid_identify_hrrq;
  944. } else {
  945. cmd->hrrq_index = 0;
  946. done_function = pmcraid_get_fwversion;
  947. }
  948. /* Initialize ioarcb */
  949. ioarcb->request_type = REQ_TYPE_IOACMD;
  950. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  951. /* initialize the hrrq number where IOA will respond to this command */
  952. ioarcb->hrrq_id = index;
  953. ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
  954. ioarcb->cdb[1] = index;
  955. /* IOA expects 64-bit pci address to be written in B.E format
  956. * (i.e cdb[2]=MSByte..cdb[9]=LSB.
  957. */
  958. pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
  959. hrrq_addr, ioarcb->ioarcb_bus_addr, index);
  960. memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
  961. memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
  962. /* Subsequent commands require HRRQ identification to be successful.
  963. * Note that this gets called even during reset from SCSI mid-layer
  964. * or tasklet
  965. */
  966. pmcraid_send_cmd(cmd, done_function,
  967. PMCRAID_INTERNAL_TIMEOUT,
  968. pmcraid_timeout_handler);
  969. }
  970. static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
  971. static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
  972. /**
  973. * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA
  974. *
  975. * @cmd: initialized command block pointer
  976. *
  977. * Return Value
  978. * none
  979. */
  980. static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
  981. {
  982. if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
  983. atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
  984. else
  985. atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
  986. pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
  987. }
  988. /**
  989. * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA
  990. *
  991. * @pinstance: pointer to adapter instance structure
  992. * @type: HCAM type
  993. *
  994. * Return Value
  995. * pointer to initialized pmcraid_cmd structure or NULL
  996. */
  997. static struct pmcraid_cmd *pmcraid_init_hcam
  998. (
  999. struct pmcraid_instance *pinstance,
  1000. u8 type
  1001. )
  1002. {
  1003. struct pmcraid_cmd *cmd;
  1004. struct pmcraid_ioarcb *ioarcb;
  1005. struct pmcraid_ioadl_desc *ioadl;
  1006. struct pmcraid_hostrcb *hcam;
  1007. void (*cmd_done) (struct pmcraid_cmd *);
  1008. dma_addr_t dma;
  1009. int rcb_size;
  1010. cmd = pmcraid_get_free_cmd(pinstance);
  1011. if (!cmd) {
  1012. pmcraid_err("no free command blocks for hcam\n");
  1013. return cmd;
  1014. }
  1015. if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
  1016. rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
  1017. cmd_done = pmcraid_process_ccn;
  1018. dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
  1019. hcam = &pinstance->ccn;
  1020. } else {
  1021. rcb_size = sizeof(struct pmcraid_hcam_ldn);
  1022. cmd_done = pmcraid_process_ldn;
  1023. dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
  1024. hcam = &pinstance->ldn;
  1025. }
  1026. /* initialize command pointer used for HCAM registration */
  1027. hcam->cmd = cmd;
  1028. ioarcb = &cmd->ioa_cb->ioarcb;
  1029. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  1030. offsetof(struct pmcraid_ioarcb,
  1031. add_data.u.ioadl[0]));
  1032. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  1033. ioadl = ioarcb->add_data.u.ioadl;
  1034. /* Initialize ioarcb */
  1035. ioarcb->request_type = REQ_TYPE_HCAM;
  1036. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  1037. ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
  1038. ioarcb->cdb[1] = type;
  1039. ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
  1040. ioarcb->cdb[8] = (rcb_size) & 0xFF;
  1041. ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
  1042. ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
  1043. ioadl[0].data_len = cpu_to_le32(rcb_size);
  1044. ioadl[0].address = cpu_to_le64(dma);
  1045. cmd->cmd_done = cmd_done;
  1046. return cmd;
  1047. }
  1048. /**
  1049. * pmcraid_send_hcam - Send an HCAM to IOA
  1050. * @pinstance: ioa config struct
  1051. * @type: HCAM type
  1052. *
  1053. * This function will send a Host Controlled Async command to IOA.
  1054. *
  1055. * Return value:
  1056. * none
  1057. */
  1058. static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
  1059. {
  1060. struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
  1061. pmcraid_send_hcam_cmd(cmd);
  1062. }
  1063. /**
  1064. * pmcraid_prepare_cancel_cmd - prepares a command block to abort another
  1065. *
  1066. * @cmd: pointer to cmd that is used as cancelling command
  1067. * @cmd_to_cancel: pointer to the command that needs to be cancelled
  1068. */
  1069. static void pmcraid_prepare_cancel_cmd(
  1070. struct pmcraid_cmd *cmd,
  1071. struct pmcraid_cmd *cmd_to_cancel
  1072. )
  1073. {
  1074. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  1075. __be64 ioarcb_addr;
  1076. /* IOARCB address of the command to be cancelled is given in
  1077. * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in
  1078. * IOARCB address are not masked.
  1079. */
  1080. ioarcb_addr = cpu_to_be64(le64_to_cpu(cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr));
  1081. /* Get the resource handle to where the command to be aborted has been
  1082. * sent.
  1083. */
  1084. ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
  1085. ioarcb->request_type = REQ_TYPE_IOACMD;
  1086. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  1087. ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
  1088. memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
  1089. }
  1090. /**
  1091. * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM
  1092. *
  1093. * @cmd: command to be used as cancelling command
  1094. * @type: HCAM type
  1095. * @cmd_done: op done function for the cancelling command
  1096. */
  1097. static void pmcraid_cancel_hcam(
  1098. struct pmcraid_cmd *cmd,
  1099. u8 type,
  1100. void (*cmd_done) (struct pmcraid_cmd *)
  1101. )
  1102. {
  1103. struct pmcraid_instance *pinstance;
  1104. struct pmcraid_hostrcb *hcam;
  1105. pinstance = cmd->drv_inst;
  1106. hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
  1107. &pinstance->ldn : &pinstance->ccn;
  1108. /* prepare for cancelling previous hcam command. If the HCAM is
  1109. * currently not pending with IOA, we would have hcam->cmd as non-null
  1110. */
  1111. if (hcam->cmd == NULL)
  1112. return;
  1113. pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
  1114. /* writing to IOARRIN must be protected by host_lock, as mid-layer
  1115. * schedule queuecommand while we are doing this
  1116. */
  1117. pmcraid_send_cmd(cmd, cmd_done,
  1118. PMCRAID_INTERNAL_TIMEOUT,
  1119. pmcraid_timeout_handler);
  1120. }
  1121. /**
  1122. * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA
  1123. *
  1124. * @cmd: command block to be used for cancelling the HCAM
  1125. */
  1126. static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
  1127. {
  1128. pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
  1129. cmd->ioa_cb->ioarcb.cdb[0],
  1130. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  1131. pmcraid_reinit_cmdblk(cmd);
  1132. pmcraid_cancel_hcam(cmd,
  1133. PMCRAID_HCAM_CODE_CONFIG_CHANGE,
  1134. pmcraid_ioa_shutdown);
  1135. }
  1136. /**
  1137. * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA
  1138. *
  1139. * @cmd: command block to be used for cancelling the HCAM
  1140. */
  1141. static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
  1142. {
  1143. pmcraid_cancel_hcam(cmd,
  1144. PMCRAID_HCAM_CODE_LOG_DATA,
  1145. pmcraid_cancel_ccn);
  1146. }
  1147. /**
  1148. * pmcraid_expose_resource - check if the resource can be exposed to OS
  1149. *
  1150. * @fw_version: firmware version code
  1151. * @cfgte: pointer to configuration table entry of the resource
  1152. *
  1153. * Return value:
  1154. * true if resource can be added to midlayer, false(0) otherwise
  1155. */
  1156. static int pmcraid_expose_resource(u16 fw_version,
  1157. struct pmcraid_config_table_entry *cfgte)
  1158. {
  1159. int retval = 0;
  1160. if (cfgte->resource_type == RES_TYPE_VSET) {
  1161. if (fw_version <= PMCRAID_FW_VERSION_1)
  1162. retval = ((cfgte->unique_flags1 & 0x80) == 0);
  1163. else
  1164. retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
  1165. (cfgte->unique_flags1 & 0x80) == 0);
  1166. } else if (cfgte->resource_type == RES_TYPE_GSCSI)
  1167. retval = (RES_BUS(cfgte->resource_address) !=
  1168. PMCRAID_VIRTUAL_ENCL_BUS_ID);
  1169. return retval;
  1170. }
  1171. /* attributes supported by pmcraid_event_family */
  1172. enum {
  1173. PMCRAID_AEN_ATTR_UNSPEC,
  1174. PMCRAID_AEN_ATTR_EVENT,
  1175. __PMCRAID_AEN_ATTR_MAX,
  1176. };
  1177. #define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
  1178. /* commands supported by pmcraid_event_family */
  1179. enum {
  1180. PMCRAID_AEN_CMD_UNSPEC,
  1181. PMCRAID_AEN_CMD_EVENT,
  1182. __PMCRAID_AEN_CMD_MAX,
  1183. };
  1184. #define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
  1185. static struct genl_multicast_group pmcraid_mcgrps[] = {
  1186. { .name = "events", /* not really used - see ID discussion below */ },
  1187. };
  1188. static struct genl_family pmcraid_event_family __ro_after_init = {
  1189. .module = THIS_MODULE,
  1190. .name = "pmcraid",
  1191. .version = 1,
  1192. .maxattr = PMCRAID_AEN_ATTR_MAX,
  1193. .mcgrps = pmcraid_mcgrps,
  1194. .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps),
  1195. };
  1196. /**
  1197. * pmcraid_netlink_init - registers pmcraid_event_family
  1198. *
  1199. * Return value:
  1200. * 0 if the pmcraid_event_family is successfully registered
  1201. * with netlink generic, non-zero otherwise
  1202. */
  1203. static int __init pmcraid_netlink_init(void)
  1204. {
  1205. int result;
  1206. result = genl_register_family(&pmcraid_event_family);
  1207. if (result)
  1208. return result;
  1209. pmcraid_info("registered NETLINK GENERIC group: %d\n",
  1210. pmcraid_event_family.id);
  1211. return result;
  1212. }
  1213. /**
  1214. * pmcraid_netlink_release - unregisters pmcraid_event_family
  1215. *
  1216. * Return value:
  1217. * none
  1218. */
  1219. static void pmcraid_netlink_release(void)
  1220. {
  1221. genl_unregister_family(&pmcraid_event_family);
  1222. }
  1223. /**
  1224. * pmcraid_notify_aen - sends event msg to user space application
  1225. * @pinstance: pointer to adapter instance structure
  1226. * @type: HCAM type
  1227. *
  1228. * Return value:
  1229. * 0 if success, error value in case of any failure.
  1230. */
  1231. static int pmcraid_notify_aen(
  1232. struct pmcraid_instance *pinstance,
  1233. struct pmcraid_aen_msg *aen_msg,
  1234. u32 data_size
  1235. )
  1236. {
  1237. struct sk_buff *skb;
  1238. void *msg_header;
  1239. u32 total_size, nla_genl_hdr_total_size;
  1240. int result;
  1241. aen_msg->hostno = (pinstance->host->unique_id << 16 |
  1242. MINOR(pinstance->cdev.dev));
  1243. aen_msg->length = data_size;
  1244. data_size += sizeof(*aen_msg);
  1245. total_size = nla_total_size(data_size);
  1246. /* Add GENL_HDR to total_size */
  1247. nla_genl_hdr_total_size =
  1248. (total_size + (GENL_HDRLEN +
  1249. ((struct genl_family *)&pmcraid_event_family)->hdrsize)
  1250. + NLMSG_HDRLEN);
  1251. skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
  1252. if (!skb) {
  1253. pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
  1254. total_size);
  1255. return -ENOMEM;
  1256. }
  1257. /* add the genetlink message header */
  1258. msg_header = genlmsg_put(skb, 0, 0,
  1259. &pmcraid_event_family, 0,
  1260. PMCRAID_AEN_CMD_EVENT);
  1261. if (!msg_header) {
  1262. pmcraid_err("failed to copy command details\n");
  1263. nlmsg_free(skb);
  1264. return -ENOMEM;
  1265. }
  1266. result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
  1267. if (result) {
  1268. pmcraid_err("failed to copy AEN attribute data\n");
  1269. nlmsg_free(skb);
  1270. return -EINVAL;
  1271. }
  1272. /* send genetlink multicast message to notify appplications */
  1273. genlmsg_end(skb, msg_header);
  1274. result = genlmsg_multicast(&pmcraid_event_family, skb,
  1275. 0, 0, GFP_ATOMIC);
  1276. /* If there are no listeners, genlmsg_multicast may return non-zero
  1277. * value.
  1278. */
  1279. if (result)
  1280. pmcraid_info("error (%x) sending aen event message\n", result);
  1281. return result;
  1282. }
  1283. /**
  1284. * pmcraid_notify_ccn - notifies about CCN event msg to user space
  1285. * @pinstance: pointer adapter instance structure
  1286. *
  1287. * Return value:
  1288. * 0 if success, error value in case of any failure
  1289. */
  1290. static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
  1291. {
  1292. return pmcraid_notify_aen(pinstance,
  1293. pinstance->ccn.msg,
  1294. le32_to_cpu(pinstance->ccn.hcam->data_len) +
  1295. sizeof(struct pmcraid_hcam_hdr));
  1296. }
  1297. /**
  1298. * pmcraid_notify_ldn - notifies about CCN event msg to user space
  1299. * @pinstance: pointer adapter instance structure
  1300. *
  1301. * Return value:
  1302. * 0 if success, error value in case of any failure
  1303. */
  1304. static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
  1305. {
  1306. return pmcraid_notify_aen(pinstance,
  1307. pinstance->ldn.msg,
  1308. le32_to_cpu(pinstance->ldn.hcam->data_len) +
  1309. sizeof(struct pmcraid_hcam_hdr));
  1310. }
  1311. /**
  1312. * pmcraid_notify_ioastate - sends IOA state event msg to user space
  1313. * @pinstance: pointer adapter instance structure
  1314. * @evt: controller state event to be sent
  1315. *
  1316. * Return value:
  1317. * 0 if success, error value in case of any failure
  1318. */
  1319. static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
  1320. {
  1321. pinstance->scn.ioa_state = evt;
  1322. pmcraid_notify_aen(pinstance,
  1323. &pinstance->scn.msg,
  1324. sizeof(u32));
  1325. }
  1326. /**
  1327. * pmcraid_handle_config_change - Handle a config change from the adapter
  1328. * @pinstance: pointer to per adapter instance structure
  1329. *
  1330. * Return value:
  1331. * none
  1332. */
  1333. static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
  1334. {
  1335. struct pmcraid_config_table_entry *cfg_entry;
  1336. struct pmcraid_hcam_ccn *ccn_hcam;
  1337. struct pmcraid_cmd *cmd;
  1338. struct pmcraid_cmd *cfgcmd;
  1339. struct pmcraid_resource_entry *res = NULL;
  1340. unsigned long lock_flags;
  1341. unsigned long host_lock_flags;
  1342. u32 new_entry = 1;
  1343. u32 hidden_entry = 0;
  1344. u16 fw_version;
  1345. int rc;
  1346. ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
  1347. cfg_entry = &ccn_hcam->cfg_entry;
  1348. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  1349. pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \
  1350. res: %x:%x:%x:%x\n",
  1351. le32_to_cpu(pinstance->ccn.hcam->ilid),
  1352. pinstance->ccn.hcam->op_code,
  1353. (le32_to_cpu(pinstance->ccn.hcam->timestamp1) |
  1354. ((le32_to_cpu(pinstance->ccn.hcam->timestamp2) & 0xffffffffLL) << 32)),
  1355. pinstance->ccn.hcam->notification_type,
  1356. pinstance->ccn.hcam->notification_lost,
  1357. pinstance->ccn.hcam->flags,
  1358. pinstance->host->unique_id,
  1359. RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
  1360. (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
  1361. RES_BUS(cfg_entry->resource_address)),
  1362. RES_IS_VSET(*cfg_entry) ?
  1363. (fw_version <= PMCRAID_FW_VERSION_1 ?
  1364. cfg_entry->unique_flags1 :
  1365. le16_to_cpu(cfg_entry->array_id) & 0xFF) :
  1366. RES_TARGET(cfg_entry->resource_address),
  1367. RES_LUN(cfg_entry->resource_address));
  1368. /* If this HCAM indicates a lost notification, read the config table */
  1369. if (pinstance->ccn.hcam->notification_lost) {
  1370. cfgcmd = pmcraid_get_free_cmd(pinstance);
  1371. if (cfgcmd) {
  1372. pmcraid_info("lost CCN, reading config table\b");
  1373. pinstance->reinit_cfg_table = 1;
  1374. pmcraid_querycfg(cfgcmd);
  1375. } else {
  1376. pmcraid_err("lost CCN, no free cmd for querycfg\n");
  1377. }
  1378. goto out_notify_apps;
  1379. }
  1380. /* If this resource is not going to be added to mid-layer, just notify
  1381. * applications and return. If this notification is about hiding a VSET
  1382. * resource, check if it was exposed already.
  1383. */
  1384. if (pinstance->ccn.hcam->notification_type ==
  1385. NOTIFICATION_TYPE_ENTRY_CHANGED &&
  1386. cfg_entry->resource_type == RES_TYPE_VSET) {
  1387. hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
  1388. } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) {
  1389. goto out_notify_apps;
  1390. }
  1391. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  1392. list_for_each_entry(res, &pinstance->used_res_q, queue) {
  1393. rc = memcmp(&res->cfg_entry.resource_address,
  1394. &cfg_entry->resource_address,
  1395. sizeof(cfg_entry->resource_address));
  1396. if (!rc) {
  1397. new_entry = 0;
  1398. break;
  1399. }
  1400. }
  1401. if (new_entry) {
  1402. if (hidden_entry) {
  1403. spin_unlock_irqrestore(&pinstance->resource_lock,
  1404. lock_flags);
  1405. goto out_notify_apps;
  1406. }
  1407. /* If there are more number of resources than what driver can
  1408. * manage, do not notify the applications about the CCN. Just
  1409. * ignore this notifications and re-register the same HCAM
  1410. */
  1411. if (list_empty(&pinstance->free_res_q)) {
  1412. spin_unlock_irqrestore(&pinstance->resource_lock,
  1413. lock_flags);
  1414. pmcraid_err("too many resources attached\n");
  1415. spin_lock_irqsave(pinstance->host->host_lock,
  1416. host_lock_flags);
  1417. pmcraid_send_hcam(pinstance,
  1418. PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1419. spin_unlock_irqrestore(pinstance->host->host_lock,
  1420. host_lock_flags);
  1421. return;
  1422. }
  1423. res = list_entry(pinstance->free_res_q.next,
  1424. struct pmcraid_resource_entry, queue);
  1425. list_del(&res->queue);
  1426. res->scsi_dev = NULL;
  1427. res->reset_progress = 0;
  1428. list_add_tail(&res->queue, &pinstance->used_res_q);
  1429. }
  1430. memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size);
  1431. if (pinstance->ccn.hcam->notification_type ==
  1432. NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
  1433. if (res->scsi_dev) {
  1434. if (fw_version <= PMCRAID_FW_VERSION_1)
  1435. res->cfg_entry.unique_flags1 &= 0x7F;
  1436. else
  1437. res->cfg_entry.array_id &= cpu_to_le16(0xFF);
  1438. res->change_detected = RES_CHANGE_DEL;
  1439. res->cfg_entry.resource_handle =
  1440. PMCRAID_INVALID_RES_HANDLE;
  1441. schedule_work(&pinstance->worker_q);
  1442. } else {
  1443. /* This may be one of the non-exposed resources */
  1444. list_move_tail(&res->queue, &pinstance->free_res_q);
  1445. }
  1446. } else if (!res->scsi_dev) {
  1447. res->change_detected = RES_CHANGE_ADD;
  1448. schedule_work(&pinstance->worker_q);
  1449. }
  1450. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  1451. out_notify_apps:
  1452. /* Notify configuration changes to registered applications.*/
  1453. if (!pmcraid_disable_aen)
  1454. pmcraid_notify_ccn(pinstance);
  1455. cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1456. if (cmd)
  1457. pmcraid_send_hcam_cmd(cmd);
  1458. }
  1459. /**
  1460. * pmcraid_get_error_info - return error string for an ioasc
  1461. * @ioasc: ioasc code
  1462. * Return Value
  1463. * none
  1464. */
  1465. static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
  1466. {
  1467. int i;
  1468. for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
  1469. if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
  1470. return &pmcraid_ioasc_error_table[i];
  1471. }
  1472. return NULL;
  1473. }
  1474. /**
  1475. * pmcraid_ioasc_logger - log IOASC information based user-settings
  1476. * @ioasc: ioasc code
  1477. * @cmd: pointer to command that resulted in 'ioasc'
  1478. */
  1479. static void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
  1480. {
  1481. struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
  1482. if (error_info == NULL ||
  1483. cmd->drv_inst->current_log_level < error_info->log_level)
  1484. return;
  1485. /* log the error string */
  1486. pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
  1487. cmd->ioa_cb->ioarcb.cdb[0],
  1488. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
  1489. ioasc, error_info->error_string);
  1490. }
  1491. /**
  1492. * pmcraid_handle_error_log - Handle a config change (error log) from the IOA
  1493. *
  1494. * @pinstance: pointer to per adapter instance structure
  1495. *
  1496. * Return value:
  1497. * none
  1498. */
  1499. static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
  1500. {
  1501. struct pmcraid_hcam_ldn *hcam_ldn;
  1502. u32 ioasc;
  1503. hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
  1504. pmcraid_info
  1505. ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
  1506. pinstance->ldn.hcam->ilid,
  1507. pinstance->ldn.hcam->op_code,
  1508. pinstance->ldn.hcam->notification_type,
  1509. pinstance->ldn.hcam->notification_lost,
  1510. pinstance->ldn.hcam->flags,
  1511. pinstance->ldn.hcam->overlay_id);
  1512. /* log only the errors, no need to log informational log entries */
  1513. if (pinstance->ldn.hcam->notification_type !=
  1514. NOTIFICATION_TYPE_ERROR_LOG)
  1515. return;
  1516. if (pinstance->ldn.hcam->notification_lost ==
  1517. HOSTRCB_NOTIFICATIONS_LOST)
  1518. dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
  1519. ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
  1520. if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
  1521. ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
  1522. dev_info(&pinstance->pdev->dev,
  1523. "UnitAttention due to IOA Bus Reset\n");
  1524. scsi_report_bus_reset(
  1525. pinstance->host,
  1526. RES_BUS(hcam_ldn->error_log.fd_ra));
  1527. }
  1528. return;
  1529. }
  1530. /**
  1531. * pmcraid_process_ccn - Op done function for a CCN.
  1532. * @cmd: pointer to command struct
  1533. *
  1534. * This function is the op done function for a configuration
  1535. * change notification
  1536. *
  1537. * Return value:
  1538. * none
  1539. */
  1540. static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
  1541. {
  1542. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1543. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  1544. unsigned long lock_flags;
  1545. pinstance->ccn.cmd = NULL;
  1546. pmcraid_return_cmd(cmd);
  1547. /* If driver initiated IOA reset happened while this hcam was pending
  1548. * with IOA, or IOA bringdown sequence is in progress, no need to
  1549. * re-register the hcam
  1550. */
  1551. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  1552. atomic_read(&pinstance->ccn.ignore) == 1) {
  1553. return;
  1554. } else if (ioasc) {
  1555. dev_info(&pinstance->pdev->dev,
  1556. "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
  1557. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  1558. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1559. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  1560. } else {
  1561. pmcraid_handle_config_change(pinstance);
  1562. }
  1563. }
  1564. /**
  1565. * pmcraid_process_ldn - op done function for an LDN
  1566. * @cmd: pointer to command block
  1567. *
  1568. * Return value
  1569. * none
  1570. */
  1571. static void pmcraid_initiate_reset(struct pmcraid_instance *);
  1572. static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd);
  1573. static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
  1574. {
  1575. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1576. struct pmcraid_hcam_ldn *ldn_hcam =
  1577. (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
  1578. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  1579. u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
  1580. unsigned long lock_flags;
  1581. /* return the command block back to freepool */
  1582. pinstance->ldn.cmd = NULL;
  1583. pmcraid_return_cmd(cmd);
  1584. /* If driver initiated IOA reset happened while this hcam was pending
  1585. * with IOA, no need to re-register the hcam as reset engine will do it
  1586. * once reset sequence is complete
  1587. */
  1588. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  1589. atomic_read(&pinstance->ccn.ignore) == 1) {
  1590. return;
  1591. } else if (!ioasc) {
  1592. pmcraid_handle_error_log(pinstance);
  1593. if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
  1594. spin_lock_irqsave(pinstance->host->host_lock,
  1595. lock_flags);
  1596. pmcraid_initiate_reset(pinstance);
  1597. spin_unlock_irqrestore(pinstance->host->host_lock,
  1598. lock_flags);
  1599. return;
  1600. }
  1601. if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) {
  1602. pinstance->timestamp_error = 1;
  1603. pmcraid_set_timestamp(cmd);
  1604. }
  1605. } else {
  1606. dev_info(&pinstance->pdev->dev,
  1607. "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
  1608. }
  1609. /* send netlink message for HCAM notification if enabled */
  1610. if (!pmcraid_disable_aen)
  1611. pmcraid_notify_ldn(pinstance);
  1612. cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1613. if (cmd)
  1614. pmcraid_send_hcam_cmd(cmd);
  1615. }
  1616. /**
  1617. * pmcraid_register_hcams - register HCAMs for CCN and LDN
  1618. *
  1619. * @pinstance: pointer per adapter instance structure
  1620. *
  1621. * Return Value
  1622. * none
  1623. */
  1624. static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
  1625. {
  1626. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1627. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1628. }
  1629. /**
  1630. * pmcraid_unregister_hcams - cancel HCAMs registered already
  1631. * @cmd: pointer to command used as part of reset sequence
  1632. */
  1633. static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
  1634. {
  1635. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1636. /* During IOA bringdown, HCAM gets fired and tasklet proceeds with
  1637. * handling hcam response though it is not necessary. In order to
  1638. * prevent this, set 'ignore', so that bring-down sequence doesn't
  1639. * re-send any more hcams
  1640. */
  1641. atomic_set(&pinstance->ccn.ignore, 1);
  1642. atomic_set(&pinstance->ldn.ignore, 1);
  1643. /* If adapter reset was forced as part of runtime reset sequence,
  1644. * start the reset sequence. Reset will be triggered even in case
  1645. * IOA unit_check.
  1646. */
  1647. if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) ||
  1648. pinstance->ioa_unit_check) {
  1649. pinstance->force_ioa_reset = 0;
  1650. pinstance->ioa_unit_check = 0;
  1651. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1652. pmcraid_reset_alert(cmd);
  1653. return;
  1654. }
  1655. /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM
  1656. * one after the other. So CCN cancellation will be triggered by
  1657. * pmcraid_cancel_ldn itself.
  1658. */
  1659. pmcraid_cancel_ldn(cmd);
  1660. }
  1661. /**
  1662. * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset
  1663. * @pinstance: pointer to adapter instance structure
  1664. * Return Value
  1665. * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0
  1666. */
  1667. static void pmcraid_reinit_buffers(struct pmcraid_instance *);
  1668. static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
  1669. {
  1670. u32 intrs;
  1671. pmcraid_reinit_buffers(pinstance);
  1672. intrs = pmcraid_read_interrupts(pinstance);
  1673. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  1674. if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
  1675. if (!pinstance->interrupt_mode) {
  1676. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  1677. pinstance->int_regs.
  1678. ioa_host_interrupt_mask_reg);
  1679. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  1680. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  1681. }
  1682. return 1;
  1683. } else {
  1684. return 0;
  1685. }
  1686. }
  1687. /**
  1688. * pmcraid_soft_reset - performs a soft reset and makes IOA become ready
  1689. * @cmd : pointer to reset command block
  1690. *
  1691. * Return Value
  1692. * none
  1693. */
  1694. static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
  1695. {
  1696. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1697. u32 int_reg;
  1698. u32 doorbell;
  1699. /* There will be an interrupt when Transition to Operational bit is
  1700. * set so tasklet would execute next reset task. The timeout handler
  1701. * would re-initiate a reset
  1702. */
  1703. cmd->cmd_done = pmcraid_ioa_reset;
  1704. cmd->timer.expires = jiffies +
  1705. msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
  1706. cmd->timer.function = pmcraid_timeout_handler;
  1707. if (!timer_pending(&cmd->timer))
  1708. add_timer(&cmd->timer);
  1709. /* Enable destructive diagnostics on IOA if it is not yet in
  1710. * operational state
  1711. */
  1712. doorbell = DOORBELL_RUNTIME_RESET |
  1713. DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
  1714. /* Since we do RESET_ALERT and Start BIST we have to again write
  1715. * MSIX Doorbell to indicate the interrupt mode
  1716. */
  1717. if (pinstance->interrupt_mode) {
  1718. iowrite32(DOORBELL_INTR_MODE_MSIX,
  1719. pinstance->int_regs.host_ioa_interrupt_reg);
  1720. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  1721. }
  1722. iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
  1723. ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
  1724. int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  1725. pmcraid_info("Waiting for IOA to become operational %x:%x\n",
  1726. ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
  1727. int_reg);
  1728. }
  1729. /**
  1730. * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt
  1731. *
  1732. * @pinstance: pointer to adapter instance structure
  1733. *
  1734. * Return Value
  1735. * none
  1736. */
  1737. static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
  1738. {
  1739. pmcraid_info("%s is not yet implemented\n", __func__);
  1740. }
  1741. /**
  1742. * pmcraid_fail_outstanding_cmds - Fails all outstanding ops.
  1743. * @pinstance: pointer to adapter instance structure
  1744. *
  1745. * This function fails all outstanding ops. If they are submitted to IOA
  1746. * already, it sends cancel all messages if IOA is still accepting IOARCBs,
  1747. * otherwise just completes the commands and returns the cmd blocks to free
  1748. * pool.
  1749. *
  1750. * Return value:
  1751. * none
  1752. */
  1753. static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
  1754. {
  1755. struct pmcraid_cmd *cmd, *temp;
  1756. unsigned long lock_flags;
  1757. /* pending command list is protected by pending_pool_lock. Its
  1758. * traversal must be done as within this lock
  1759. */
  1760. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  1761. list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
  1762. free_list) {
  1763. list_del(&cmd->free_list);
  1764. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  1765. lock_flags);
  1766. cmd->ioa_cb->ioasa.ioasc =
  1767. cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
  1768. cmd->ioa_cb->ioasa.ilid =
  1769. cpu_to_le32(PMCRAID_DRIVER_ILID);
  1770. /* In case the command timer is still running */
  1771. del_timer(&cmd->timer);
  1772. /* If this is an IO command, complete it by invoking scsi_done
  1773. * function. If this is one of the internal commands other
  1774. * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to
  1775. * complete it
  1776. */
  1777. if (cmd->scsi_cmd) {
  1778. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  1779. __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
  1780. scsi_cmd->result |= DID_ERROR << 16;
  1781. scsi_dma_unmap(scsi_cmd);
  1782. pmcraid_return_cmd(cmd);
  1783. pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
  1784. le32_to_cpu(resp) >> 2,
  1785. cmd->ioa_cb->ioarcb.cdb[0],
  1786. scsi_cmd->result);
  1787. scsi_cmd->scsi_done(scsi_cmd);
  1788. } else if (cmd->cmd_done == pmcraid_internal_done ||
  1789. cmd->cmd_done == pmcraid_erp_done) {
  1790. cmd->cmd_done(cmd);
  1791. } else if (cmd->cmd_done != pmcraid_ioa_reset &&
  1792. cmd->cmd_done != pmcraid_ioa_shutdown_done) {
  1793. pmcraid_return_cmd(cmd);
  1794. }
  1795. atomic_dec(&pinstance->outstanding_cmds);
  1796. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  1797. }
  1798. spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
  1799. }
  1800. /**
  1801. * pmcraid_ioa_reset - Implementation of IOA reset logic
  1802. *
  1803. * @cmd: pointer to the cmd block to be used for entire reset process
  1804. *
  1805. * This function executes most of the steps required for IOA reset. This gets
  1806. * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's
  1807. * 'eh_' thread. Access to variables used for controlling the reset sequence is
  1808. * synchronized using host lock. Various functions called during reset process
  1809. * would make use of a single command block, pointer to which is also stored in
  1810. * adapter instance structure.
  1811. *
  1812. * Return Value
  1813. * None
  1814. */
  1815. static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
  1816. {
  1817. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1818. u8 reset_complete = 0;
  1819. pinstance->ioa_reset_in_progress = 1;
  1820. if (pinstance->reset_cmd != cmd) {
  1821. pmcraid_err("reset is called with different command block\n");
  1822. pinstance->reset_cmd = cmd;
  1823. }
  1824. pmcraid_info("reset_engine: state = %d, command = %p\n",
  1825. pinstance->ioa_state, cmd);
  1826. switch (pinstance->ioa_state) {
  1827. case IOA_STATE_DEAD:
  1828. /* If IOA is offline, whatever may be the reset reason, just
  1829. * return. callers might be waiting on the reset wait_q, wake
  1830. * up them
  1831. */
  1832. pmcraid_err("IOA is offline no reset is possible\n");
  1833. reset_complete = 1;
  1834. break;
  1835. case IOA_STATE_IN_BRINGDOWN:
  1836. /* we enter here, once ioa shutdown command is processed by IOA
  1837. * Alert IOA for a possible reset. If reset alert fails, IOA
  1838. * goes through hard-reset
  1839. */
  1840. pmcraid_disable_interrupts(pinstance, ~0);
  1841. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1842. pmcraid_reset_alert(cmd);
  1843. break;
  1844. case IOA_STATE_UNKNOWN:
  1845. /* We may be called during probe or resume. Some pre-processing
  1846. * is required for prior to reset
  1847. */
  1848. scsi_block_requests(pinstance->host);
  1849. /* If asked to reset while IOA was processing responses or
  1850. * there are any error responses then IOA may require
  1851. * hard-reset.
  1852. */
  1853. if (pinstance->ioa_hard_reset == 0) {
  1854. if (ioread32(pinstance->ioa_status) &
  1855. INTRS_TRANSITION_TO_OPERATIONAL) {
  1856. pmcraid_info("sticky bit set, bring-up\n");
  1857. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1858. pmcraid_reinit_cmdblk(cmd);
  1859. pmcraid_identify_hrrq(cmd);
  1860. } else {
  1861. pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
  1862. pmcraid_soft_reset(cmd);
  1863. }
  1864. } else {
  1865. /* Alert IOA of a possible reset and wait for critical
  1866. * operation in progress bit to reset
  1867. */
  1868. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1869. pmcraid_reset_alert(cmd);
  1870. }
  1871. break;
  1872. case IOA_STATE_IN_RESET_ALERT:
  1873. /* If critical operation in progress bit is reset or wait gets
  1874. * timed out, reset proceeds with starting BIST on the IOA.
  1875. * pmcraid_ioa_hard_reset keeps a count of reset attempts. If
  1876. * they are 3 or more, reset engine marks IOA dead and returns
  1877. */
  1878. pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
  1879. pmcraid_start_bist(cmd);
  1880. break;
  1881. case IOA_STATE_IN_HARD_RESET:
  1882. pinstance->ioa_reset_attempts++;
  1883. /* retry reset if we haven't reached maximum allowed limit */
  1884. if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
  1885. pinstance->ioa_reset_attempts = 0;
  1886. pmcraid_err("IOA didn't respond marking it as dead\n");
  1887. pinstance->ioa_state = IOA_STATE_DEAD;
  1888. if (pinstance->ioa_bringdown)
  1889. pmcraid_notify_ioastate(pinstance,
  1890. PMC_DEVICE_EVENT_SHUTDOWN_FAILED);
  1891. else
  1892. pmcraid_notify_ioastate(pinstance,
  1893. PMC_DEVICE_EVENT_RESET_FAILED);
  1894. reset_complete = 1;
  1895. break;
  1896. }
  1897. /* Once either bist or pci reset is done, restore PCI config
  1898. * space. If this fails, proceed with hard reset again
  1899. */
  1900. pci_restore_state(pinstance->pdev);
  1901. /* fail all pending commands */
  1902. pmcraid_fail_outstanding_cmds(pinstance);
  1903. /* check if unit check is active, if so extract dump */
  1904. if (pinstance->ioa_unit_check) {
  1905. pmcraid_info("unit check is active\n");
  1906. pinstance->ioa_unit_check = 0;
  1907. pmcraid_get_dump(pinstance);
  1908. pinstance->ioa_reset_attempts--;
  1909. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1910. pmcraid_reset_alert(cmd);
  1911. break;
  1912. }
  1913. /* if the reset reason is to bring-down the ioa, we might be
  1914. * done with the reset restore pci_config_space and complete
  1915. * the reset
  1916. */
  1917. if (pinstance->ioa_bringdown) {
  1918. pmcraid_info("bringing down the adapter\n");
  1919. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  1920. pinstance->ioa_bringdown = 0;
  1921. pinstance->ioa_state = IOA_STATE_UNKNOWN;
  1922. pmcraid_notify_ioastate(pinstance,
  1923. PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS);
  1924. reset_complete = 1;
  1925. } else {
  1926. /* bring-up IOA, so proceed with soft reset
  1927. * Reinitialize hrrq_buffers and their indices also
  1928. * enable interrupts after a pci_restore_state
  1929. */
  1930. if (pmcraid_reset_enable_ioa(pinstance)) {
  1931. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1932. pmcraid_info("bringing up the adapter\n");
  1933. pmcraid_reinit_cmdblk(cmd);
  1934. pmcraid_identify_hrrq(cmd);
  1935. } else {
  1936. pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
  1937. pmcraid_soft_reset(cmd);
  1938. }
  1939. }
  1940. break;
  1941. case IOA_STATE_IN_SOFT_RESET:
  1942. /* TRANSITION TO OPERATIONAL is on so start initialization
  1943. * sequence
  1944. */
  1945. pmcraid_info("In softreset proceeding with bring-up\n");
  1946. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1947. /* Initialization commands start with HRRQ identification. From
  1948. * now on tasklet completes most of the commands as IOA is up
  1949. * and intrs are enabled
  1950. */
  1951. pmcraid_identify_hrrq(cmd);
  1952. break;
  1953. case IOA_STATE_IN_BRINGUP:
  1954. /* we are done with bringing up of IOA, change the ioa_state to
  1955. * operational and wake up any waiters
  1956. */
  1957. pinstance->ioa_state = IOA_STATE_OPERATIONAL;
  1958. reset_complete = 1;
  1959. break;
  1960. case IOA_STATE_OPERATIONAL:
  1961. default:
  1962. /* When IOA is operational and a reset is requested, check for
  1963. * the reset reason. If reset is to bring down IOA, unregister
  1964. * HCAMs and initiate shutdown; if adapter reset is forced then
  1965. * restart reset sequence again
  1966. */
  1967. if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
  1968. pinstance->force_ioa_reset == 0) {
  1969. pmcraid_notify_ioastate(pinstance,
  1970. PMC_DEVICE_EVENT_RESET_SUCCESS);
  1971. reset_complete = 1;
  1972. } else {
  1973. if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
  1974. pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
  1975. pmcraid_reinit_cmdblk(cmd);
  1976. pmcraid_unregister_hcams(cmd);
  1977. }
  1978. break;
  1979. }
  1980. /* reset will be completed if ioa_state is either DEAD or UNKNOWN or
  1981. * OPERATIONAL. Reset all control variables used during reset, wake up
  1982. * any waiting threads and let the SCSI mid-layer send commands. Note
  1983. * that host_lock must be held before invoking scsi_report_bus_reset.
  1984. */
  1985. if (reset_complete) {
  1986. pinstance->ioa_reset_in_progress = 0;
  1987. pinstance->ioa_reset_attempts = 0;
  1988. pinstance->reset_cmd = NULL;
  1989. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  1990. pinstance->ioa_bringdown = 0;
  1991. pmcraid_return_cmd(cmd);
  1992. /* If target state is to bring up the adapter, proceed with
  1993. * hcam registration and resource exposure to mid-layer.
  1994. */
  1995. if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
  1996. pmcraid_register_hcams(pinstance);
  1997. wake_up_all(&pinstance->reset_wait_q);
  1998. }
  1999. return;
  2000. }
  2001. /**
  2002. * pmcraid_initiate_reset - initiates reset sequence. This is called from
  2003. * ISR/tasklet during error interrupts including IOA unit check. If reset
  2004. * is already in progress, it just returns, otherwise initiates IOA reset
  2005. * to bring IOA up to operational state.
  2006. *
  2007. * @pinstance: pointer to adapter instance structure
  2008. *
  2009. * Return value
  2010. * none
  2011. */
  2012. static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
  2013. {
  2014. struct pmcraid_cmd *cmd;
  2015. /* If the reset is already in progress, just return, otherwise start
  2016. * reset sequence and return
  2017. */
  2018. if (!pinstance->ioa_reset_in_progress) {
  2019. scsi_block_requests(pinstance->host);
  2020. cmd = pmcraid_get_free_cmd(pinstance);
  2021. if (cmd == NULL) {
  2022. pmcraid_err("no cmnd blocks for initiate_reset\n");
  2023. return;
  2024. }
  2025. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  2026. pinstance->reset_cmd = cmd;
  2027. pinstance->force_ioa_reset = 1;
  2028. pmcraid_notify_ioastate(pinstance,
  2029. PMC_DEVICE_EVENT_RESET_START);
  2030. pmcraid_ioa_reset(cmd);
  2031. }
  2032. }
  2033. /**
  2034. * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup
  2035. * or bringdown IOA
  2036. * @pinstance: pointer adapter instance structure
  2037. * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV
  2038. * @target_state: expected target state after reset
  2039. *
  2040. * Note: This command initiates reset and waits for its completion. Hence this
  2041. * should not be called from isr/timer/tasklet functions (timeout handlers,
  2042. * error response handlers and interrupt handlers).
  2043. *
  2044. * Return Value
  2045. * 1 in case ioa_state is not target_state, 0 otherwise.
  2046. */
  2047. static int pmcraid_reset_reload(
  2048. struct pmcraid_instance *pinstance,
  2049. u8 shutdown_type,
  2050. u8 target_state
  2051. )
  2052. {
  2053. struct pmcraid_cmd *reset_cmd = NULL;
  2054. unsigned long lock_flags;
  2055. int reset = 1;
  2056. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2057. if (pinstance->ioa_reset_in_progress) {
  2058. pmcraid_info("reset_reload: reset is already in progress\n");
  2059. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2060. wait_event(pinstance->reset_wait_q,
  2061. !pinstance->ioa_reset_in_progress);
  2062. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2063. if (pinstance->ioa_state == IOA_STATE_DEAD) {
  2064. pmcraid_info("reset_reload: IOA is dead\n");
  2065. goto out_unlock;
  2066. }
  2067. if (pinstance->ioa_state == target_state) {
  2068. reset = 0;
  2069. goto out_unlock;
  2070. }
  2071. }
  2072. pmcraid_info("reset_reload: proceeding with reset\n");
  2073. scsi_block_requests(pinstance->host);
  2074. reset_cmd = pmcraid_get_free_cmd(pinstance);
  2075. if (reset_cmd == NULL) {
  2076. pmcraid_err("no free cmnd for reset_reload\n");
  2077. goto out_unlock;
  2078. }
  2079. if (shutdown_type == SHUTDOWN_NORMAL)
  2080. pinstance->ioa_bringdown = 1;
  2081. pinstance->ioa_shutdown_type = shutdown_type;
  2082. pinstance->reset_cmd = reset_cmd;
  2083. pinstance->force_ioa_reset = reset;
  2084. pmcraid_info("reset_reload: initiating reset\n");
  2085. pmcraid_ioa_reset(reset_cmd);
  2086. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2087. pmcraid_info("reset_reload: waiting for reset to complete\n");
  2088. wait_event(pinstance->reset_wait_q,
  2089. !pinstance->ioa_reset_in_progress);
  2090. pmcraid_info("reset_reload: reset is complete !!\n");
  2091. scsi_unblock_requests(pinstance->host);
  2092. return pinstance->ioa_state != target_state;
  2093. out_unlock:
  2094. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2095. return reset;
  2096. }
  2097. /**
  2098. * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA
  2099. *
  2100. * @pinstance: pointer to adapter instance structure
  2101. *
  2102. * Return Value
  2103. * whatever is returned from pmcraid_reset_reload
  2104. */
  2105. static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
  2106. {
  2107. return pmcraid_reset_reload(pinstance,
  2108. SHUTDOWN_NORMAL,
  2109. IOA_STATE_UNKNOWN);
  2110. }
  2111. /**
  2112. * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA
  2113. *
  2114. * @pinstance: pointer to adapter instance structure
  2115. *
  2116. * Return Value
  2117. * whatever is returned from pmcraid_reset_reload
  2118. */
  2119. static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
  2120. {
  2121. pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START);
  2122. return pmcraid_reset_reload(pinstance,
  2123. SHUTDOWN_NONE,
  2124. IOA_STATE_OPERATIONAL);
  2125. }
  2126. /**
  2127. * pmcraid_request_sense - Send request sense to a device
  2128. * @cmd: pmcraid command struct
  2129. *
  2130. * This function sends a request sense to a device as a result of a check
  2131. * condition. This method re-uses the same command block that failed earlier.
  2132. */
  2133. static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
  2134. {
  2135. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2136. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  2137. struct device *dev = &cmd->drv_inst->pdev->dev;
  2138. cmd->sense_buffer = cmd->scsi_cmd->sense_buffer;
  2139. cmd->sense_buffer_dma = dma_map_single(dev, cmd->sense_buffer,
  2140. SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
  2141. if (dma_mapping_error(dev, cmd->sense_buffer_dma)) {
  2142. pmcraid_err
  2143. ("couldn't allocate sense buffer for request sense\n");
  2144. pmcraid_erp_done(cmd);
  2145. return;
  2146. }
  2147. /* re-use the command block */
  2148. memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
  2149. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  2150. ioarcb->request_flags0 = (SYNC_COMPLETE |
  2151. NO_LINK_DESCS |
  2152. INHIBIT_UL_CHECK);
  2153. ioarcb->request_type = REQ_TYPE_SCSI;
  2154. ioarcb->cdb[0] = REQUEST_SENSE;
  2155. ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  2156. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2157. offsetof(struct pmcraid_ioarcb,
  2158. add_data.u.ioadl[0]));
  2159. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  2160. ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
  2161. ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
  2162. ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
  2163. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  2164. /* request sense might be called as part of error response processing
  2165. * which runs in tasklets context. It is possible that mid-layer might
  2166. * schedule queuecommand during this time, hence, writting to IOARRIN
  2167. * must be protect by host_lock
  2168. */
  2169. pmcraid_send_cmd(cmd, pmcraid_erp_done,
  2170. PMCRAID_REQUEST_SENSE_TIMEOUT,
  2171. pmcraid_timeout_handler);
  2172. }
  2173. /**
  2174. * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery
  2175. * @cmd: command that failed
  2176. * @need_sense: true if request_sense is required after cancel all
  2177. *
  2178. * This function sends a cancel all to a device to clear the queue.
  2179. */
  2180. static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, bool need_sense)
  2181. {
  2182. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2183. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2184. struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
  2185. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  2186. ioarcb->request_flags0 = SYNC_OVERRIDE;
  2187. ioarcb->request_type = REQ_TYPE_IOACMD;
  2188. ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
  2189. if (RES_IS_GSCSI(res->cfg_entry))
  2190. ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
  2191. ioarcb->ioadl_bus_addr = 0;
  2192. ioarcb->ioadl_length = 0;
  2193. ioarcb->data_transfer_length = 0;
  2194. ioarcb->ioarcb_bus_addr &= cpu_to_le64((~0x1FULL));
  2195. /* writing to IOARRIN must be protected by host_lock, as mid-layer
  2196. * schedule queuecommand while we are doing this
  2197. */
  2198. pmcraid_send_cmd(cmd, need_sense ?
  2199. pmcraid_erp_done : pmcraid_request_sense,
  2200. PMCRAID_REQUEST_SENSE_TIMEOUT,
  2201. pmcraid_timeout_handler);
  2202. }
  2203. /**
  2204. * pmcraid_frame_auto_sense: frame fixed format sense information
  2205. *
  2206. * @cmd: pointer to failing command block
  2207. *
  2208. * Return value
  2209. * none
  2210. */
  2211. static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
  2212. {
  2213. u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
  2214. struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
  2215. struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
  2216. u32 ioasc = le32_to_cpu(ioasa->ioasc);
  2217. u32 failing_lba = 0;
  2218. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  2219. cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  2220. if (RES_IS_VSET(res->cfg_entry) &&
  2221. ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
  2222. ioasa->u.vset.failing_lba_hi != 0) {
  2223. sense_buf[0] = 0x72;
  2224. sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
  2225. sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
  2226. sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
  2227. sense_buf[7] = 12;
  2228. sense_buf[8] = 0;
  2229. sense_buf[9] = 0x0A;
  2230. sense_buf[10] = 0x80;
  2231. failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
  2232. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  2233. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  2234. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  2235. sense_buf[15] = failing_lba & 0x000000ff;
  2236. failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
  2237. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  2238. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  2239. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  2240. sense_buf[19] = failing_lba & 0x000000ff;
  2241. } else {
  2242. sense_buf[0] = 0x70;
  2243. sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
  2244. sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
  2245. sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
  2246. if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
  2247. if (RES_IS_VSET(res->cfg_entry))
  2248. failing_lba =
  2249. le32_to_cpu(ioasa->u.
  2250. vset.failing_lba_lo);
  2251. sense_buf[0] |= 0x80;
  2252. sense_buf[3] = (failing_lba >> 24) & 0xff;
  2253. sense_buf[4] = (failing_lba >> 16) & 0xff;
  2254. sense_buf[5] = (failing_lba >> 8) & 0xff;
  2255. sense_buf[6] = failing_lba & 0xff;
  2256. }
  2257. sense_buf[7] = 6; /* additional length */
  2258. }
  2259. }
  2260. /**
  2261. * pmcraid_error_handler - Error response handlers for a SCSI op
  2262. * @cmd: pointer to pmcraid_cmd that has failed
  2263. *
  2264. * This function determines whether or not to initiate ERP on the affected
  2265. * device. This is called from a tasklet, which doesn't hold any locks.
  2266. *
  2267. * Return value:
  2268. * 0 it caller can complete the request, otherwise 1 where in error
  2269. * handler itself completes the request and returns the command block
  2270. * back to free-pool
  2271. */
  2272. static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
  2273. {
  2274. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2275. struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
  2276. struct pmcraid_instance *pinstance = cmd->drv_inst;
  2277. struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
  2278. u32 ioasc = le32_to_cpu(ioasa->ioasc);
  2279. u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
  2280. bool sense_copied = false;
  2281. if (!res) {
  2282. pmcraid_info("resource pointer is NULL\n");
  2283. return 0;
  2284. }
  2285. /* If this was a SCSI read/write command keep count of errors */
  2286. if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
  2287. atomic_inc(&res->read_failures);
  2288. else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
  2289. atomic_inc(&res->write_failures);
  2290. if (!RES_IS_GSCSI(res->cfg_entry) &&
  2291. masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
  2292. pmcraid_frame_auto_sense(cmd);
  2293. }
  2294. /* Log IOASC/IOASA information based on user settings */
  2295. pmcraid_ioasc_logger(ioasc, cmd);
  2296. switch (masked_ioasc) {
  2297. case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
  2298. scsi_cmd->result |= (DID_ABORT << 16);
  2299. break;
  2300. case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
  2301. case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
  2302. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  2303. break;
  2304. case PMCRAID_IOASC_NR_SYNC_REQUIRED:
  2305. res->sync_reqd = 1;
  2306. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  2307. break;
  2308. case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
  2309. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  2310. break;
  2311. case PMCRAID_IOASC_UA_BUS_WAS_RESET:
  2312. case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
  2313. if (!res->reset_progress)
  2314. scsi_report_bus_reset(pinstance->host,
  2315. scsi_cmd->device->channel);
  2316. scsi_cmd->result |= (DID_ERROR << 16);
  2317. break;
  2318. case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
  2319. scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
  2320. res->sync_reqd = 1;
  2321. /* if check_condition is not active return with error otherwise
  2322. * get/frame the sense buffer
  2323. */
  2324. if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
  2325. SAM_STAT_CHECK_CONDITION &&
  2326. PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
  2327. return 0;
  2328. /* If we have auto sense data as part of IOASA pass it to
  2329. * mid-layer
  2330. */
  2331. if (ioasa->auto_sense_length != 0) {
  2332. short sense_len = le16_to_cpu(ioasa->auto_sense_length);
  2333. int data_size = min_t(u16, sense_len,
  2334. SCSI_SENSE_BUFFERSIZE);
  2335. memcpy(scsi_cmd->sense_buffer,
  2336. ioasa->sense_data,
  2337. data_size);
  2338. sense_copied = true;
  2339. }
  2340. if (RES_IS_GSCSI(res->cfg_entry))
  2341. pmcraid_cancel_all(cmd, sense_copied);
  2342. else if (sense_copied)
  2343. pmcraid_erp_done(cmd);
  2344. else
  2345. pmcraid_request_sense(cmd);
  2346. return 1;
  2347. case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
  2348. break;
  2349. default:
  2350. if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  2351. scsi_cmd->result |= (DID_ERROR << 16);
  2352. break;
  2353. }
  2354. return 0;
  2355. }
  2356. /**
  2357. * pmcraid_reset_device - device reset handler functions
  2358. *
  2359. * @scsi_cmd: scsi command struct
  2360. * @modifier: reset modifier indicating the reset sequence to be performed
  2361. *
  2362. * This function issues a device reset to the affected device.
  2363. * A LUN reset will be sent to the device first. If that does
  2364. * not work, a target reset will be sent.
  2365. *
  2366. * Return value:
  2367. * SUCCESS / FAILED
  2368. */
  2369. static int pmcraid_reset_device(
  2370. struct scsi_cmnd *scsi_cmd,
  2371. unsigned long timeout,
  2372. u8 modifier
  2373. )
  2374. {
  2375. struct pmcraid_cmd *cmd;
  2376. struct pmcraid_instance *pinstance;
  2377. struct pmcraid_resource_entry *res;
  2378. struct pmcraid_ioarcb *ioarcb;
  2379. unsigned long lock_flags;
  2380. u32 ioasc;
  2381. pinstance =
  2382. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2383. res = scsi_cmd->device->hostdata;
  2384. if (!res) {
  2385. sdev_printk(KERN_ERR, scsi_cmd->device,
  2386. "reset_device: NULL resource pointer\n");
  2387. return FAILED;
  2388. }
  2389. /* If adapter is currently going through reset/reload, return failed.
  2390. * This will force the mid-layer to call _eh_bus/host reset, which
  2391. * will then go to sleep and wait for the reset to complete
  2392. */
  2393. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2394. if (pinstance->ioa_reset_in_progress ||
  2395. pinstance->ioa_state == IOA_STATE_DEAD) {
  2396. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2397. return FAILED;
  2398. }
  2399. res->reset_progress = 1;
  2400. pmcraid_info("Resetting %s resource with addr %x\n",
  2401. ((modifier & RESET_DEVICE_LUN) ? "LUN" :
  2402. ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
  2403. le32_to_cpu(res->cfg_entry.resource_address));
  2404. /* get a free cmd block */
  2405. cmd = pmcraid_get_free_cmd(pinstance);
  2406. if (cmd == NULL) {
  2407. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2408. pmcraid_err("%s: no cmd blocks are available\n", __func__);
  2409. return FAILED;
  2410. }
  2411. ioarcb = &cmd->ioa_cb->ioarcb;
  2412. ioarcb->resource_handle = res->cfg_entry.resource_handle;
  2413. ioarcb->request_type = REQ_TYPE_IOACMD;
  2414. ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
  2415. /* Initialize reset modifier bits */
  2416. if (modifier)
  2417. modifier = ENABLE_RESET_MODIFIER | modifier;
  2418. ioarcb->cdb[1] = modifier;
  2419. init_completion(&cmd->wait_for_completion);
  2420. cmd->completion_req = 1;
  2421. pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
  2422. cmd->ioa_cb->ioarcb.cdb[0],
  2423. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
  2424. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
  2425. pmcraid_send_cmd(cmd,
  2426. pmcraid_internal_done,
  2427. timeout,
  2428. pmcraid_timeout_handler);
  2429. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2430. /* RESET_DEVICE command completes after all pending IOARCBs are
  2431. * completed. Once this command is completed, pmcraind_internal_done
  2432. * will wake up the 'completion' queue.
  2433. */
  2434. wait_for_completion(&cmd->wait_for_completion);
  2435. /* complete the command here itself and return the command block
  2436. * to free list
  2437. */
  2438. pmcraid_return_cmd(cmd);
  2439. res->reset_progress = 0;
  2440. ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  2441. /* set the return value based on the returned ioasc */
  2442. return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  2443. }
  2444. /**
  2445. * _pmcraid_io_done - helper for pmcraid_io_done function
  2446. *
  2447. * @cmd: pointer to pmcraid command struct
  2448. * @reslen: residual data length to be set in the ioasa
  2449. * @ioasc: ioasc either returned by IOA or set by driver itself.
  2450. *
  2451. * This function is invoked by pmcraid_io_done to complete mid-layer
  2452. * scsi ops.
  2453. *
  2454. * Return value:
  2455. * 0 if caller is required to return it to free_pool. Returns 1 if
  2456. * caller need not worry about freeing command block as error handler
  2457. * will take care of that.
  2458. */
  2459. static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
  2460. {
  2461. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2462. int rc = 0;
  2463. scsi_set_resid(scsi_cmd, reslen);
  2464. pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
  2465. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  2466. cmd->ioa_cb->ioarcb.cdb[0],
  2467. ioasc, scsi_cmd->result);
  2468. if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
  2469. rc = pmcraid_error_handler(cmd);
  2470. if (rc == 0) {
  2471. scsi_dma_unmap(scsi_cmd);
  2472. scsi_cmd->scsi_done(scsi_cmd);
  2473. }
  2474. return rc;
  2475. }
  2476. /**
  2477. * pmcraid_io_done - SCSI completion function
  2478. *
  2479. * @cmd: pointer to pmcraid command struct
  2480. *
  2481. * This function is invoked by tasklet/mid-layer error handler to completing
  2482. * the SCSI ops sent from mid-layer.
  2483. *
  2484. * Return value
  2485. * none
  2486. */
  2487. static void pmcraid_io_done(struct pmcraid_cmd *cmd)
  2488. {
  2489. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  2490. u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
  2491. if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
  2492. pmcraid_return_cmd(cmd);
  2493. }
  2494. /**
  2495. * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA
  2496. *
  2497. * @cmd: command block of the command to be aborted
  2498. *
  2499. * Return Value:
  2500. * returns pointer to command structure used as cancelling cmd
  2501. */
  2502. static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
  2503. {
  2504. struct pmcraid_cmd *cancel_cmd;
  2505. struct pmcraid_instance *pinstance;
  2506. pinstance = (struct pmcraid_instance *)cmd->drv_inst;
  2507. cancel_cmd = pmcraid_get_free_cmd(pinstance);
  2508. if (cancel_cmd == NULL) {
  2509. pmcraid_err("%s: no cmd blocks are available\n", __func__);
  2510. return NULL;
  2511. }
  2512. pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
  2513. pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
  2514. cmd->ioa_cb->ioarcb.cdb[0],
  2515. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
  2516. init_completion(&cancel_cmd->wait_for_completion);
  2517. cancel_cmd->completion_req = 1;
  2518. pmcraid_info("command (%d) CDB[0] = %x for %x\n",
  2519. le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
  2520. cancel_cmd->ioa_cb->ioarcb.cdb[0],
  2521. le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
  2522. pmcraid_send_cmd(cancel_cmd,
  2523. pmcraid_internal_done,
  2524. PMCRAID_INTERNAL_TIMEOUT,
  2525. pmcraid_timeout_handler);
  2526. return cancel_cmd;
  2527. }
  2528. /**
  2529. * pmcraid_abort_complete - Waits for ABORT TASK completion
  2530. *
  2531. * @cancel_cmd: command block use as cancelling command
  2532. *
  2533. * Return Value:
  2534. * returns SUCCESS if ABORT TASK has good completion
  2535. * otherwise FAILED
  2536. */
  2537. static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
  2538. {
  2539. struct pmcraid_resource_entry *res;
  2540. u32 ioasc;
  2541. wait_for_completion(&cancel_cmd->wait_for_completion);
  2542. res = cancel_cmd->res;
  2543. cancel_cmd->res = NULL;
  2544. ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
  2545. /* If the abort task is not timed out we will get a Good completion
  2546. * as sense_key, otherwise we may get one the following responses
  2547. * due to subsequent bus reset or device reset. In case IOASC is
  2548. * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource
  2549. */
  2550. if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
  2551. ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
  2552. if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
  2553. res->sync_reqd = 1;
  2554. ioasc = 0;
  2555. }
  2556. /* complete the command here itself */
  2557. pmcraid_return_cmd(cancel_cmd);
  2558. return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  2559. }
  2560. /**
  2561. * pmcraid_eh_abort_handler - entry point for aborting a single task on errors
  2562. *
  2563. * @scsi_cmd: scsi command struct given by mid-layer. When this is called
  2564. * mid-layer ensures that no other commands are queued. This
  2565. * never gets called under interrupt, but a separate eh thread.
  2566. *
  2567. * Return value:
  2568. * SUCCESS / FAILED
  2569. */
  2570. static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
  2571. {
  2572. struct pmcraid_instance *pinstance;
  2573. struct pmcraid_cmd *cmd;
  2574. struct pmcraid_resource_entry *res;
  2575. unsigned long host_lock_flags;
  2576. unsigned long pending_lock_flags;
  2577. struct pmcraid_cmd *cancel_cmd = NULL;
  2578. int cmd_found = 0;
  2579. int rc = FAILED;
  2580. pinstance =
  2581. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2582. scmd_printk(KERN_INFO, scsi_cmd,
  2583. "I/O command timed out, aborting it.\n");
  2584. res = scsi_cmd->device->hostdata;
  2585. if (res == NULL)
  2586. return rc;
  2587. /* If we are currently going through reset/reload, return failed.
  2588. * This will force the mid-layer to eventually call
  2589. * pmcraid_eh_host_reset which will then go to sleep and wait for the
  2590. * reset to complete
  2591. */
  2592. spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
  2593. if (pinstance->ioa_reset_in_progress ||
  2594. pinstance->ioa_state == IOA_STATE_DEAD) {
  2595. spin_unlock_irqrestore(pinstance->host->host_lock,
  2596. host_lock_flags);
  2597. return rc;
  2598. }
  2599. /* loop over pending cmd list to find cmd corresponding to this
  2600. * scsi_cmd. Note that this command might not have been completed
  2601. * already. locking: all pending commands are protected with
  2602. * pending_pool_lock.
  2603. */
  2604. spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
  2605. list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
  2606. if (cmd->scsi_cmd == scsi_cmd) {
  2607. cmd_found = 1;
  2608. break;
  2609. }
  2610. }
  2611. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  2612. pending_lock_flags);
  2613. /* If the command to be aborted was given to IOA and still pending with
  2614. * it, send ABORT_TASK to abort this and wait for its completion
  2615. */
  2616. if (cmd_found)
  2617. cancel_cmd = pmcraid_abort_cmd(cmd);
  2618. spin_unlock_irqrestore(pinstance->host->host_lock,
  2619. host_lock_flags);
  2620. if (cancel_cmd) {
  2621. cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
  2622. rc = pmcraid_abort_complete(cancel_cmd);
  2623. }
  2624. return cmd_found ? rc : SUCCESS;
  2625. }
  2626. /**
  2627. * pmcraid_eh_xxxx_reset_handler - bus/target/device reset handler callbacks
  2628. *
  2629. * @scmd: pointer to scsi_cmd that was sent to the resource to be reset.
  2630. *
  2631. * All these routines invokve pmcraid_reset_device with appropriate parameters.
  2632. * Since these are called from mid-layer EH thread, no other IO will be queued
  2633. * to the resource being reset. However, control path (IOCTL) may be active so
  2634. * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device
  2635. * takes care by locking/unlocking host_lock.
  2636. *
  2637. * Return value
  2638. * SUCCESS or FAILED
  2639. */
  2640. static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
  2641. {
  2642. scmd_printk(KERN_INFO, scmd,
  2643. "resetting device due to an I/O command timeout.\n");
  2644. return pmcraid_reset_device(scmd,
  2645. PMCRAID_INTERNAL_TIMEOUT,
  2646. RESET_DEVICE_LUN);
  2647. }
  2648. static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
  2649. {
  2650. scmd_printk(KERN_INFO, scmd,
  2651. "Doing bus reset due to an I/O command timeout.\n");
  2652. return pmcraid_reset_device(scmd,
  2653. PMCRAID_RESET_BUS_TIMEOUT,
  2654. RESET_DEVICE_BUS);
  2655. }
  2656. static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
  2657. {
  2658. scmd_printk(KERN_INFO, scmd,
  2659. "Doing target reset due to an I/O command timeout.\n");
  2660. return pmcraid_reset_device(scmd,
  2661. PMCRAID_INTERNAL_TIMEOUT,
  2662. RESET_DEVICE_TARGET);
  2663. }
  2664. /**
  2665. * pmcraid_eh_host_reset_handler - adapter reset handler callback
  2666. *
  2667. * @scmd: pointer to scsi_cmd that was sent to a resource of adapter
  2668. *
  2669. * Initiates adapter reset to bring it up to operational state
  2670. *
  2671. * Return value
  2672. * SUCCESS or FAILED
  2673. */
  2674. static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
  2675. {
  2676. unsigned long interval = 10000; /* 10 seconds interval */
  2677. int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
  2678. struct pmcraid_instance *pinstance =
  2679. (struct pmcraid_instance *)(scmd->device->host->hostdata);
  2680. /* wait for an additional 150 seconds just in case firmware could come
  2681. * up and if it could complete all the pending commands excluding the
  2682. * two HCAM (CCN and LDN).
  2683. */
  2684. while (waits--) {
  2685. if (atomic_read(&pinstance->outstanding_cmds) <=
  2686. PMCRAID_MAX_HCAM_CMD)
  2687. return SUCCESS;
  2688. msleep(interval);
  2689. }
  2690. dev_err(&pinstance->pdev->dev,
  2691. "Adapter being reset due to an I/O command timeout.\n");
  2692. return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
  2693. }
  2694. /**
  2695. * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB
  2696. * @cmd: pmcraid command struct
  2697. * @sgcount: count of scatter-gather elements
  2698. *
  2699. * Return value
  2700. * returns pointer pmcraid_ioadl_desc, initialized to point to internal
  2701. * or external IOADLs
  2702. */
  2703. static struct pmcraid_ioadl_desc *
  2704. pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
  2705. {
  2706. struct pmcraid_ioadl_desc *ioadl;
  2707. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2708. int ioadl_count = 0;
  2709. if (ioarcb->add_cmd_param_length)
  2710. ioadl_count = DIV_ROUND_UP(le16_to_cpu(ioarcb->add_cmd_param_length), 16);
  2711. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc) * sgcount);
  2712. if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
  2713. /* external ioadls start at offset 0x80 from control_block
  2714. * structure, re-using 24 out of 27 ioadls part of IOARCB.
  2715. * It is necessary to indicate to firmware that driver is
  2716. * using ioadls to be treated as external to IOARCB.
  2717. */
  2718. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
  2719. ioarcb->ioadl_bus_addr =
  2720. cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2721. offsetof(struct pmcraid_ioarcb,
  2722. add_data.u.ioadl[3]));
  2723. ioadl = &ioarcb->add_data.u.ioadl[3];
  2724. } else {
  2725. ioarcb->ioadl_bus_addr =
  2726. cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2727. offsetof(struct pmcraid_ioarcb,
  2728. add_data.u.ioadl[ioadl_count]));
  2729. ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
  2730. ioarcb->ioarcb_bus_addr |=
  2731. cpu_to_le64(DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8));
  2732. }
  2733. return ioadl;
  2734. }
  2735. /**
  2736. * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer
  2737. * @pinstance: pointer to adapter instance structure
  2738. * @cmd: pmcraid command struct
  2739. *
  2740. * This function is invoked by queuecommand entry point while sending a command
  2741. * to firmware. This builds ioadl descriptors and sets up ioarcb fields.
  2742. *
  2743. * Return value:
  2744. * 0 on success or -1 on failure
  2745. */
  2746. static int pmcraid_build_ioadl(
  2747. struct pmcraid_instance *pinstance,
  2748. struct pmcraid_cmd *cmd
  2749. )
  2750. {
  2751. int i, nseg;
  2752. struct scatterlist *sglist;
  2753. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2754. struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
  2755. struct pmcraid_ioadl_desc *ioadl;
  2756. u32 length = scsi_bufflen(scsi_cmd);
  2757. if (!length)
  2758. return 0;
  2759. nseg = scsi_dma_map(scsi_cmd);
  2760. if (nseg < 0) {
  2761. scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
  2762. return -1;
  2763. } else if (nseg > PMCRAID_MAX_IOADLS) {
  2764. scsi_dma_unmap(scsi_cmd);
  2765. scmd_printk(KERN_ERR, scsi_cmd,
  2766. "sg count is (%d) more than allowed!\n", nseg);
  2767. return -1;
  2768. }
  2769. /* Initialize IOARCB data transfer length fields */
  2770. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
  2771. ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
  2772. ioarcb->request_flags0 |= NO_LINK_DESCS;
  2773. ioarcb->data_transfer_length = cpu_to_le32(length);
  2774. ioadl = pmcraid_init_ioadls(cmd, nseg);
  2775. /* Initialize IOADL descriptor addresses */
  2776. scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
  2777. ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
  2778. ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
  2779. ioadl[i].flags = 0;
  2780. }
  2781. /* setup last descriptor */
  2782. ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
  2783. return 0;
  2784. }
  2785. /**
  2786. * pmcraid_free_sglist - Frees an allocated SG buffer list
  2787. * @sglist: scatter/gather list pointer
  2788. *
  2789. * Free a DMA'able memory previously allocated with pmcraid_alloc_sglist
  2790. *
  2791. * Return value:
  2792. * none
  2793. */
  2794. static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
  2795. {
  2796. sgl_free_order(sglist->scatterlist, sglist->order);
  2797. kfree(sglist);
  2798. }
  2799. /**
  2800. * pmcraid_alloc_sglist - Allocates memory for a SG list
  2801. * @buflen: buffer length
  2802. *
  2803. * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
  2804. * list.
  2805. *
  2806. * Return value
  2807. * pointer to sglist / NULL on failure
  2808. */
  2809. static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
  2810. {
  2811. struct pmcraid_sglist *sglist;
  2812. int sg_size;
  2813. int order;
  2814. sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
  2815. order = (sg_size > 0) ? get_order(sg_size) : 0;
  2816. /* Allocate a scatter/gather list for the DMA */
  2817. sglist = kzalloc(sizeof(struct pmcraid_sglist), GFP_KERNEL);
  2818. if (sglist == NULL)
  2819. return NULL;
  2820. sglist->order = order;
  2821. sgl_alloc_order(buflen, order, false,
  2822. GFP_KERNEL | GFP_DMA | __GFP_ZERO, &sglist->num_sg);
  2823. return sglist;
  2824. }
  2825. /**
  2826. * pmcraid_copy_sglist - Copy user buffer to kernel buffer's SG list
  2827. * @sglist: scatter/gather list pointer
  2828. * @buffer: buffer pointer
  2829. * @len: buffer length
  2830. * @direction: data transfer direction
  2831. *
  2832. * Copy a user buffer into a buffer allocated by pmcraid_alloc_sglist
  2833. *
  2834. * Return value:
  2835. * 0 on success / other on failure
  2836. */
  2837. static int pmcraid_copy_sglist(
  2838. struct pmcraid_sglist *sglist,
  2839. void __user *buffer,
  2840. u32 len,
  2841. int direction
  2842. )
  2843. {
  2844. struct scatterlist *sg;
  2845. void *kaddr;
  2846. int bsize_elem;
  2847. int i;
  2848. int rc = 0;
  2849. /* Determine the actual number of bytes per element */
  2850. bsize_elem = PAGE_SIZE * (1 << sglist->order);
  2851. sg = sglist->scatterlist;
  2852. for (i = 0; i < (len / bsize_elem); i++, sg = sg_next(sg), buffer += bsize_elem) {
  2853. struct page *page = sg_page(sg);
  2854. kaddr = kmap(page);
  2855. if (direction == DMA_TO_DEVICE)
  2856. rc = copy_from_user(kaddr, buffer, bsize_elem);
  2857. else
  2858. rc = copy_to_user(buffer, kaddr, bsize_elem);
  2859. kunmap(page);
  2860. if (rc) {
  2861. pmcraid_err("failed to copy user data into sg list\n");
  2862. return -EFAULT;
  2863. }
  2864. sg->length = bsize_elem;
  2865. }
  2866. if (len % bsize_elem) {
  2867. struct page *page = sg_page(sg);
  2868. kaddr = kmap(page);
  2869. if (direction == DMA_TO_DEVICE)
  2870. rc = copy_from_user(kaddr, buffer, len % bsize_elem);
  2871. else
  2872. rc = copy_to_user(buffer, kaddr, len % bsize_elem);
  2873. kunmap(page);
  2874. sg->length = len % bsize_elem;
  2875. }
  2876. if (rc) {
  2877. pmcraid_err("failed to copy user data into sg list\n");
  2878. rc = -EFAULT;
  2879. }
  2880. return rc;
  2881. }
  2882. /**
  2883. * pmcraid_queuecommand - Queue a mid-layer request
  2884. * @scsi_cmd: scsi command struct
  2885. * @done: done function
  2886. *
  2887. * This function queues a request generated by the mid-layer. Midlayer calls
  2888. * this routine within host->lock. Some of the functions called by queuecommand
  2889. * would use cmd block queue locks (free_pool_lock and pending_pool_lock)
  2890. *
  2891. * Return value:
  2892. * 0 on success
  2893. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  2894. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  2895. */
  2896. static int pmcraid_queuecommand_lck(
  2897. struct scsi_cmnd *scsi_cmd,
  2898. void (*done) (struct scsi_cmnd *)
  2899. )
  2900. {
  2901. struct pmcraid_instance *pinstance;
  2902. struct pmcraid_resource_entry *res;
  2903. struct pmcraid_ioarcb *ioarcb;
  2904. struct pmcraid_cmd *cmd;
  2905. u32 fw_version;
  2906. int rc = 0;
  2907. pinstance =
  2908. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2909. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  2910. scsi_cmd->scsi_done = done;
  2911. res = scsi_cmd->device->hostdata;
  2912. scsi_cmd->result = (DID_OK << 16);
  2913. /* if adapter is marked as dead, set result to DID_NO_CONNECT complete
  2914. * the command
  2915. */
  2916. if (pinstance->ioa_state == IOA_STATE_DEAD) {
  2917. pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
  2918. scsi_cmd->result = (DID_NO_CONNECT << 16);
  2919. scsi_cmd->scsi_done(scsi_cmd);
  2920. return 0;
  2921. }
  2922. /* If IOA reset is in progress, can't queue the commands */
  2923. if (pinstance->ioa_reset_in_progress)
  2924. return SCSI_MLQUEUE_HOST_BUSY;
  2925. /* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete
  2926. * the command here itself with success return
  2927. */
  2928. if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
  2929. pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
  2930. scsi_cmd->scsi_done(scsi_cmd);
  2931. return 0;
  2932. }
  2933. /* initialize the command and IOARCB to be sent to IOA */
  2934. cmd = pmcraid_get_free_cmd(pinstance);
  2935. if (cmd == NULL) {
  2936. pmcraid_err("free command block is not available\n");
  2937. return SCSI_MLQUEUE_HOST_BUSY;
  2938. }
  2939. cmd->scsi_cmd = scsi_cmd;
  2940. ioarcb = &(cmd->ioa_cb->ioarcb);
  2941. memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  2942. ioarcb->resource_handle = res->cfg_entry.resource_handle;
  2943. ioarcb->request_type = REQ_TYPE_SCSI;
  2944. /* set hrrq number where the IOA should respond to. Note that all cmds
  2945. * generated internally uses hrrq_id 0, exception to this is the cmd
  2946. * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
  2947. * hrrq_id assigned here in queuecommand
  2948. */
  2949. ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
  2950. pinstance->num_hrrq;
  2951. cmd->cmd_done = pmcraid_io_done;
  2952. if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
  2953. if (scsi_cmd->underflow == 0)
  2954. ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
  2955. if (res->sync_reqd) {
  2956. ioarcb->request_flags0 |= SYNC_COMPLETE;
  2957. res->sync_reqd = 0;
  2958. }
  2959. ioarcb->request_flags0 |= NO_LINK_DESCS;
  2960. if (scsi_cmd->flags & SCMD_TAGGED)
  2961. ioarcb->request_flags1 |= TASK_TAG_SIMPLE;
  2962. if (RES_IS_GSCSI(res->cfg_entry))
  2963. ioarcb->request_flags1 |= DELAY_AFTER_RESET;
  2964. }
  2965. rc = pmcraid_build_ioadl(pinstance, cmd);
  2966. pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
  2967. le32_to_cpu(ioarcb->response_handle) >> 2,
  2968. scsi_cmd->cmnd[0], pinstance->host->unique_id,
  2969. RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
  2970. PMCRAID_PHYS_BUS_ID,
  2971. RES_IS_VSET(res->cfg_entry) ?
  2972. (fw_version <= PMCRAID_FW_VERSION_1 ?
  2973. res->cfg_entry.unique_flags1 :
  2974. le16_to_cpu(res->cfg_entry.array_id) & 0xFF) :
  2975. RES_TARGET(res->cfg_entry.resource_address),
  2976. RES_LUN(res->cfg_entry.resource_address));
  2977. if (likely(rc == 0)) {
  2978. _pmcraid_fire_command(cmd);
  2979. } else {
  2980. pmcraid_err("queuecommand could not build ioadl\n");
  2981. pmcraid_return_cmd(cmd);
  2982. rc = SCSI_MLQUEUE_HOST_BUSY;
  2983. }
  2984. return rc;
  2985. }
  2986. static DEF_SCSI_QCMD(pmcraid_queuecommand)
  2987. /**
  2988. * pmcraid_open -char node "open" entry, allowed only users with admin access
  2989. */
  2990. static int pmcraid_chr_open(struct inode *inode, struct file *filep)
  2991. {
  2992. struct pmcraid_instance *pinstance;
  2993. if (!capable(CAP_SYS_ADMIN))
  2994. return -EACCES;
  2995. /* Populate adapter instance * pointer for use by ioctl */
  2996. pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
  2997. filep->private_data = pinstance;
  2998. return 0;
  2999. }
  3000. /**
  3001. * pmcraid_fasync - Async notifier registration from applications
  3002. *
  3003. * This function adds the calling process to a driver global queue. When an
  3004. * event occurs, SIGIO will be sent to all processes in this queue.
  3005. */
  3006. static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
  3007. {
  3008. struct pmcraid_instance *pinstance;
  3009. int rc;
  3010. pinstance = filep->private_data;
  3011. mutex_lock(&pinstance->aen_queue_lock);
  3012. rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
  3013. mutex_unlock(&pinstance->aen_queue_lock);
  3014. return rc;
  3015. }
  3016. /**
  3017. * pmcraid_build_passthrough_ioadls - builds SG elements for passthrough
  3018. * commands sent over IOCTL interface
  3019. *
  3020. * @cmd : pointer to struct pmcraid_cmd
  3021. * @buflen : length of the request buffer
  3022. * @direction : data transfer direction
  3023. *
  3024. * Return value
  3025. * 0 on success, non-zero error code on failure
  3026. */
  3027. static int pmcraid_build_passthrough_ioadls(
  3028. struct pmcraid_cmd *cmd,
  3029. int buflen,
  3030. int direction
  3031. )
  3032. {
  3033. struct pmcraid_sglist *sglist = NULL;
  3034. struct scatterlist *sg = NULL;
  3035. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  3036. struct pmcraid_ioadl_desc *ioadl;
  3037. int i;
  3038. sglist = pmcraid_alloc_sglist(buflen);
  3039. if (!sglist) {
  3040. pmcraid_err("can't allocate memory for passthrough SGls\n");
  3041. return -ENOMEM;
  3042. }
  3043. sglist->num_dma_sg = dma_map_sg(&cmd->drv_inst->pdev->dev,
  3044. sglist->scatterlist,
  3045. sglist->num_sg, direction);
  3046. if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
  3047. dev_err(&cmd->drv_inst->pdev->dev,
  3048. "Failed to map passthrough buffer!\n");
  3049. pmcraid_free_sglist(sglist);
  3050. return -EIO;
  3051. }
  3052. cmd->sglist = sglist;
  3053. ioarcb->request_flags0 |= NO_LINK_DESCS;
  3054. ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
  3055. /* Initialize IOADL descriptor addresses */
  3056. for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
  3057. ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
  3058. ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
  3059. ioadl[i].flags = 0;
  3060. }
  3061. /* setup the last descriptor */
  3062. ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
  3063. return 0;
  3064. }
  3065. /**
  3066. * pmcraid_release_passthrough_ioadls - release passthrough ioadls
  3067. *
  3068. * @cmd: pointer to struct pmcraid_cmd for which ioadls were allocated
  3069. * @buflen: size of the request buffer
  3070. * @direction: data transfer direction
  3071. *
  3072. * Return value
  3073. * 0 on success, non-zero error code on failure
  3074. */
  3075. static void pmcraid_release_passthrough_ioadls(
  3076. struct pmcraid_cmd *cmd,
  3077. int buflen,
  3078. int direction
  3079. )
  3080. {
  3081. struct pmcraid_sglist *sglist = cmd->sglist;
  3082. if (buflen > 0) {
  3083. dma_unmap_sg(&cmd->drv_inst->pdev->dev,
  3084. sglist->scatterlist,
  3085. sglist->num_sg,
  3086. direction);
  3087. pmcraid_free_sglist(sglist);
  3088. cmd->sglist = NULL;
  3089. }
  3090. }
  3091. /**
  3092. * pmcraid_ioctl_passthrough - handling passthrough IOCTL commands
  3093. *
  3094. * @pinstance: pointer to adapter instance structure
  3095. * @cmd: ioctl code
  3096. * @arg: pointer to pmcraid_passthrough_buffer user buffer
  3097. *
  3098. * Return value
  3099. * 0 on success, non-zero error code on failure
  3100. */
  3101. static long pmcraid_ioctl_passthrough(
  3102. struct pmcraid_instance *pinstance,
  3103. unsigned int ioctl_cmd,
  3104. unsigned int buflen,
  3105. void __user *arg
  3106. )
  3107. {
  3108. struct pmcraid_passthrough_ioctl_buffer *buffer;
  3109. struct pmcraid_ioarcb *ioarcb;
  3110. struct pmcraid_cmd *cmd;
  3111. struct pmcraid_cmd *cancel_cmd;
  3112. void __user *request_buffer;
  3113. unsigned long request_offset;
  3114. unsigned long lock_flags;
  3115. void __user *ioasa;
  3116. u32 ioasc;
  3117. int request_size;
  3118. int buffer_size;
  3119. u8 direction;
  3120. int rc = 0;
  3121. /* If IOA reset is in progress, wait 10 secs for reset to complete */
  3122. if (pinstance->ioa_reset_in_progress) {
  3123. rc = wait_event_interruptible_timeout(
  3124. pinstance->reset_wait_q,
  3125. !pinstance->ioa_reset_in_progress,
  3126. msecs_to_jiffies(10000));
  3127. if (!rc)
  3128. return -ETIMEDOUT;
  3129. else if (rc < 0)
  3130. return -ERESTARTSYS;
  3131. }
  3132. /* If adapter is not in operational state, return error */
  3133. if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) {
  3134. pmcraid_err("IOA is not operational\n");
  3135. return -ENOTTY;
  3136. }
  3137. buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer);
  3138. buffer = kmalloc(buffer_size, GFP_KERNEL);
  3139. if (!buffer) {
  3140. pmcraid_err("no memory for passthrough buffer\n");
  3141. return -ENOMEM;
  3142. }
  3143. request_offset =
  3144. offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer);
  3145. request_buffer = arg + request_offset;
  3146. rc = copy_from_user(buffer, arg,
  3147. sizeof(struct pmcraid_passthrough_ioctl_buffer));
  3148. ioasa = arg + offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa);
  3149. if (rc) {
  3150. pmcraid_err("ioctl: can't copy passthrough buffer\n");
  3151. rc = -EFAULT;
  3152. goto out_free_buffer;
  3153. }
  3154. request_size = le32_to_cpu(buffer->ioarcb.data_transfer_length);
  3155. if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) {
  3156. direction = DMA_TO_DEVICE;
  3157. } else {
  3158. direction = DMA_FROM_DEVICE;
  3159. }
  3160. if (request_size < 0) {
  3161. rc = -EINVAL;
  3162. goto out_free_buffer;
  3163. }
  3164. /* check if we have any additional command parameters */
  3165. if (le16_to_cpu(buffer->ioarcb.add_cmd_param_length)
  3166. > PMCRAID_ADD_CMD_PARAM_LEN) {
  3167. rc = -EINVAL;
  3168. goto out_free_buffer;
  3169. }
  3170. cmd = pmcraid_get_free_cmd(pinstance);
  3171. if (!cmd) {
  3172. pmcraid_err("free command block is not available\n");
  3173. rc = -ENOMEM;
  3174. goto out_free_buffer;
  3175. }
  3176. cmd->scsi_cmd = NULL;
  3177. ioarcb = &(cmd->ioa_cb->ioarcb);
  3178. /* Copy the user-provided IOARCB stuff field by field */
  3179. ioarcb->resource_handle = buffer->ioarcb.resource_handle;
  3180. ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length;
  3181. ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout;
  3182. ioarcb->request_type = buffer->ioarcb.request_type;
  3183. ioarcb->request_flags0 = buffer->ioarcb.request_flags0;
  3184. ioarcb->request_flags1 = buffer->ioarcb.request_flags1;
  3185. memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN);
  3186. if (buffer->ioarcb.add_cmd_param_length) {
  3187. ioarcb->add_cmd_param_length =
  3188. buffer->ioarcb.add_cmd_param_length;
  3189. ioarcb->add_cmd_param_offset =
  3190. buffer->ioarcb.add_cmd_param_offset;
  3191. memcpy(ioarcb->add_data.u.add_cmd_params,
  3192. buffer->ioarcb.add_data.u.add_cmd_params,
  3193. le16_to_cpu(buffer->ioarcb.add_cmd_param_length));
  3194. }
  3195. /* set hrrq number where the IOA should respond to. Note that all cmds
  3196. * generated internally uses hrrq_id 0, exception to this is the cmd
  3197. * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
  3198. * hrrq_id assigned here in queuecommand
  3199. */
  3200. ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
  3201. pinstance->num_hrrq;
  3202. if (request_size) {
  3203. rc = pmcraid_build_passthrough_ioadls(cmd,
  3204. request_size,
  3205. direction);
  3206. if (rc) {
  3207. pmcraid_err("couldn't build passthrough ioadls\n");
  3208. goto out_free_cmd;
  3209. }
  3210. }
  3211. /* If data is being written into the device, copy the data from user
  3212. * buffers
  3213. */
  3214. if (direction == DMA_TO_DEVICE && request_size > 0) {
  3215. rc = pmcraid_copy_sglist(cmd->sglist,
  3216. request_buffer,
  3217. request_size,
  3218. direction);
  3219. if (rc) {
  3220. pmcraid_err("failed to copy user buffer\n");
  3221. goto out_free_sglist;
  3222. }
  3223. }
  3224. /* passthrough ioctl is a blocking command so, put the user to sleep
  3225. * until timeout. Note that a timeout value of 0 means, do timeout.
  3226. */
  3227. cmd->cmd_done = pmcraid_internal_done;
  3228. init_completion(&cmd->wait_for_completion);
  3229. cmd->completion_req = 1;
  3230. pmcraid_info("command(%d) (CDB[0] = %x) for %x\n",
  3231. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  3232. cmd->ioa_cb->ioarcb.cdb[0],
  3233. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle));
  3234. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3235. _pmcraid_fire_command(cmd);
  3236. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3237. /* NOTE ! Remove the below line once abort_task is implemented
  3238. * in firmware. This line disables ioctl command timeout handling logic
  3239. * similar to IO command timeout handling, making ioctl commands to wait
  3240. * until the command completion regardless of timeout value specified in
  3241. * ioarcb
  3242. */
  3243. buffer->ioarcb.cmd_timeout = 0;
  3244. /* If command timeout is specified put caller to wait till that time,
  3245. * otherwise it would be blocking wait. If command gets timed out, it
  3246. * will be aborted.
  3247. */
  3248. if (buffer->ioarcb.cmd_timeout == 0) {
  3249. wait_for_completion(&cmd->wait_for_completion);
  3250. } else if (!wait_for_completion_timeout(
  3251. &cmd->wait_for_completion,
  3252. msecs_to_jiffies(le16_to_cpu(buffer->ioarcb.cmd_timeout) * 1000))) {
  3253. pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n",
  3254. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  3255. cmd->ioa_cb->ioarcb.cdb[0]);
  3256. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3257. cancel_cmd = pmcraid_abort_cmd(cmd);
  3258. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3259. if (cancel_cmd) {
  3260. wait_for_completion(&cancel_cmd->wait_for_completion);
  3261. ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
  3262. pmcraid_return_cmd(cancel_cmd);
  3263. /* if abort task couldn't find the command i.e it got
  3264. * completed prior to aborting, return good completion.
  3265. * if command got aborted successfully or there was IOA
  3266. * reset due to abort task itself getting timedout then
  3267. * return -ETIMEDOUT
  3268. */
  3269. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  3270. PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) {
  3271. if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND)
  3272. rc = -ETIMEDOUT;
  3273. goto out_handle_response;
  3274. }
  3275. }
  3276. /* no command block for abort task or abort task failed to abort
  3277. * the IOARCB, then wait for 150 more seconds and initiate reset
  3278. * sequence after timeout
  3279. */
  3280. if (!wait_for_completion_timeout(
  3281. &cmd->wait_for_completion,
  3282. msecs_to_jiffies(150 * 1000))) {
  3283. pmcraid_reset_bringup(cmd->drv_inst);
  3284. rc = -ETIMEDOUT;
  3285. }
  3286. }
  3287. out_handle_response:
  3288. /* copy entire IOASA buffer and return IOCTL success.
  3289. * If copying IOASA to user-buffer fails, return
  3290. * EFAULT
  3291. */
  3292. if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa,
  3293. sizeof(struct pmcraid_ioasa))) {
  3294. pmcraid_err("failed to copy ioasa buffer to user\n");
  3295. rc = -EFAULT;
  3296. }
  3297. /* If the data transfer was from device, copy the data onto user
  3298. * buffers
  3299. */
  3300. else if (direction == DMA_FROM_DEVICE && request_size > 0) {
  3301. rc = pmcraid_copy_sglist(cmd->sglist,
  3302. request_buffer,
  3303. request_size,
  3304. direction);
  3305. if (rc) {
  3306. pmcraid_err("failed to copy user buffer\n");
  3307. rc = -EFAULT;
  3308. }
  3309. }
  3310. out_free_sglist:
  3311. pmcraid_release_passthrough_ioadls(cmd, request_size, direction);
  3312. out_free_cmd:
  3313. pmcraid_return_cmd(cmd);
  3314. out_free_buffer:
  3315. kfree(buffer);
  3316. return rc;
  3317. }
  3318. /**
  3319. * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself
  3320. *
  3321. * @pinstance: pointer to adapter instance structure
  3322. * @cmd: ioctl command passed in
  3323. * @buflen: length of user_buffer
  3324. * @user_buffer: user buffer pointer
  3325. *
  3326. * Return Value
  3327. * 0 in case of success, otherwise appropriate error code
  3328. */
  3329. static long pmcraid_ioctl_driver(
  3330. struct pmcraid_instance *pinstance,
  3331. unsigned int cmd,
  3332. unsigned int buflen,
  3333. void __user *user_buffer
  3334. )
  3335. {
  3336. int rc = -ENOSYS;
  3337. switch (cmd) {
  3338. case PMCRAID_IOCTL_RESET_ADAPTER:
  3339. pmcraid_reset_bringup(pinstance);
  3340. rc = 0;
  3341. break;
  3342. default:
  3343. break;
  3344. }
  3345. return rc;
  3346. }
  3347. /**
  3348. * pmcraid_check_ioctl_buffer - check for proper access to user buffer
  3349. *
  3350. * @cmd: ioctl command
  3351. * @arg: user buffer
  3352. * @hdr: pointer to kernel memory for pmcraid_ioctl_header
  3353. *
  3354. * Return Value
  3355. * negetive error code if there are access issues, otherwise zero.
  3356. * Upon success, returns ioctl header copied out of user buffer.
  3357. */
  3358. static int pmcraid_check_ioctl_buffer(
  3359. int cmd,
  3360. void __user *arg,
  3361. struct pmcraid_ioctl_header *hdr
  3362. )
  3363. {
  3364. int rc;
  3365. if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
  3366. pmcraid_err("couldn't copy ioctl header from user buffer\n");
  3367. return -EFAULT;
  3368. }
  3369. /* check for valid driver signature */
  3370. rc = memcmp(hdr->signature,
  3371. PMCRAID_IOCTL_SIGNATURE,
  3372. sizeof(hdr->signature));
  3373. if (rc) {
  3374. pmcraid_err("signature verification failed\n");
  3375. return -EINVAL;
  3376. }
  3377. return 0;
  3378. }
  3379. /**
  3380. * pmcraid_ioctl - char node ioctl entry point
  3381. */
  3382. static long pmcraid_chr_ioctl(
  3383. struct file *filep,
  3384. unsigned int cmd,
  3385. unsigned long arg
  3386. )
  3387. {
  3388. struct pmcraid_instance *pinstance = NULL;
  3389. struct pmcraid_ioctl_header *hdr = NULL;
  3390. void __user *argp = (void __user *)arg;
  3391. int retval = -ENOTTY;
  3392. hdr = kmalloc(sizeof(struct pmcraid_ioctl_header), GFP_KERNEL);
  3393. if (!hdr) {
  3394. pmcraid_err("failed to allocate memory for ioctl header\n");
  3395. return -ENOMEM;
  3396. }
  3397. retval = pmcraid_check_ioctl_buffer(cmd, argp, hdr);
  3398. if (retval) {
  3399. pmcraid_info("chr_ioctl: header check failed\n");
  3400. kfree(hdr);
  3401. return retval;
  3402. }
  3403. pinstance = filep->private_data;
  3404. if (!pinstance) {
  3405. pmcraid_info("adapter instance is not found\n");
  3406. kfree(hdr);
  3407. return -ENOTTY;
  3408. }
  3409. switch (_IOC_TYPE(cmd)) {
  3410. case PMCRAID_PASSTHROUGH_IOCTL:
  3411. /* If ioctl code is to download microcode, we need to block
  3412. * mid-layer requests.
  3413. */
  3414. if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
  3415. scsi_block_requests(pinstance->host);
  3416. retval = pmcraid_ioctl_passthrough(pinstance, cmd,
  3417. hdr->buffer_length, argp);
  3418. if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
  3419. scsi_unblock_requests(pinstance->host);
  3420. break;
  3421. case PMCRAID_DRIVER_IOCTL:
  3422. arg += sizeof(struct pmcraid_ioctl_header);
  3423. retval = pmcraid_ioctl_driver(pinstance, cmd,
  3424. hdr->buffer_length, argp);
  3425. break;
  3426. default:
  3427. retval = -ENOTTY;
  3428. break;
  3429. }
  3430. kfree(hdr);
  3431. return retval;
  3432. }
  3433. /**
  3434. * File operations structure for management interface
  3435. */
  3436. static const struct file_operations pmcraid_fops = {
  3437. .owner = THIS_MODULE,
  3438. .open = pmcraid_chr_open,
  3439. .fasync = pmcraid_chr_fasync,
  3440. .unlocked_ioctl = pmcraid_chr_ioctl,
  3441. .compat_ioctl = compat_ptr_ioctl,
  3442. .llseek = noop_llseek,
  3443. };
  3444. /**
  3445. * pmcraid_show_log_level - Display adapter's error logging level
  3446. * @dev: class device struct
  3447. * @buf: buffer
  3448. *
  3449. * Return value:
  3450. * number of bytes printed to buffer
  3451. */
  3452. static ssize_t pmcraid_show_log_level(
  3453. struct device *dev,
  3454. struct device_attribute *attr,
  3455. char *buf)
  3456. {
  3457. struct Scsi_Host *shost = class_to_shost(dev);
  3458. struct pmcraid_instance *pinstance =
  3459. (struct pmcraid_instance *)shost->hostdata;
  3460. return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
  3461. }
  3462. /**
  3463. * pmcraid_store_log_level - Change the adapter's error logging level
  3464. * @dev: class device struct
  3465. * @buf: buffer
  3466. * @count: not used
  3467. *
  3468. * Return value:
  3469. * number of bytes printed to buffer
  3470. */
  3471. static ssize_t pmcraid_store_log_level(
  3472. struct device *dev,
  3473. struct device_attribute *attr,
  3474. const char *buf,
  3475. size_t count
  3476. )
  3477. {
  3478. struct Scsi_Host *shost;
  3479. struct pmcraid_instance *pinstance;
  3480. u8 val;
  3481. if (kstrtou8(buf, 10, &val))
  3482. return -EINVAL;
  3483. /* log-level should be from 0 to 2 */
  3484. if (val > 2)
  3485. return -EINVAL;
  3486. shost = class_to_shost(dev);
  3487. pinstance = (struct pmcraid_instance *)shost->hostdata;
  3488. pinstance->current_log_level = val;
  3489. return strlen(buf);
  3490. }
  3491. static struct device_attribute pmcraid_log_level_attr = {
  3492. .attr = {
  3493. .name = "log_level",
  3494. .mode = S_IRUGO | S_IWUSR,
  3495. },
  3496. .show = pmcraid_show_log_level,
  3497. .store = pmcraid_store_log_level,
  3498. };
  3499. /**
  3500. * pmcraid_show_drv_version - Display driver version
  3501. * @dev: class device struct
  3502. * @buf: buffer
  3503. *
  3504. * Return value:
  3505. * number of bytes printed to buffer
  3506. */
  3507. static ssize_t pmcraid_show_drv_version(
  3508. struct device *dev,
  3509. struct device_attribute *attr,
  3510. char *buf
  3511. )
  3512. {
  3513. return snprintf(buf, PAGE_SIZE, "version: %s\n",
  3514. PMCRAID_DRIVER_VERSION);
  3515. }
  3516. static struct device_attribute pmcraid_driver_version_attr = {
  3517. .attr = {
  3518. .name = "drv_version",
  3519. .mode = S_IRUGO,
  3520. },
  3521. .show = pmcraid_show_drv_version,
  3522. };
  3523. /**
  3524. * pmcraid_show_io_adapter_id - Display driver assigned adapter id
  3525. * @dev: class device struct
  3526. * @buf: buffer
  3527. *
  3528. * Return value:
  3529. * number of bytes printed to buffer
  3530. */
  3531. static ssize_t pmcraid_show_adapter_id(
  3532. struct device *dev,
  3533. struct device_attribute *attr,
  3534. char *buf
  3535. )
  3536. {
  3537. struct Scsi_Host *shost = class_to_shost(dev);
  3538. struct pmcraid_instance *pinstance =
  3539. (struct pmcraid_instance *)shost->hostdata;
  3540. u32 adapter_id = (pinstance->pdev->bus->number << 8) |
  3541. pinstance->pdev->devfn;
  3542. u32 aen_group = pmcraid_event_family.id;
  3543. return snprintf(buf, PAGE_SIZE,
  3544. "adapter id: %d\nminor: %d\naen group: %d\n",
  3545. adapter_id, MINOR(pinstance->cdev.dev), aen_group);
  3546. }
  3547. static struct device_attribute pmcraid_adapter_id_attr = {
  3548. .attr = {
  3549. .name = "adapter_id",
  3550. .mode = S_IRUGO,
  3551. },
  3552. .show = pmcraid_show_adapter_id,
  3553. };
  3554. static struct device_attribute *pmcraid_host_attrs[] = {
  3555. &pmcraid_log_level_attr,
  3556. &pmcraid_driver_version_attr,
  3557. &pmcraid_adapter_id_attr,
  3558. NULL,
  3559. };
  3560. /* host template structure for pmcraid driver */
  3561. static struct scsi_host_template pmcraid_host_template = {
  3562. .module = THIS_MODULE,
  3563. .name = PMCRAID_DRIVER_NAME,
  3564. .queuecommand = pmcraid_queuecommand,
  3565. .eh_abort_handler = pmcraid_eh_abort_handler,
  3566. .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
  3567. .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
  3568. .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
  3569. .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
  3570. .slave_alloc = pmcraid_slave_alloc,
  3571. .slave_configure = pmcraid_slave_configure,
  3572. .slave_destroy = pmcraid_slave_destroy,
  3573. .change_queue_depth = pmcraid_change_queue_depth,
  3574. .can_queue = PMCRAID_MAX_IO_CMD,
  3575. .this_id = -1,
  3576. .sg_tablesize = PMCRAID_MAX_IOADLS,
  3577. .max_sectors = PMCRAID_IOA_MAX_SECTORS,
  3578. .no_write_same = 1,
  3579. .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
  3580. .shost_attrs = pmcraid_host_attrs,
  3581. .proc_name = PMCRAID_DRIVER_NAME,
  3582. };
  3583. /*
  3584. * pmcraid_isr_msix - implements MSI-X interrupt handling routine
  3585. * @irq: interrupt vector number
  3586. * @dev_id: pointer hrrq_vector
  3587. *
  3588. * Return Value
  3589. * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
  3590. */
  3591. static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
  3592. {
  3593. struct pmcraid_isr_param *hrrq_vector;
  3594. struct pmcraid_instance *pinstance;
  3595. unsigned long lock_flags;
  3596. u32 intrs_val;
  3597. int hrrq_id;
  3598. hrrq_vector = (struct pmcraid_isr_param *)dev_id;
  3599. hrrq_id = hrrq_vector->hrrq_id;
  3600. pinstance = hrrq_vector->drv_inst;
  3601. if (!hrrq_id) {
  3602. /* Read the interrupt */
  3603. intrs_val = pmcraid_read_interrupts(pinstance);
  3604. if (intrs_val &&
  3605. ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
  3606. & DOORBELL_INTR_MSIX_CLR) == 0)) {
  3607. /* Any error interrupts including unit_check,
  3608. * initiate IOA reset.In case of unit check indicate
  3609. * to reset_sequence that IOA unit checked and prepare
  3610. * for a dump during reset sequence
  3611. */
  3612. if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
  3613. if (intrs_val & INTRS_IOA_UNIT_CHECK)
  3614. pinstance->ioa_unit_check = 1;
  3615. pmcraid_err("ISR: error interrupts: %x \
  3616. initiating reset\n", intrs_val);
  3617. spin_lock_irqsave(pinstance->host->host_lock,
  3618. lock_flags);
  3619. pmcraid_initiate_reset(pinstance);
  3620. spin_unlock_irqrestore(
  3621. pinstance->host->host_lock,
  3622. lock_flags);
  3623. }
  3624. /* If interrupt was as part of the ioa initialization,
  3625. * clear it. Delete the timer and wakeup the
  3626. * reset engine to proceed with reset sequence
  3627. */
  3628. if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
  3629. pmcraid_clr_trans_op(pinstance);
  3630. /* Clear the interrupt register by writing
  3631. * to host to ioa doorbell. Once done
  3632. * FW will clear the interrupt.
  3633. */
  3634. iowrite32(DOORBELL_INTR_MSIX_CLR,
  3635. pinstance->int_regs.host_ioa_interrupt_reg);
  3636. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  3637. }
  3638. }
  3639. tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
  3640. return IRQ_HANDLED;
  3641. }
  3642. /**
  3643. * pmcraid_isr - implements legacy interrupt handling routine
  3644. *
  3645. * @irq: interrupt vector number
  3646. * @dev_id: pointer hrrq_vector
  3647. *
  3648. * Return Value
  3649. * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
  3650. */
  3651. static irqreturn_t pmcraid_isr(int irq, void *dev_id)
  3652. {
  3653. struct pmcraid_isr_param *hrrq_vector;
  3654. struct pmcraid_instance *pinstance;
  3655. u32 intrs;
  3656. unsigned long lock_flags;
  3657. int hrrq_id = 0;
  3658. /* In case of legacy interrupt mode where interrupts are shared across
  3659. * isrs, it may be possible that the current interrupt is not from IOA
  3660. */
  3661. if (!dev_id) {
  3662. printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
  3663. return IRQ_NONE;
  3664. }
  3665. hrrq_vector = (struct pmcraid_isr_param *)dev_id;
  3666. pinstance = hrrq_vector->drv_inst;
  3667. intrs = pmcraid_read_interrupts(pinstance);
  3668. if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0))
  3669. return IRQ_NONE;
  3670. /* Any error interrupts including unit_check, initiate IOA reset.
  3671. * In case of unit check indicate to reset_sequence that IOA unit
  3672. * checked and prepare for a dump during reset sequence
  3673. */
  3674. if (intrs & PMCRAID_ERROR_INTERRUPTS) {
  3675. if (intrs & INTRS_IOA_UNIT_CHECK)
  3676. pinstance->ioa_unit_check = 1;
  3677. iowrite32(intrs,
  3678. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3679. pmcraid_err("ISR: error interrupts: %x initiating reset\n",
  3680. intrs);
  3681. intrs = ioread32(
  3682. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3683. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3684. pmcraid_initiate_reset(pinstance);
  3685. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3686. } else {
  3687. /* If interrupt was as part of the ioa initialization,
  3688. * clear. Delete the timer and wakeup the
  3689. * reset engine to proceed with reset sequence
  3690. */
  3691. if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
  3692. pmcraid_clr_trans_op(pinstance);
  3693. } else {
  3694. iowrite32(intrs,
  3695. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3696. ioread32(
  3697. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3698. tasklet_schedule(
  3699. &(pinstance->isr_tasklet[hrrq_id]));
  3700. }
  3701. }
  3702. return IRQ_HANDLED;
  3703. }
  3704. /**
  3705. * pmcraid_worker_function - worker thread function
  3706. *
  3707. * @workp: pointer to struct work queue
  3708. *
  3709. * Return Value
  3710. * None
  3711. */
  3712. static void pmcraid_worker_function(struct work_struct *workp)
  3713. {
  3714. struct pmcraid_instance *pinstance;
  3715. struct pmcraid_resource_entry *res;
  3716. struct pmcraid_resource_entry *temp;
  3717. struct scsi_device *sdev;
  3718. unsigned long lock_flags;
  3719. unsigned long host_lock_flags;
  3720. u16 fw_version;
  3721. u8 bus, target, lun;
  3722. pinstance = container_of(workp, struct pmcraid_instance, worker_q);
  3723. /* add resources only after host is added into system */
  3724. if (!atomic_read(&pinstance->expose_resources))
  3725. return;
  3726. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  3727. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  3728. list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
  3729. if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
  3730. sdev = res->scsi_dev;
  3731. /* host_lock must be held before calling
  3732. * scsi_device_get
  3733. */
  3734. spin_lock_irqsave(pinstance->host->host_lock,
  3735. host_lock_flags);
  3736. if (!scsi_device_get(sdev)) {
  3737. spin_unlock_irqrestore(
  3738. pinstance->host->host_lock,
  3739. host_lock_flags);
  3740. pmcraid_info("deleting %x from midlayer\n",
  3741. res->cfg_entry.resource_address);
  3742. list_move_tail(&res->queue,
  3743. &pinstance->free_res_q);
  3744. spin_unlock_irqrestore(
  3745. &pinstance->resource_lock,
  3746. lock_flags);
  3747. scsi_remove_device(sdev);
  3748. scsi_device_put(sdev);
  3749. spin_lock_irqsave(&pinstance->resource_lock,
  3750. lock_flags);
  3751. res->change_detected = 0;
  3752. } else {
  3753. spin_unlock_irqrestore(
  3754. pinstance->host->host_lock,
  3755. host_lock_flags);
  3756. }
  3757. }
  3758. }
  3759. list_for_each_entry(res, &pinstance->used_res_q, queue) {
  3760. if (res->change_detected == RES_CHANGE_ADD) {
  3761. if (!pmcraid_expose_resource(fw_version,
  3762. &res->cfg_entry))
  3763. continue;
  3764. if (RES_IS_VSET(res->cfg_entry)) {
  3765. bus = PMCRAID_VSET_BUS_ID;
  3766. if (fw_version <= PMCRAID_FW_VERSION_1)
  3767. target = res->cfg_entry.unique_flags1;
  3768. else
  3769. target = le16_to_cpu(res->cfg_entry.array_id) & 0xFF;
  3770. lun = PMCRAID_VSET_LUN_ID;
  3771. } else {
  3772. bus = PMCRAID_PHYS_BUS_ID;
  3773. target =
  3774. RES_TARGET(
  3775. res->cfg_entry.resource_address);
  3776. lun = RES_LUN(res->cfg_entry.resource_address);
  3777. }
  3778. res->change_detected = 0;
  3779. spin_unlock_irqrestore(&pinstance->resource_lock,
  3780. lock_flags);
  3781. scsi_add_device(pinstance->host, bus, target, lun);
  3782. spin_lock_irqsave(&pinstance->resource_lock,
  3783. lock_flags);
  3784. }
  3785. }
  3786. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  3787. }
  3788. /**
  3789. * pmcraid_tasklet_function - Tasklet function
  3790. *
  3791. * @instance: pointer to msix param structure
  3792. *
  3793. * Return Value
  3794. * None
  3795. */
  3796. static void pmcraid_tasklet_function(unsigned long instance)
  3797. {
  3798. struct pmcraid_isr_param *hrrq_vector;
  3799. struct pmcraid_instance *pinstance;
  3800. unsigned long hrrq_lock_flags;
  3801. unsigned long pending_lock_flags;
  3802. unsigned long host_lock_flags;
  3803. spinlock_t *lockp; /* hrrq buffer lock */
  3804. int id;
  3805. u32 resp;
  3806. hrrq_vector = (struct pmcraid_isr_param *)instance;
  3807. pinstance = hrrq_vector->drv_inst;
  3808. id = hrrq_vector->hrrq_id;
  3809. lockp = &(pinstance->hrrq_lock[id]);
  3810. /* loop through each of the commands responded by IOA. Each HRRQ buf is
  3811. * protected by its own lock. Traversals must be done within this lock
  3812. * as there may be multiple tasklets running on multiple CPUs. Note
  3813. * that the lock is held just for picking up the response handle and
  3814. * manipulating hrrq_curr/toggle_bit values.
  3815. */
  3816. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3817. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3818. while ((resp & HRRQ_TOGGLE_BIT) ==
  3819. pinstance->host_toggle_bit[id]) {
  3820. int cmd_index = resp >> 2;
  3821. struct pmcraid_cmd *cmd = NULL;
  3822. if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
  3823. pinstance->hrrq_curr[id]++;
  3824. } else {
  3825. pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
  3826. pinstance->host_toggle_bit[id] ^= 1u;
  3827. }
  3828. if (cmd_index >= PMCRAID_MAX_CMD) {
  3829. /* In case of invalid response handle, log message */
  3830. pmcraid_err("Invalid response handle %d\n", cmd_index);
  3831. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3832. continue;
  3833. }
  3834. cmd = pinstance->cmd_list[cmd_index];
  3835. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  3836. spin_lock_irqsave(&pinstance->pending_pool_lock,
  3837. pending_lock_flags);
  3838. list_del(&cmd->free_list);
  3839. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  3840. pending_lock_flags);
  3841. del_timer(&cmd->timer);
  3842. atomic_dec(&pinstance->outstanding_cmds);
  3843. if (cmd->cmd_done == pmcraid_ioa_reset) {
  3844. spin_lock_irqsave(pinstance->host->host_lock,
  3845. host_lock_flags);
  3846. cmd->cmd_done(cmd);
  3847. spin_unlock_irqrestore(pinstance->host->host_lock,
  3848. host_lock_flags);
  3849. } else if (cmd->cmd_done != NULL) {
  3850. cmd->cmd_done(cmd);
  3851. }
  3852. /* loop over until we are done with all responses */
  3853. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3854. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3855. }
  3856. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  3857. }
  3858. /**
  3859. * pmcraid_unregister_interrupt_handler - de-register interrupts handlers
  3860. * @pinstance: pointer to adapter instance structure
  3861. *
  3862. * This routine un-registers registered interrupt handler and
  3863. * also frees irqs/vectors.
  3864. *
  3865. * Retun Value
  3866. * None
  3867. */
  3868. static
  3869. void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
  3870. {
  3871. struct pci_dev *pdev = pinstance->pdev;
  3872. int i;
  3873. for (i = 0; i < pinstance->num_hrrq; i++)
  3874. free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
  3875. pinstance->interrupt_mode = 0;
  3876. pci_free_irq_vectors(pdev);
  3877. }
  3878. /**
  3879. * pmcraid_register_interrupt_handler - registers interrupt handler
  3880. * @pinstance: pointer to per-adapter instance structure
  3881. *
  3882. * Return Value
  3883. * 0 on success, non-zero error code otherwise.
  3884. */
  3885. static int
  3886. pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
  3887. {
  3888. struct pci_dev *pdev = pinstance->pdev;
  3889. unsigned int irq_flag = PCI_IRQ_LEGACY, flag;
  3890. int num_hrrq, rc, i;
  3891. irq_handler_t isr;
  3892. if (pmcraid_enable_msix)
  3893. irq_flag |= PCI_IRQ_MSIX;
  3894. num_hrrq = pci_alloc_irq_vectors(pdev, 1, PMCRAID_NUM_MSIX_VECTORS,
  3895. irq_flag);
  3896. if (num_hrrq < 0)
  3897. return num_hrrq;
  3898. if (pdev->msix_enabled) {
  3899. flag = 0;
  3900. isr = pmcraid_isr_msix;
  3901. } else {
  3902. flag = IRQF_SHARED;
  3903. isr = pmcraid_isr;
  3904. }
  3905. for (i = 0; i < num_hrrq; i++) {
  3906. struct pmcraid_isr_param *vec = &pinstance->hrrq_vector[i];
  3907. vec->hrrq_id = i;
  3908. vec->drv_inst = pinstance;
  3909. rc = request_irq(pci_irq_vector(pdev, i), isr, flag,
  3910. PMCRAID_DRIVER_NAME, vec);
  3911. if (rc)
  3912. goto out_unwind;
  3913. }
  3914. pinstance->num_hrrq = num_hrrq;
  3915. if (pdev->msix_enabled) {
  3916. pinstance->interrupt_mode = 1;
  3917. iowrite32(DOORBELL_INTR_MODE_MSIX,
  3918. pinstance->int_regs.host_ioa_interrupt_reg);
  3919. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  3920. }
  3921. return 0;
  3922. out_unwind:
  3923. while (--i > 0)
  3924. free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
  3925. pci_free_irq_vectors(pdev);
  3926. return rc;
  3927. }
  3928. /**
  3929. * pmcraid_release_cmd_blocks - release buufers allocated for command blocks
  3930. * @pinstance: per adapter instance structure pointer
  3931. * @max_index: number of buffer blocks to release
  3932. *
  3933. * Return Value
  3934. * None
  3935. */
  3936. static void
  3937. pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
  3938. {
  3939. int i;
  3940. for (i = 0; i < max_index; i++) {
  3941. kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
  3942. pinstance->cmd_list[i] = NULL;
  3943. }
  3944. kmem_cache_destroy(pinstance->cmd_cachep);
  3945. pinstance->cmd_cachep = NULL;
  3946. }
  3947. /**
  3948. * pmcraid_release_control_blocks - releases buffers alloced for control blocks
  3949. * @pinstance: pointer to per adapter instance structure
  3950. * @max_index: number of buffers (from 0 onwards) to release
  3951. *
  3952. * This function assumes that the command blocks for which control blocks are
  3953. * linked are not released.
  3954. *
  3955. * Return Value
  3956. * None
  3957. */
  3958. static void
  3959. pmcraid_release_control_blocks(
  3960. struct pmcraid_instance *pinstance,
  3961. int max_index
  3962. )
  3963. {
  3964. int i;
  3965. if (pinstance->control_pool == NULL)
  3966. return;
  3967. for (i = 0; i < max_index; i++) {
  3968. dma_pool_free(pinstance->control_pool,
  3969. pinstance->cmd_list[i]->ioa_cb,
  3970. pinstance->cmd_list[i]->ioa_cb_bus_addr);
  3971. pinstance->cmd_list[i]->ioa_cb = NULL;
  3972. pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
  3973. }
  3974. dma_pool_destroy(pinstance->control_pool);
  3975. pinstance->control_pool = NULL;
  3976. }
  3977. /**
  3978. * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures
  3979. * @pinstance - pointer to per adapter instance structure
  3980. *
  3981. * Allocates memory for command blocks using kernel slab allocator.
  3982. *
  3983. * Return Value
  3984. * 0 in case of success; -ENOMEM in case of failure
  3985. */
  3986. static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
  3987. {
  3988. int i;
  3989. sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
  3990. pinstance->host->unique_id);
  3991. pinstance->cmd_cachep = kmem_cache_create(
  3992. pinstance->cmd_pool_name,
  3993. sizeof(struct pmcraid_cmd), 0,
  3994. SLAB_HWCACHE_ALIGN, NULL);
  3995. if (!pinstance->cmd_cachep)
  3996. return -ENOMEM;
  3997. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  3998. pinstance->cmd_list[i] =
  3999. kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
  4000. if (!pinstance->cmd_list[i]) {
  4001. pmcraid_release_cmd_blocks(pinstance, i);
  4002. return -ENOMEM;
  4003. }
  4004. }
  4005. return 0;
  4006. }
  4007. /**
  4008. * pmcraid_allocate_control_blocks - allocates memory control blocks
  4009. * @pinstance : pointer to per adapter instance structure
  4010. *
  4011. * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs
  4012. * and IOASAs. This is called after command blocks are already allocated.
  4013. *
  4014. * Return Value
  4015. * 0 in case it can allocate all control blocks, otherwise -ENOMEM
  4016. */
  4017. static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
  4018. {
  4019. int i;
  4020. sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
  4021. pinstance->host->unique_id);
  4022. pinstance->control_pool =
  4023. dma_pool_create(pinstance->ctl_pool_name,
  4024. &pinstance->pdev->dev,
  4025. sizeof(struct pmcraid_control_block),
  4026. PMCRAID_IOARCB_ALIGNMENT, 0);
  4027. if (!pinstance->control_pool)
  4028. return -ENOMEM;
  4029. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  4030. pinstance->cmd_list[i]->ioa_cb =
  4031. dma_pool_zalloc(
  4032. pinstance->control_pool,
  4033. GFP_KERNEL,
  4034. &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
  4035. if (!pinstance->cmd_list[i]->ioa_cb) {
  4036. pmcraid_release_control_blocks(pinstance, i);
  4037. return -ENOMEM;
  4038. }
  4039. }
  4040. return 0;
  4041. }
  4042. /**
  4043. * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s)
  4044. * @pinstance: pointer to per adapter instance structure
  4045. * @maxindex: size of hrrq buffer pointer array
  4046. *
  4047. * Return Value
  4048. * None
  4049. */
  4050. static void
  4051. pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
  4052. {
  4053. int i;
  4054. for (i = 0; i < maxindex; i++) {
  4055. dma_free_coherent(&pinstance->pdev->dev,
  4056. HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
  4057. pinstance->hrrq_start[i],
  4058. pinstance->hrrq_start_bus_addr[i]);
  4059. /* reset pointers and toggle bit to zeros */
  4060. pinstance->hrrq_start[i] = NULL;
  4061. pinstance->hrrq_start_bus_addr[i] = 0;
  4062. pinstance->host_toggle_bit[i] = 0;
  4063. }
  4064. }
  4065. /**
  4066. * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers
  4067. * @pinstance: pointer to per adapter instance structure
  4068. *
  4069. * Return value
  4070. * 0 hrrq buffers are allocated, -ENOMEM otherwise.
  4071. */
  4072. static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
  4073. {
  4074. int i, buffer_size;
  4075. buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
  4076. for (i = 0; i < pinstance->num_hrrq; i++) {
  4077. pinstance->hrrq_start[i] =
  4078. dma_alloc_coherent(&pinstance->pdev->dev, buffer_size,
  4079. &pinstance->hrrq_start_bus_addr[i],
  4080. GFP_KERNEL);
  4081. if (!pinstance->hrrq_start[i]) {
  4082. pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
  4083. i);
  4084. pmcraid_release_host_rrqs(pinstance, i);
  4085. return -ENOMEM;
  4086. }
  4087. pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
  4088. pinstance->hrrq_end[i] =
  4089. pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
  4090. pinstance->host_toggle_bit[i] = 1;
  4091. spin_lock_init(&pinstance->hrrq_lock[i]);
  4092. }
  4093. return 0;
  4094. }
  4095. /**
  4096. * pmcraid_release_hcams - release HCAM buffers
  4097. *
  4098. * @pinstance: pointer to per adapter instance structure
  4099. *
  4100. * Return value
  4101. * none
  4102. */
  4103. static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
  4104. {
  4105. if (pinstance->ccn.msg != NULL) {
  4106. dma_free_coherent(&pinstance->pdev->dev,
  4107. PMCRAID_AEN_HDR_SIZE +
  4108. sizeof(struct pmcraid_hcam_ccn_ext),
  4109. pinstance->ccn.msg,
  4110. pinstance->ccn.baddr);
  4111. pinstance->ccn.msg = NULL;
  4112. pinstance->ccn.hcam = NULL;
  4113. pinstance->ccn.baddr = 0;
  4114. }
  4115. if (pinstance->ldn.msg != NULL) {
  4116. dma_free_coherent(&pinstance->pdev->dev,
  4117. PMCRAID_AEN_HDR_SIZE +
  4118. sizeof(struct pmcraid_hcam_ldn),
  4119. pinstance->ldn.msg,
  4120. pinstance->ldn.baddr);
  4121. pinstance->ldn.msg = NULL;
  4122. pinstance->ldn.hcam = NULL;
  4123. pinstance->ldn.baddr = 0;
  4124. }
  4125. }
  4126. /**
  4127. * pmcraid_allocate_hcams - allocates HCAM buffers
  4128. * @pinstance : pointer to per adapter instance structure
  4129. *
  4130. * Return Value:
  4131. * 0 in case of successful allocation, non-zero otherwise
  4132. */
  4133. static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
  4134. {
  4135. pinstance->ccn.msg = dma_alloc_coherent(&pinstance->pdev->dev,
  4136. PMCRAID_AEN_HDR_SIZE +
  4137. sizeof(struct pmcraid_hcam_ccn_ext),
  4138. &pinstance->ccn.baddr, GFP_KERNEL);
  4139. pinstance->ldn.msg = dma_alloc_coherent(&pinstance->pdev->dev,
  4140. PMCRAID_AEN_HDR_SIZE +
  4141. sizeof(struct pmcraid_hcam_ldn),
  4142. &pinstance->ldn.baddr, GFP_KERNEL);
  4143. if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
  4144. pmcraid_release_hcams(pinstance);
  4145. } else {
  4146. pinstance->ccn.hcam =
  4147. (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
  4148. pinstance->ldn.hcam =
  4149. (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
  4150. atomic_set(&pinstance->ccn.ignore, 0);
  4151. atomic_set(&pinstance->ldn.ignore, 0);
  4152. }
  4153. return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
  4154. }
  4155. /**
  4156. * pmcraid_release_config_buffers - release config.table buffers
  4157. * @pinstance: pointer to per adapter instance structure
  4158. *
  4159. * Return Value
  4160. * none
  4161. */
  4162. static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
  4163. {
  4164. if (pinstance->cfg_table != NULL &&
  4165. pinstance->cfg_table_bus_addr != 0) {
  4166. dma_free_coherent(&pinstance->pdev->dev,
  4167. sizeof(struct pmcraid_config_table),
  4168. pinstance->cfg_table,
  4169. pinstance->cfg_table_bus_addr);
  4170. pinstance->cfg_table = NULL;
  4171. pinstance->cfg_table_bus_addr = 0;
  4172. }
  4173. if (pinstance->res_entries != NULL) {
  4174. int i;
  4175. for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
  4176. list_del(&pinstance->res_entries[i].queue);
  4177. kfree(pinstance->res_entries);
  4178. pinstance->res_entries = NULL;
  4179. }
  4180. pmcraid_release_hcams(pinstance);
  4181. }
  4182. /**
  4183. * pmcraid_allocate_config_buffers - allocates DMAable memory for config table
  4184. * @pinstance : pointer to per adapter instance structure
  4185. *
  4186. * Return Value
  4187. * 0 for successful allocation, -ENOMEM for any failure
  4188. */
  4189. static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
  4190. {
  4191. int i;
  4192. pinstance->res_entries =
  4193. kcalloc(PMCRAID_MAX_RESOURCES,
  4194. sizeof(struct pmcraid_resource_entry),
  4195. GFP_KERNEL);
  4196. if (NULL == pinstance->res_entries) {
  4197. pmcraid_err("failed to allocate memory for resource table\n");
  4198. return -ENOMEM;
  4199. }
  4200. for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
  4201. list_add_tail(&pinstance->res_entries[i].queue,
  4202. &pinstance->free_res_q);
  4203. pinstance->cfg_table = dma_alloc_coherent(&pinstance->pdev->dev,
  4204. sizeof(struct pmcraid_config_table),
  4205. &pinstance->cfg_table_bus_addr,
  4206. GFP_KERNEL);
  4207. if (NULL == pinstance->cfg_table) {
  4208. pmcraid_err("couldn't alloc DMA memory for config table\n");
  4209. pmcraid_release_config_buffers(pinstance);
  4210. return -ENOMEM;
  4211. }
  4212. if (pmcraid_allocate_hcams(pinstance)) {
  4213. pmcraid_err("could not alloc DMA memory for HCAMS\n");
  4214. pmcraid_release_config_buffers(pinstance);
  4215. return -ENOMEM;
  4216. }
  4217. return 0;
  4218. }
  4219. /**
  4220. * pmcraid_init_tasklets - registers tasklets for response handling
  4221. *
  4222. * @pinstance: pointer adapter instance structure
  4223. *
  4224. * Return value
  4225. * none
  4226. */
  4227. static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
  4228. {
  4229. int i;
  4230. for (i = 0; i < pinstance->num_hrrq; i++)
  4231. tasklet_init(&pinstance->isr_tasklet[i],
  4232. pmcraid_tasklet_function,
  4233. (unsigned long)&pinstance->hrrq_vector[i]);
  4234. }
  4235. /**
  4236. * pmcraid_kill_tasklets - destroys tasklets registered for response handling
  4237. *
  4238. * @pinstance: pointer to adapter instance structure
  4239. *
  4240. * Return value
  4241. * none
  4242. */
  4243. static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
  4244. {
  4245. int i;
  4246. for (i = 0; i < pinstance->num_hrrq; i++)
  4247. tasklet_kill(&pinstance->isr_tasklet[i]);
  4248. }
  4249. /**
  4250. * pmcraid_release_buffers - release per-adapter buffers allocated
  4251. *
  4252. * @pinstance: pointer to adapter soft state
  4253. *
  4254. * Return Value
  4255. * none
  4256. */
  4257. static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
  4258. {
  4259. pmcraid_release_config_buffers(pinstance);
  4260. pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
  4261. pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
  4262. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4263. if (pinstance->inq_data != NULL) {
  4264. dma_free_coherent(&pinstance->pdev->dev,
  4265. sizeof(struct pmcraid_inquiry_data),
  4266. pinstance->inq_data,
  4267. pinstance->inq_data_baddr);
  4268. pinstance->inq_data = NULL;
  4269. pinstance->inq_data_baddr = 0;
  4270. }
  4271. if (pinstance->timestamp_data != NULL) {
  4272. dma_free_coherent(&pinstance->pdev->dev,
  4273. sizeof(struct pmcraid_timestamp_data),
  4274. pinstance->timestamp_data,
  4275. pinstance->timestamp_data_baddr);
  4276. pinstance->timestamp_data = NULL;
  4277. pinstance->timestamp_data_baddr = 0;
  4278. }
  4279. }
  4280. /**
  4281. * pmcraid_init_buffers - allocates memory and initializes various structures
  4282. * @pinstance: pointer to per adapter instance structure
  4283. *
  4284. * This routine pre-allocates memory based on the type of block as below:
  4285. * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator,
  4286. * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator
  4287. * config-table entries : DMAable memory using dma_alloc_coherent
  4288. * HostRRQs : DMAable memory, using dma_alloc_coherent
  4289. *
  4290. * Return Value
  4291. * 0 in case all of the blocks are allocated, -ENOMEM otherwise.
  4292. */
  4293. static int pmcraid_init_buffers(struct pmcraid_instance *pinstance)
  4294. {
  4295. int i;
  4296. if (pmcraid_allocate_host_rrqs(pinstance)) {
  4297. pmcraid_err("couldn't allocate memory for %d host rrqs\n",
  4298. pinstance->num_hrrq);
  4299. return -ENOMEM;
  4300. }
  4301. if (pmcraid_allocate_config_buffers(pinstance)) {
  4302. pmcraid_err("couldn't allocate memory for config buffers\n");
  4303. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4304. return -ENOMEM;
  4305. }
  4306. if (pmcraid_allocate_cmd_blocks(pinstance)) {
  4307. pmcraid_err("couldn't allocate memory for cmd blocks\n");
  4308. pmcraid_release_config_buffers(pinstance);
  4309. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4310. return -ENOMEM;
  4311. }
  4312. if (pmcraid_allocate_control_blocks(pinstance)) {
  4313. pmcraid_err("couldn't allocate memory control blocks\n");
  4314. pmcraid_release_config_buffers(pinstance);
  4315. pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
  4316. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4317. return -ENOMEM;
  4318. }
  4319. /* allocate DMAable memory for page D0 INQUIRY buffer */
  4320. pinstance->inq_data = dma_alloc_coherent(&pinstance->pdev->dev,
  4321. sizeof(struct pmcraid_inquiry_data),
  4322. &pinstance->inq_data_baddr, GFP_KERNEL);
  4323. if (pinstance->inq_data == NULL) {
  4324. pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
  4325. pmcraid_release_buffers(pinstance);
  4326. return -ENOMEM;
  4327. }
  4328. /* allocate DMAable memory for set timestamp data buffer */
  4329. pinstance->timestamp_data = dma_alloc_coherent(&pinstance->pdev->dev,
  4330. sizeof(struct pmcraid_timestamp_data),
  4331. &pinstance->timestamp_data_baddr,
  4332. GFP_KERNEL);
  4333. if (pinstance->timestamp_data == NULL) {
  4334. pmcraid_err("couldn't allocate DMA memory for \
  4335. set time_stamp \n");
  4336. pmcraid_release_buffers(pinstance);
  4337. return -ENOMEM;
  4338. }
  4339. /* Initialize all the command blocks and add them to free pool. No
  4340. * need to lock (free_pool_lock) as this is done in initialization
  4341. * itself
  4342. */
  4343. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  4344. struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
  4345. pmcraid_init_cmdblk(cmdp, i);
  4346. cmdp->drv_inst = pinstance;
  4347. list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
  4348. }
  4349. return 0;
  4350. }
  4351. /**
  4352. * pmcraid_reinit_buffers - resets various buffer pointers
  4353. * @pinstance: pointer to adapter instance
  4354. * Return value
  4355. * none
  4356. */
  4357. static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
  4358. {
  4359. int i;
  4360. int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
  4361. for (i = 0; i < pinstance->num_hrrq; i++) {
  4362. memset(pinstance->hrrq_start[i], 0, buffer_size);
  4363. pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
  4364. pinstance->hrrq_end[i] =
  4365. pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
  4366. pinstance->host_toggle_bit[i] = 1;
  4367. }
  4368. }
  4369. /**
  4370. * pmcraid_init_instance - initialize per instance data structure
  4371. * @pdev: pointer to pci device structure
  4372. * @host: pointer to Scsi_Host structure
  4373. * @mapped_pci_addr: memory mapped IOA configuration registers
  4374. *
  4375. * Return Value
  4376. * 0 on success, non-zero in case of any failure
  4377. */
  4378. static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host,
  4379. void __iomem *mapped_pci_addr)
  4380. {
  4381. struct pmcraid_instance *pinstance =
  4382. (struct pmcraid_instance *)host->hostdata;
  4383. pinstance->host = host;
  4384. pinstance->pdev = pdev;
  4385. /* Initialize register addresses */
  4386. pinstance->mapped_dma_addr = mapped_pci_addr;
  4387. /* Initialize chip-specific details */
  4388. {
  4389. struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
  4390. struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
  4391. pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
  4392. pint_regs->ioa_host_interrupt_reg =
  4393. mapped_pci_addr + chip_cfg->ioa_host_intr;
  4394. pint_regs->ioa_host_interrupt_clr_reg =
  4395. mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
  4396. pint_regs->ioa_host_msix_interrupt_reg =
  4397. mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
  4398. pint_regs->host_ioa_interrupt_reg =
  4399. mapped_pci_addr + chip_cfg->host_ioa_intr;
  4400. pint_regs->host_ioa_interrupt_clr_reg =
  4401. mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
  4402. /* Current version of firmware exposes interrupt mask set
  4403. * and mask clr registers through memory mapped bar0.
  4404. */
  4405. pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
  4406. pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
  4407. pint_regs->ioa_host_interrupt_mask_reg =
  4408. mapped_pci_addr + chip_cfg->ioa_host_mask;
  4409. pint_regs->ioa_host_interrupt_mask_clr_reg =
  4410. mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
  4411. pint_regs->global_interrupt_mask_reg =
  4412. mapped_pci_addr + chip_cfg->global_intr_mask;
  4413. };
  4414. pinstance->ioa_reset_attempts = 0;
  4415. init_waitqueue_head(&pinstance->reset_wait_q);
  4416. atomic_set(&pinstance->outstanding_cmds, 0);
  4417. atomic_set(&pinstance->last_message_id, 0);
  4418. atomic_set(&pinstance->expose_resources, 0);
  4419. INIT_LIST_HEAD(&pinstance->free_res_q);
  4420. INIT_LIST_HEAD(&pinstance->used_res_q);
  4421. INIT_LIST_HEAD(&pinstance->free_cmd_pool);
  4422. INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
  4423. spin_lock_init(&pinstance->free_pool_lock);
  4424. spin_lock_init(&pinstance->pending_pool_lock);
  4425. spin_lock_init(&pinstance->resource_lock);
  4426. mutex_init(&pinstance->aen_queue_lock);
  4427. /* Work-queue (Shared) for deferred processing error handling */
  4428. INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
  4429. /* Initialize the default log_level */
  4430. pinstance->current_log_level = pmcraid_log_level;
  4431. /* Setup variables required for reset engine */
  4432. pinstance->ioa_state = IOA_STATE_UNKNOWN;
  4433. pinstance->reset_cmd = NULL;
  4434. return 0;
  4435. }
  4436. /**
  4437. * pmcraid_shutdown - shutdown adapter controller.
  4438. * @pdev: pci device struct
  4439. *
  4440. * Issues an adapter shutdown to the card waits for its completion
  4441. *
  4442. * Return value
  4443. * none
  4444. */
  4445. static void pmcraid_shutdown(struct pci_dev *pdev)
  4446. {
  4447. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4448. pmcraid_reset_bringdown(pinstance);
  4449. }
  4450. /**
  4451. * pmcraid_get_minor - returns unused minor number from minor number bitmap
  4452. */
  4453. static unsigned short pmcraid_get_minor(void)
  4454. {
  4455. int minor;
  4456. minor = find_first_zero_bit(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
  4457. __set_bit(minor, pmcraid_minor);
  4458. return minor;
  4459. }
  4460. /**
  4461. * pmcraid_release_minor - releases given minor back to minor number bitmap
  4462. */
  4463. static void pmcraid_release_minor(unsigned short minor)
  4464. {
  4465. __clear_bit(minor, pmcraid_minor);
  4466. }
  4467. /**
  4468. * pmcraid_setup_chrdev - allocates a minor number and registers a char device
  4469. *
  4470. * @pinstance: pointer to adapter instance for which to register device
  4471. *
  4472. * Return value
  4473. * 0 in case of success, otherwise non-zero
  4474. */
  4475. static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
  4476. {
  4477. int minor;
  4478. int error;
  4479. minor = pmcraid_get_minor();
  4480. cdev_init(&pinstance->cdev, &pmcraid_fops);
  4481. pinstance->cdev.owner = THIS_MODULE;
  4482. error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
  4483. if (error)
  4484. pmcraid_release_minor(minor);
  4485. else
  4486. device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
  4487. NULL, "%s%u", PMCRAID_DEVFILE, minor);
  4488. return error;
  4489. }
  4490. /**
  4491. * pmcraid_release_chrdev - unregisters per-adapter management interface
  4492. *
  4493. * @pinstance: pointer to adapter instance structure
  4494. *
  4495. * Return value
  4496. * none
  4497. */
  4498. static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
  4499. {
  4500. pmcraid_release_minor(MINOR(pinstance->cdev.dev));
  4501. device_destroy(pmcraid_class,
  4502. MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
  4503. cdev_del(&pinstance->cdev);
  4504. }
  4505. /**
  4506. * pmcraid_remove - IOA hot plug remove entry point
  4507. * @pdev: pci device struct
  4508. *
  4509. * Return value
  4510. * none
  4511. */
  4512. static void pmcraid_remove(struct pci_dev *pdev)
  4513. {
  4514. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4515. /* remove the management interface (/dev file) for this device */
  4516. pmcraid_release_chrdev(pinstance);
  4517. /* remove host template from scsi midlayer */
  4518. scsi_remove_host(pinstance->host);
  4519. /* block requests from mid-layer */
  4520. scsi_block_requests(pinstance->host);
  4521. /* initiate shutdown adapter */
  4522. pmcraid_shutdown(pdev);
  4523. pmcraid_disable_interrupts(pinstance, ~0);
  4524. flush_work(&pinstance->worker_q);
  4525. pmcraid_kill_tasklets(pinstance);
  4526. pmcraid_unregister_interrupt_handler(pinstance);
  4527. pmcraid_release_buffers(pinstance);
  4528. iounmap(pinstance->mapped_dma_addr);
  4529. pci_release_regions(pdev);
  4530. scsi_host_put(pinstance->host);
  4531. pci_disable_device(pdev);
  4532. return;
  4533. }
  4534. #ifdef CONFIG_PM
  4535. /**
  4536. * pmcraid_suspend - driver suspend entry point for power management
  4537. * @pdev: PCI device structure
  4538. * @state: PCI power state to suspend routine
  4539. *
  4540. * Return Value - 0 always
  4541. */
  4542. static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state)
  4543. {
  4544. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4545. pmcraid_shutdown(pdev);
  4546. pmcraid_disable_interrupts(pinstance, ~0);
  4547. pmcraid_kill_tasklets(pinstance);
  4548. pci_set_drvdata(pinstance->pdev, pinstance);
  4549. pmcraid_unregister_interrupt_handler(pinstance);
  4550. pci_save_state(pdev);
  4551. pci_disable_device(pdev);
  4552. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4553. return 0;
  4554. }
  4555. /**
  4556. * pmcraid_resume - driver resume entry point PCI power management
  4557. * @pdev: PCI device structure
  4558. *
  4559. * Return Value - 0 in case of success. Error code in case of any failure
  4560. */
  4561. static int pmcraid_resume(struct pci_dev *pdev)
  4562. {
  4563. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4564. struct Scsi_Host *host = pinstance->host;
  4565. int rc;
  4566. pci_set_power_state(pdev, PCI_D0);
  4567. pci_enable_wake(pdev, PCI_D0, 0);
  4568. pci_restore_state(pdev);
  4569. rc = pci_enable_device(pdev);
  4570. if (rc) {
  4571. dev_err(&pdev->dev, "resume: Enable device failed\n");
  4572. return rc;
  4573. }
  4574. pci_set_master(pdev);
  4575. if (sizeof(dma_addr_t) == 4 ||
  4576. dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)))
  4577. rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
  4578. if (rc == 0)
  4579. rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
  4580. if (rc != 0) {
  4581. dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
  4582. goto disable_device;
  4583. }
  4584. pmcraid_disable_interrupts(pinstance, ~0);
  4585. atomic_set(&pinstance->outstanding_cmds, 0);
  4586. rc = pmcraid_register_interrupt_handler(pinstance);
  4587. if (rc) {
  4588. dev_err(&pdev->dev,
  4589. "resume: couldn't register interrupt handlers\n");
  4590. rc = -ENODEV;
  4591. goto release_host;
  4592. }
  4593. pmcraid_init_tasklets(pinstance);
  4594. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  4595. /* Start with hard reset sequence which brings up IOA to operational
  4596. * state as well as completes the reset sequence.
  4597. */
  4598. pinstance->ioa_hard_reset = 1;
  4599. /* Start IOA firmware initialization and bring card to Operational
  4600. * state.
  4601. */
  4602. if (pmcraid_reset_bringup(pinstance)) {
  4603. dev_err(&pdev->dev, "couldn't initialize IOA\n");
  4604. rc = -ENODEV;
  4605. goto release_tasklets;
  4606. }
  4607. return 0;
  4608. release_tasklets:
  4609. pmcraid_disable_interrupts(pinstance, ~0);
  4610. pmcraid_kill_tasklets(pinstance);
  4611. pmcraid_unregister_interrupt_handler(pinstance);
  4612. release_host:
  4613. scsi_host_put(host);
  4614. disable_device:
  4615. pci_disable_device(pdev);
  4616. return rc;
  4617. }
  4618. #else
  4619. #define pmcraid_suspend NULL
  4620. #define pmcraid_resume NULL
  4621. #endif /* CONFIG_PM */
  4622. /**
  4623. * pmcraid_complete_ioa_reset - Called by either timer or tasklet during
  4624. * completion of the ioa reset
  4625. * @cmd: pointer to reset command block
  4626. */
  4627. static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
  4628. {
  4629. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4630. unsigned long flags;
  4631. spin_lock_irqsave(pinstance->host->host_lock, flags);
  4632. pmcraid_ioa_reset(cmd);
  4633. spin_unlock_irqrestore(pinstance->host->host_lock, flags);
  4634. scsi_unblock_requests(pinstance->host);
  4635. schedule_work(&pinstance->worker_q);
  4636. }
  4637. /**
  4638. * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP
  4639. *
  4640. * @cmd: pointer to pmcraid_cmd structure
  4641. *
  4642. * Return Value
  4643. * 0 for success or non-zero for failure cases
  4644. */
  4645. static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
  4646. {
  4647. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4648. void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
  4649. pmcraid_reinit_cmdblk(cmd);
  4650. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4651. ioarcb->request_type = REQ_TYPE_IOACMD;
  4652. ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
  4653. ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
  4654. /* If this was called as part of resource table reinitialization due to
  4655. * lost CCN, it is enough to return the command block back to free pool
  4656. * as part of set_supported_devs completion function.
  4657. */
  4658. if (cmd->drv_inst->reinit_cfg_table) {
  4659. cmd->drv_inst->reinit_cfg_table = 0;
  4660. cmd->release = 1;
  4661. cmd_done = pmcraid_reinit_cfgtable_done;
  4662. }
  4663. /* we will be done with the reset sequence after set supported devices,
  4664. * setup the done function to return the command block back to free
  4665. * pool
  4666. */
  4667. pmcraid_send_cmd(cmd,
  4668. cmd_done,
  4669. PMCRAID_SET_SUP_DEV_TIMEOUT,
  4670. pmcraid_timeout_handler);
  4671. return;
  4672. }
  4673. /**
  4674. * pmcraid_set_timestamp - set the timestamp to IOAFP
  4675. *
  4676. * @cmd: pointer to pmcraid_cmd structure
  4677. *
  4678. * Return Value
  4679. * 0 for success or non-zero for failure cases
  4680. */
  4681. static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd)
  4682. {
  4683. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4684. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4685. __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN);
  4686. struct pmcraid_ioadl_desc *ioadl;
  4687. u64 timestamp;
  4688. timestamp = ktime_get_real_seconds() * 1000;
  4689. pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp);
  4690. pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8);
  4691. pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16);
  4692. pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24);
  4693. pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32);
  4694. pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40);
  4695. pmcraid_reinit_cmdblk(cmd);
  4696. ioarcb->request_type = REQ_TYPE_SCSI;
  4697. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4698. ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP;
  4699. ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION;
  4700. memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len));
  4701. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  4702. offsetof(struct pmcraid_ioarcb,
  4703. add_data.u.ioadl[0]));
  4704. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  4705. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
  4706. ioarcb->request_flags0 |= NO_LINK_DESCS;
  4707. ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
  4708. ioarcb->data_transfer_length =
  4709. cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
  4710. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  4711. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  4712. ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr);
  4713. ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
  4714. if (!pinstance->timestamp_error) {
  4715. pinstance->timestamp_error = 0;
  4716. pmcraid_send_cmd(cmd, pmcraid_set_supported_devs,
  4717. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4718. } else {
  4719. pmcraid_send_cmd(cmd, pmcraid_return_cmd,
  4720. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4721. return;
  4722. }
  4723. }
  4724. /**
  4725. * pmcraid_init_res_table - Initialize the resource table
  4726. * @cmd: pointer to pmcraid command struct
  4727. *
  4728. * This function looks through the existing resource table, comparing
  4729. * it with the config table. This function will take care of old/new
  4730. * devices and schedule adding/removing them from the mid-layer
  4731. * as appropriate.
  4732. *
  4733. * Return value
  4734. * None
  4735. */
  4736. static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
  4737. {
  4738. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4739. struct pmcraid_resource_entry *res, *temp;
  4740. struct pmcraid_config_table_entry *cfgte;
  4741. unsigned long lock_flags;
  4742. int found, rc, i;
  4743. u16 fw_version;
  4744. LIST_HEAD(old_res);
  4745. if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
  4746. pmcraid_err("IOA requires microcode download\n");
  4747. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  4748. /* resource list is protected by pinstance->resource_lock.
  4749. * init_res_table can be called from probe (user-thread) or runtime
  4750. * reset (timer/tasklet)
  4751. */
  4752. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  4753. list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
  4754. list_move_tail(&res->queue, &old_res);
  4755. for (i = 0; i < le16_to_cpu(pinstance->cfg_table->num_entries); i++) {
  4756. if (be16_to_cpu(pinstance->inq_data->fw_version) <=
  4757. PMCRAID_FW_VERSION_1)
  4758. cfgte = &pinstance->cfg_table->entries[i];
  4759. else
  4760. cfgte = (struct pmcraid_config_table_entry *)
  4761. &pinstance->cfg_table->entries_ext[i];
  4762. if (!pmcraid_expose_resource(fw_version, cfgte))
  4763. continue;
  4764. found = 0;
  4765. /* If this entry was already detected and initialized */
  4766. list_for_each_entry_safe(res, temp, &old_res, queue) {
  4767. rc = memcmp(&res->cfg_entry.resource_address,
  4768. &cfgte->resource_address,
  4769. sizeof(cfgte->resource_address));
  4770. if (!rc) {
  4771. list_move_tail(&res->queue,
  4772. &pinstance->used_res_q);
  4773. found = 1;
  4774. break;
  4775. }
  4776. }
  4777. /* If this is new entry, initialize it and add it the queue */
  4778. if (!found) {
  4779. if (list_empty(&pinstance->free_res_q)) {
  4780. pmcraid_err("Too many devices attached\n");
  4781. break;
  4782. }
  4783. found = 1;
  4784. res = list_entry(pinstance->free_res_q.next,
  4785. struct pmcraid_resource_entry, queue);
  4786. res->scsi_dev = NULL;
  4787. res->change_detected = RES_CHANGE_ADD;
  4788. res->reset_progress = 0;
  4789. list_move_tail(&res->queue, &pinstance->used_res_q);
  4790. }
  4791. /* copy new configuration table entry details into driver
  4792. * maintained resource entry
  4793. */
  4794. if (found) {
  4795. memcpy(&res->cfg_entry, cfgte,
  4796. pinstance->config_table_entry_size);
  4797. pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
  4798. res->cfg_entry.resource_type,
  4799. (fw_version <= PMCRAID_FW_VERSION_1 ?
  4800. res->cfg_entry.unique_flags1 :
  4801. le16_to_cpu(res->cfg_entry.array_id) & 0xFF),
  4802. le32_to_cpu(res->cfg_entry.resource_address));
  4803. }
  4804. }
  4805. /* Detect any deleted entries, mark them for deletion from mid-layer */
  4806. list_for_each_entry_safe(res, temp, &old_res, queue) {
  4807. if (res->scsi_dev) {
  4808. res->change_detected = RES_CHANGE_DEL;
  4809. res->cfg_entry.resource_handle =
  4810. PMCRAID_INVALID_RES_HANDLE;
  4811. list_move_tail(&res->queue, &pinstance->used_res_q);
  4812. } else {
  4813. list_move_tail(&res->queue, &pinstance->free_res_q);
  4814. }
  4815. }
  4816. /* release the resource list lock */
  4817. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  4818. pmcraid_set_timestamp(cmd);
  4819. }
  4820. /**
  4821. * pmcraid_querycfg - Send a Query IOA Config to the adapter.
  4822. * @cmd: pointer pmcraid_cmd struct
  4823. *
  4824. * This function sends a Query IOA Configuration command to the adapter to
  4825. * retrieve the IOA configuration table.
  4826. *
  4827. * Return value:
  4828. * none
  4829. */
  4830. static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
  4831. {
  4832. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4833. struct pmcraid_ioadl_desc *ioadl;
  4834. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4835. __be32 cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
  4836. if (be16_to_cpu(pinstance->inq_data->fw_version) <=
  4837. PMCRAID_FW_VERSION_1)
  4838. pinstance->config_table_entry_size =
  4839. sizeof(struct pmcraid_config_table_entry);
  4840. else
  4841. pinstance->config_table_entry_size =
  4842. sizeof(struct pmcraid_config_table_entry_ext);
  4843. ioarcb->request_type = REQ_TYPE_IOACMD;
  4844. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4845. ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
  4846. /* firmware requires 4-byte length field, specified in B.E format */
  4847. memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
  4848. /* Since entire config table can be described by single IOADL, it can
  4849. * be part of IOARCB itself
  4850. */
  4851. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  4852. offsetof(struct pmcraid_ioarcb,
  4853. add_data.u.ioadl[0]));
  4854. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  4855. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
  4856. ioarcb->request_flags0 |= NO_LINK_DESCS;
  4857. ioarcb->data_transfer_length =
  4858. cpu_to_le32(sizeof(struct pmcraid_config_table));
  4859. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  4860. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  4861. ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
  4862. ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
  4863. pmcraid_send_cmd(cmd, pmcraid_init_res_table,
  4864. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4865. }
  4866. /**
  4867. * pmcraid_probe - PCI probe entry pointer for PMC MaxRAID controller driver
  4868. * @pdev: pointer to pci device structure
  4869. * @dev_id: pointer to device ids structure
  4870. *
  4871. * Return Value
  4872. * returns 0 if the device is claimed and successfully configured.
  4873. * returns non-zero error code in case of any failure
  4874. */
  4875. static int pmcraid_probe(struct pci_dev *pdev,
  4876. const struct pci_device_id *dev_id)
  4877. {
  4878. struct pmcraid_instance *pinstance;
  4879. struct Scsi_Host *host;
  4880. void __iomem *mapped_pci_addr;
  4881. int rc = PCIBIOS_SUCCESSFUL;
  4882. if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
  4883. pmcraid_err
  4884. ("maximum number(%d) of supported adapters reached\n",
  4885. atomic_read(&pmcraid_adapter_count));
  4886. return -ENOMEM;
  4887. }
  4888. atomic_inc(&pmcraid_adapter_count);
  4889. rc = pci_enable_device(pdev);
  4890. if (rc) {
  4891. dev_err(&pdev->dev, "Cannot enable adapter\n");
  4892. atomic_dec(&pmcraid_adapter_count);
  4893. return rc;
  4894. }
  4895. dev_info(&pdev->dev,
  4896. "Found new IOA(%x:%x), Total IOA count: %d\n",
  4897. pdev->vendor, pdev->device,
  4898. atomic_read(&pmcraid_adapter_count));
  4899. rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
  4900. if (rc < 0) {
  4901. dev_err(&pdev->dev,
  4902. "Couldn't register memory range of registers\n");
  4903. goto out_disable_device;
  4904. }
  4905. mapped_pci_addr = pci_iomap(pdev, 0, 0);
  4906. if (!mapped_pci_addr) {
  4907. dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
  4908. rc = -ENOMEM;
  4909. goto out_release_regions;
  4910. }
  4911. pci_set_master(pdev);
  4912. /* Firmware requires the system bus address of IOARCB to be within
  4913. * 32-bit addressable range though it has 64-bit IOARRIN register.
  4914. * However, firmware supports 64-bit streaming DMA buffers, whereas
  4915. * coherent buffers are to be 32-bit. Since dma_alloc_coherent always
  4916. * returns memory within 4GB (if not, change this logic), coherent
  4917. * buffers are within firmware acceptable address ranges.
  4918. */
  4919. if (sizeof(dma_addr_t) == 4 ||
  4920. dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)))
  4921. rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
  4922. /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32
  4923. * bit mask for dma_alloc_coherent to return addresses within 4GB
  4924. */
  4925. if (rc == 0)
  4926. rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
  4927. if (rc != 0) {
  4928. dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
  4929. goto cleanup_nomem;
  4930. }
  4931. host = scsi_host_alloc(&pmcraid_host_template,
  4932. sizeof(struct pmcraid_instance));
  4933. if (!host) {
  4934. dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
  4935. rc = -ENOMEM;
  4936. goto cleanup_nomem;
  4937. }
  4938. host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
  4939. host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
  4940. host->unique_id = host->host_no;
  4941. host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
  4942. host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
  4943. /* zero out entire instance structure */
  4944. pinstance = (struct pmcraid_instance *)host->hostdata;
  4945. memset(pinstance, 0, sizeof(*pinstance));
  4946. pinstance->chip_cfg =
  4947. (struct pmcraid_chip_details *)(dev_id->driver_data);
  4948. rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
  4949. if (rc < 0) {
  4950. dev_err(&pdev->dev, "failed to initialize adapter instance\n");
  4951. goto out_scsi_host_put;
  4952. }
  4953. pci_set_drvdata(pdev, pinstance);
  4954. /* Save PCI config-space for use following the reset */
  4955. rc = pci_save_state(pinstance->pdev);
  4956. if (rc != 0) {
  4957. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  4958. goto out_scsi_host_put;
  4959. }
  4960. pmcraid_disable_interrupts(pinstance, ~0);
  4961. rc = pmcraid_register_interrupt_handler(pinstance);
  4962. if (rc) {
  4963. dev_err(&pdev->dev, "couldn't register interrupt handler\n");
  4964. goto out_scsi_host_put;
  4965. }
  4966. pmcraid_init_tasklets(pinstance);
  4967. /* allocate verious buffers used by LLD.*/
  4968. rc = pmcraid_init_buffers(pinstance);
  4969. if (rc) {
  4970. pmcraid_err("couldn't allocate memory blocks\n");
  4971. goto out_unregister_isr;
  4972. }
  4973. /* check the reset type required */
  4974. pmcraid_reset_type(pinstance);
  4975. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  4976. /* Start IOA firmware initialization and bring card to Operational
  4977. * state.
  4978. */
  4979. pmcraid_info("starting IOA initialization sequence\n");
  4980. if (pmcraid_reset_bringup(pinstance)) {
  4981. dev_err(&pdev->dev, "couldn't initialize IOA\n");
  4982. rc = 1;
  4983. goto out_release_bufs;
  4984. }
  4985. /* Add adapter instance into mid-layer list */
  4986. rc = scsi_add_host(pinstance->host, &pdev->dev);
  4987. if (rc != 0) {
  4988. pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
  4989. goto out_release_bufs;
  4990. }
  4991. scsi_scan_host(pinstance->host);
  4992. rc = pmcraid_setup_chrdev(pinstance);
  4993. if (rc != 0) {
  4994. pmcraid_err("couldn't create mgmt interface, error: %x\n",
  4995. rc);
  4996. goto out_remove_host;
  4997. }
  4998. /* Schedule worker thread to handle CCN and take care of adding and
  4999. * removing devices to OS
  5000. */
  5001. atomic_set(&pinstance->expose_resources, 1);
  5002. schedule_work(&pinstance->worker_q);
  5003. return rc;
  5004. out_remove_host:
  5005. scsi_remove_host(host);
  5006. out_release_bufs:
  5007. pmcraid_release_buffers(pinstance);
  5008. out_unregister_isr:
  5009. pmcraid_kill_tasklets(pinstance);
  5010. pmcraid_unregister_interrupt_handler(pinstance);
  5011. out_scsi_host_put:
  5012. scsi_host_put(host);
  5013. cleanup_nomem:
  5014. iounmap(mapped_pci_addr);
  5015. out_release_regions:
  5016. pci_release_regions(pdev);
  5017. out_disable_device:
  5018. atomic_dec(&pmcraid_adapter_count);
  5019. pci_disable_device(pdev);
  5020. return -ENODEV;
  5021. }
  5022. /*
  5023. * PCI driver structure of pmcraid driver
  5024. */
  5025. static struct pci_driver pmcraid_driver = {
  5026. .name = PMCRAID_DRIVER_NAME,
  5027. .id_table = pmcraid_pci_table,
  5028. .probe = pmcraid_probe,
  5029. .remove = pmcraid_remove,
  5030. .suspend = pmcraid_suspend,
  5031. .resume = pmcraid_resume,
  5032. .shutdown = pmcraid_shutdown
  5033. };
  5034. /**
  5035. * pmcraid_init - module load entry point
  5036. */
  5037. static int __init pmcraid_init(void)
  5038. {
  5039. dev_t dev;
  5040. int error;
  5041. pmcraid_info("%s Device Driver version: %s\n",
  5042. PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION);
  5043. error = alloc_chrdev_region(&dev, 0,
  5044. PMCRAID_MAX_ADAPTERS,
  5045. PMCRAID_DEVFILE);
  5046. if (error) {
  5047. pmcraid_err("failed to get a major number for adapters\n");
  5048. goto out_init;
  5049. }
  5050. pmcraid_major = MAJOR(dev);
  5051. pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
  5052. if (IS_ERR(pmcraid_class)) {
  5053. error = PTR_ERR(pmcraid_class);
  5054. pmcraid_err("failed to register with sysfs, error = %x\n",
  5055. error);
  5056. goto out_unreg_chrdev;
  5057. }
  5058. error = pmcraid_netlink_init();
  5059. if (error) {
  5060. class_destroy(pmcraid_class);
  5061. goto out_unreg_chrdev;
  5062. }
  5063. error = pci_register_driver(&pmcraid_driver);
  5064. if (error == 0)
  5065. goto out_init;
  5066. pmcraid_err("failed to register pmcraid driver, error = %x\n",
  5067. error);
  5068. class_destroy(pmcraid_class);
  5069. pmcraid_netlink_release();
  5070. out_unreg_chrdev:
  5071. unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
  5072. out_init:
  5073. return error;
  5074. }
  5075. /**
  5076. * pmcraid_exit - module unload entry point
  5077. */
  5078. static void __exit pmcraid_exit(void)
  5079. {
  5080. pmcraid_netlink_release();
  5081. unregister_chrdev_region(MKDEV(pmcraid_major, 0),
  5082. PMCRAID_MAX_ADAPTERS);
  5083. pci_unregister_driver(&pmcraid_driver);
  5084. class_destroy(pmcraid_class);
  5085. }
  5086. module_init(pmcraid_init);
  5087. module_exit(pmcraid_exit);