nsp32_io.h 5.9 KB

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  1. /*
  2. * Workbit NinjaSCSI-32Bi/UDE PCI/CardBus SCSI Host Bus Adapter driver
  3. * I/O routine
  4. *
  5. * This software may be used and distributed according to the terms of
  6. * the GNU General Public License.
  7. */
  8. #ifndef _NSP32_IO_H
  9. #define _NSP32_IO_H
  10. static inline void nsp32_write1(unsigned int base,
  11. unsigned int index,
  12. unsigned char val)
  13. {
  14. outb(val, (base + index));
  15. }
  16. static inline unsigned char nsp32_read1(unsigned int base,
  17. unsigned int index)
  18. {
  19. return inb(base + index);
  20. }
  21. static inline void nsp32_write2(unsigned int base,
  22. unsigned int index,
  23. unsigned short val)
  24. {
  25. outw(val, (base + index));
  26. }
  27. static inline unsigned short nsp32_read2(unsigned int base,
  28. unsigned int index)
  29. {
  30. return inw(base + index);
  31. }
  32. static inline void nsp32_write4(unsigned int base,
  33. unsigned int index,
  34. unsigned long val)
  35. {
  36. outl(val, (base + index));
  37. }
  38. static inline unsigned long nsp32_read4(unsigned int base,
  39. unsigned int index)
  40. {
  41. return inl(base + index);
  42. }
  43. /*==============================================*/
  44. static inline void nsp32_mmio_write1(unsigned long base,
  45. unsigned int index,
  46. unsigned char val)
  47. {
  48. volatile unsigned char *ptr;
  49. ptr = (unsigned char *)(base + NSP32_MMIO_OFFSET + index);
  50. writeb(val, ptr);
  51. }
  52. static inline unsigned char nsp32_mmio_read1(unsigned long base,
  53. unsigned int index)
  54. {
  55. volatile unsigned char *ptr;
  56. ptr = (unsigned char *)(base + NSP32_MMIO_OFFSET + index);
  57. return readb(ptr);
  58. }
  59. static inline void nsp32_mmio_write2(unsigned long base,
  60. unsigned int index,
  61. unsigned short val)
  62. {
  63. volatile unsigned short *ptr;
  64. ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + index);
  65. writew(cpu_to_le16(val), ptr);
  66. }
  67. static inline unsigned short nsp32_mmio_read2(unsigned long base,
  68. unsigned int index)
  69. {
  70. volatile unsigned short *ptr;
  71. ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + index);
  72. return le16_to_cpu(readw(ptr));
  73. }
  74. static inline void nsp32_mmio_write4(unsigned long base,
  75. unsigned int index,
  76. unsigned long val)
  77. {
  78. volatile unsigned long *ptr;
  79. ptr = (unsigned long *)(base + NSP32_MMIO_OFFSET + index);
  80. writel(cpu_to_le32(val), ptr);
  81. }
  82. static inline unsigned long nsp32_mmio_read4(unsigned long base,
  83. unsigned int index)
  84. {
  85. volatile unsigned long *ptr;
  86. ptr = (unsigned long *)(base + NSP32_MMIO_OFFSET + index);
  87. return le32_to_cpu(readl(ptr));
  88. }
  89. /*==============================================*/
  90. static inline unsigned char nsp32_index_read1(unsigned int base,
  91. unsigned int reg)
  92. {
  93. outb(reg, base + INDEX_REG);
  94. return inb(base + DATA_REG_LOW);
  95. }
  96. static inline void nsp32_index_write1(unsigned int base,
  97. unsigned int reg,
  98. unsigned char val)
  99. {
  100. outb(reg, base + INDEX_REG );
  101. outb(val, base + DATA_REG_LOW);
  102. }
  103. static inline unsigned short nsp32_index_read2(unsigned int base,
  104. unsigned int reg)
  105. {
  106. outb(reg, base + INDEX_REG);
  107. return inw(base + DATA_REG_LOW);
  108. }
  109. static inline void nsp32_index_write2(unsigned int base,
  110. unsigned int reg,
  111. unsigned short val)
  112. {
  113. outb(reg, base + INDEX_REG );
  114. outw(val, base + DATA_REG_LOW);
  115. }
  116. static inline unsigned long nsp32_index_read4(unsigned int base,
  117. unsigned int reg)
  118. {
  119. unsigned long h,l;
  120. outb(reg, base + INDEX_REG);
  121. l = inw(base + DATA_REG_LOW);
  122. h = inw(base + DATA_REG_HI );
  123. return ((h << 16) | l);
  124. }
  125. static inline void nsp32_index_write4(unsigned int base,
  126. unsigned int reg,
  127. unsigned long val)
  128. {
  129. unsigned long h,l;
  130. h = (val & 0xffff0000) >> 16;
  131. l = (val & 0x0000ffff) >> 0;
  132. outb(reg, base + INDEX_REG );
  133. outw(l, base + DATA_REG_LOW);
  134. outw(h, base + DATA_REG_HI );
  135. }
  136. /*==============================================*/
  137. static inline unsigned char nsp32_mmio_index_read1(unsigned long base,
  138. unsigned int reg)
  139. {
  140. volatile unsigned short *index_ptr, *data_ptr;
  141. index_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + INDEX_REG);
  142. data_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + DATA_REG_LOW);
  143. writeb(reg, index_ptr);
  144. return readb(data_ptr);
  145. }
  146. static inline void nsp32_mmio_index_write1(unsigned long base,
  147. unsigned int reg,
  148. unsigned char val)
  149. {
  150. volatile unsigned short *index_ptr, *data_ptr;
  151. index_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + INDEX_REG);
  152. data_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + DATA_REG_LOW);
  153. writeb(reg, index_ptr);
  154. writeb(val, data_ptr );
  155. }
  156. static inline unsigned short nsp32_mmio_index_read2(unsigned long base,
  157. unsigned int reg)
  158. {
  159. volatile unsigned short *index_ptr, *data_ptr;
  160. index_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + INDEX_REG);
  161. data_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + DATA_REG_LOW);
  162. writeb(reg, index_ptr);
  163. return le16_to_cpu(readw(data_ptr));
  164. }
  165. static inline void nsp32_mmio_index_write2(unsigned long base,
  166. unsigned int reg,
  167. unsigned short val)
  168. {
  169. volatile unsigned short *index_ptr, *data_ptr;
  170. index_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + INDEX_REG);
  171. data_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + DATA_REG_LOW);
  172. writeb(reg, index_ptr);
  173. writew(cpu_to_le16(val), data_ptr );
  174. }
  175. /*==============================================*/
  176. static inline void nsp32_multi_read4(unsigned int base,
  177. unsigned int reg,
  178. void *buf,
  179. unsigned long count)
  180. {
  181. insl(base + reg, buf, count);
  182. }
  183. static inline void nsp32_fifo_read(unsigned int base,
  184. void *buf,
  185. unsigned long count)
  186. {
  187. nsp32_multi_read4(base, FIFO_DATA_LOW, buf, count);
  188. }
  189. static inline void nsp32_multi_write4(unsigned int base,
  190. unsigned int reg,
  191. void *buf,
  192. unsigned long count)
  193. {
  194. outsl(base + reg, buf, count);
  195. }
  196. static inline void nsp32_fifo_write(unsigned int base,
  197. void *buf,
  198. unsigned long count)
  199. {
  200. nsp32_multi_write4(base, FIFO_DATA_LOW, buf, count);
  201. }
  202. #endif /* _NSP32_IO_H */
  203. /* end */