rtc-wm831x.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Real Time Clock driver for Wolfson Microelectronics WM831x
  4. *
  5. * Copyright (C) 2009 Wolfson Microelectronics PLC.
  6. *
  7. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  8. *
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/time.h>
  13. #include <linux/rtc.h>
  14. #include <linux/slab.h>
  15. #include <linux/bcd.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/ioctl.h>
  18. #include <linux/completion.h>
  19. #include <linux/mfd/wm831x/core.h>
  20. #include <linux/delay.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/random.h>
  23. /*
  24. * R16416 (0x4020) - RTC Write Counter
  25. */
  26. #define WM831X_RTC_WR_CNT_MASK 0xFFFF /* RTC_WR_CNT - [15:0] */
  27. #define WM831X_RTC_WR_CNT_SHIFT 0 /* RTC_WR_CNT - [15:0] */
  28. #define WM831X_RTC_WR_CNT_WIDTH 16 /* RTC_WR_CNT - [15:0] */
  29. /*
  30. * R16417 (0x4021) - RTC Time 1
  31. */
  32. #define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */
  33. #define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */
  34. #define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */
  35. /*
  36. * R16418 (0x4022) - RTC Time 2
  37. */
  38. #define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */
  39. #define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */
  40. #define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */
  41. /*
  42. * R16419 (0x4023) - RTC Alarm 1
  43. */
  44. #define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */
  45. #define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */
  46. #define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */
  47. /*
  48. * R16420 (0x4024) - RTC Alarm 2
  49. */
  50. #define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */
  51. #define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */
  52. #define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */
  53. /*
  54. * R16421 (0x4025) - RTC Control
  55. */
  56. #define WM831X_RTC_VALID 0x8000 /* RTC_VALID */
  57. #define WM831X_RTC_VALID_MASK 0x8000 /* RTC_VALID */
  58. #define WM831X_RTC_VALID_SHIFT 15 /* RTC_VALID */
  59. #define WM831X_RTC_VALID_WIDTH 1 /* RTC_VALID */
  60. #define WM831X_RTC_SYNC_BUSY 0x4000 /* RTC_SYNC_BUSY */
  61. #define WM831X_RTC_SYNC_BUSY_MASK 0x4000 /* RTC_SYNC_BUSY */
  62. #define WM831X_RTC_SYNC_BUSY_SHIFT 14 /* RTC_SYNC_BUSY */
  63. #define WM831X_RTC_SYNC_BUSY_WIDTH 1 /* RTC_SYNC_BUSY */
  64. #define WM831X_RTC_ALM_ENA 0x0400 /* RTC_ALM_ENA */
  65. #define WM831X_RTC_ALM_ENA_MASK 0x0400 /* RTC_ALM_ENA */
  66. #define WM831X_RTC_ALM_ENA_SHIFT 10 /* RTC_ALM_ENA */
  67. #define WM831X_RTC_ALM_ENA_WIDTH 1 /* RTC_ALM_ENA */
  68. #define WM831X_RTC_PINT_FREQ_MASK 0x0070 /* RTC_PINT_FREQ - [6:4] */
  69. #define WM831X_RTC_PINT_FREQ_SHIFT 4 /* RTC_PINT_FREQ - [6:4] */
  70. #define WM831X_RTC_PINT_FREQ_WIDTH 3 /* RTC_PINT_FREQ - [6:4] */
  71. /*
  72. * R16422 (0x4026) - RTC Trim
  73. */
  74. #define WM831X_RTC_TRIM_MASK 0x03FF /* RTC_TRIM - [9:0] */
  75. #define WM831X_RTC_TRIM_SHIFT 0 /* RTC_TRIM - [9:0] */
  76. #define WM831X_RTC_TRIM_WIDTH 10 /* RTC_TRIM - [9:0] */
  77. #define WM831X_SET_TIME_RETRIES 5
  78. #define WM831X_GET_TIME_RETRIES 5
  79. struct wm831x_rtc {
  80. struct wm831x *wm831x;
  81. struct rtc_device *rtc;
  82. unsigned int alarm_enabled:1;
  83. };
  84. static void wm831x_rtc_add_randomness(struct wm831x *wm831x)
  85. {
  86. int ret;
  87. u16 reg;
  88. /*
  89. * The write counter contains a pseudo-random number which is
  90. * regenerated every time we set the RTC so it should be a
  91. * useful per-system source of entropy.
  92. */
  93. ret = wm831x_reg_read(wm831x, WM831X_RTC_WRITE_COUNTER);
  94. if (ret >= 0) {
  95. reg = ret;
  96. add_device_randomness(&reg, sizeof(reg));
  97. } else {
  98. dev_warn(wm831x->dev, "Failed to read RTC write counter: %d\n",
  99. ret);
  100. }
  101. }
  102. /*
  103. * Read current time and date in RTC
  104. */
  105. static int wm831x_rtc_readtime(struct device *dev, struct rtc_time *tm)
  106. {
  107. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
  108. struct wm831x *wm831x = wm831x_rtc->wm831x;
  109. u16 time1[2], time2[2];
  110. int ret;
  111. int count = 0;
  112. /* Has the RTC been programmed? */
  113. ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
  114. if (ret < 0) {
  115. dev_err(dev, "Failed to read RTC control: %d\n", ret);
  116. return ret;
  117. }
  118. if (!(ret & WM831X_RTC_VALID)) {
  119. dev_dbg(dev, "RTC not yet configured\n");
  120. return -EINVAL;
  121. }
  122. /* Read twice to make sure we don't read a corrupt, partially
  123. * incremented, value.
  124. */
  125. do {
  126. ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,
  127. 2, time1);
  128. if (ret != 0)
  129. continue;
  130. ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,
  131. 2, time2);
  132. if (ret != 0)
  133. continue;
  134. if (memcmp(time1, time2, sizeof(time1)) == 0) {
  135. u32 time = (time1[0] << 16) | time1[1];
  136. rtc_time64_to_tm(time, tm);
  137. return 0;
  138. }
  139. } while (++count < WM831X_GET_TIME_RETRIES);
  140. dev_err(dev, "Timed out reading current time\n");
  141. return -EIO;
  142. }
  143. /*
  144. * Set current time and date in RTC
  145. */
  146. static int wm831x_rtc_settime(struct device *dev, struct rtc_time *tm)
  147. {
  148. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
  149. struct wm831x *wm831x = wm831x_rtc->wm831x;
  150. struct rtc_time new_tm;
  151. unsigned long time, new_time;
  152. int ret;
  153. int count = 0;
  154. time = rtc_tm_to_time64(tm);
  155. ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_1,
  156. (time >> 16) & 0xffff);
  157. if (ret < 0) {
  158. dev_err(dev, "Failed to write TIME_1: %d\n", ret);
  159. return ret;
  160. }
  161. ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_2, time & 0xffff);
  162. if (ret < 0) {
  163. dev_err(dev, "Failed to write TIME_2: %d\n", ret);
  164. return ret;
  165. }
  166. /* Wait for the update to complete - should happen first time
  167. * round but be conservative.
  168. */
  169. do {
  170. msleep(1);
  171. ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
  172. if (ret < 0)
  173. ret = WM831X_RTC_SYNC_BUSY;
  174. } while (!(ret & WM831X_RTC_SYNC_BUSY) &&
  175. ++count < WM831X_SET_TIME_RETRIES);
  176. if (ret & WM831X_RTC_SYNC_BUSY) {
  177. dev_err(dev, "Timed out writing RTC update\n");
  178. return -EIO;
  179. }
  180. /* Check that the update was accepted; security features may
  181. * have caused the update to be ignored.
  182. */
  183. ret = wm831x_rtc_readtime(dev, &new_tm);
  184. if (ret < 0)
  185. return ret;
  186. new_time = rtc_tm_to_time64(&new_tm);
  187. /* Allow a second of change in case of tick */
  188. if (new_time - time > 1) {
  189. dev_err(dev, "RTC update not permitted by hardware\n");
  190. return -EPERM;
  191. }
  192. return 0;
  193. }
  194. /*
  195. * Read alarm time and date in RTC
  196. */
  197. static int wm831x_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
  198. {
  199. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
  200. int ret;
  201. u16 data[2];
  202. u32 time;
  203. ret = wm831x_bulk_read(wm831x_rtc->wm831x, WM831X_RTC_ALARM_1,
  204. 2, data);
  205. if (ret != 0) {
  206. dev_err(dev, "Failed to read alarm time: %d\n", ret);
  207. return ret;
  208. }
  209. time = (data[0] << 16) | data[1];
  210. rtc_time64_to_tm(time, &alrm->time);
  211. ret = wm831x_reg_read(wm831x_rtc->wm831x, WM831X_RTC_CONTROL);
  212. if (ret < 0) {
  213. dev_err(dev, "Failed to read RTC control: %d\n", ret);
  214. return ret;
  215. }
  216. if (ret & WM831X_RTC_ALM_ENA)
  217. alrm->enabled = 1;
  218. else
  219. alrm->enabled = 0;
  220. return 0;
  221. }
  222. static int wm831x_rtc_stop_alarm(struct wm831x_rtc *wm831x_rtc)
  223. {
  224. wm831x_rtc->alarm_enabled = 0;
  225. return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
  226. WM831X_RTC_ALM_ENA, 0);
  227. }
  228. static int wm831x_rtc_start_alarm(struct wm831x_rtc *wm831x_rtc)
  229. {
  230. wm831x_rtc->alarm_enabled = 1;
  231. return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
  232. WM831X_RTC_ALM_ENA, WM831X_RTC_ALM_ENA);
  233. }
  234. static int wm831x_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  235. {
  236. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
  237. struct wm831x *wm831x = wm831x_rtc->wm831x;
  238. int ret;
  239. unsigned long time;
  240. time = rtc_tm_to_time64(&alrm->time);
  241. ret = wm831x_rtc_stop_alarm(wm831x_rtc);
  242. if (ret < 0) {
  243. dev_err(dev, "Failed to stop alarm: %d\n", ret);
  244. return ret;
  245. }
  246. ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_1,
  247. (time >> 16) & 0xffff);
  248. if (ret < 0) {
  249. dev_err(dev, "Failed to write ALARM_1: %d\n", ret);
  250. return ret;
  251. }
  252. ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_2, time & 0xffff);
  253. if (ret < 0) {
  254. dev_err(dev, "Failed to write ALARM_2: %d\n", ret);
  255. return ret;
  256. }
  257. if (alrm->enabled) {
  258. ret = wm831x_rtc_start_alarm(wm831x_rtc);
  259. if (ret < 0) {
  260. dev_err(dev, "Failed to start alarm: %d\n", ret);
  261. return ret;
  262. }
  263. }
  264. return 0;
  265. }
  266. static int wm831x_rtc_alarm_irq_enable(struct device *dev,
  267. unsigned int enabled)
  268. {
  269. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
  270. if (enabled)
  271. return wm831x_rtc_start_alarm(wm831x_rtc);
  272. else
  273. return wm831x_rtc_stop_alarm(wm831x_rtc);
  274. }
  275. static irqreturn_t wm831x_alm_irq(int irq, void *data)
  276. {
  277. struct wm831x_rtc *wm831x_rtc = data;
  278. rtc_update_irq(wm831x_rtc->rtc, 1, RTC_IRQF | RTC_AF);
  279. return IRQ_HANDLED;
  280. }
  281. static const struct rtc_class_ops wm831x_rtc_ops = {
  282. .read_time = wm831x_rtc_readtime,
  283. .set_time = wm831x_rtc_settime,
  284. .read_alarm = wm831x_rtc_readalarm,
  285. .set_alarm = wm831x_rtc_setalarm,
  286. .alarm_irq_enable = wm831x_rtc_alarm_irq_enable,
  287. };
  288. #ifdef CONFIG_PM
  289. /* Turn off the alarm if it should not be a wake source. */
  290. static int wm831x_rtc_suspend(struct device *dev)
  291. {
  292. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
  293. int ret, enable;
  294. if (wm831x_rtc->alarm_enabled && device_may_wakeup(dev))
  295. enable = WM831X_RTC_ALM_ENA;
  296. else
  297. enable = 0;
  298. ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
  299. WM831X_RTC_ALM_ENA, enable);
  300. if (ret != 0)
  301. dev_err(dev, "Failed to update RTC alarm: %d\n", ret);
  302. return 0;
  303. }
  304. /* Enable the alarm if it should be enabled (in case it was disabled to
  305. * prevent use as a wake source).
  306. */
  307. static int wm831x_rtc_resume(struct device *dev)
  308. {
  309. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
  310. int ret;
  311. if (wm831x_rtc->alarm_enabled) {
  312. ret = wm831x_rtc_start_alarm(wm831x_rtc);
  313. if (ret != 0)
  314. dev_err(dev, "Failed to restart RTC alarm: %d\n", ret);
  315. }
  316. return 0;
  317. }
  318. /* Unconditionally disable the alarm */
  319. static int wm831x_rtc_freeze(struct device *dev)
  320. {
  321. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
  322. int ret;
  323. ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
  324. WM831X_RTC_ALM_ENA, 0);
  325. if (ret != 0)
  326. dev_err(dev, "Failed to stop RTC alarm: %d\n", ret);
  327. return 0;
  328. }
  329. #else
  330. #define wm831x_rtc_suspend NULL
  331. #define wm831x_rtc_resume NULL
  332. #define wm831x_rtc_freeze NULL
  333. #endif
  334. static int wm831x_rtc_probe(struct platform_device *pdev)
  335. {
  336. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  337. struct wm831x_rtc *wm831x_rtc;
  338. int alm_irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "ALM"));
  339. int ret = 0;
  340. wm831x_rtc = devm_kzalloc(&pdev->dev, sizeof(*wm831x_rtc), GFP_KERNEL);
  341. if (wm831x_rtc == NULL)
  342. return -ENOMEM;
  343. platform_set_drvdata(pdev, wm831x_rtc);
  344. wm831x_rtc->wm831x = wm831x;
  345. ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
  346. if (ret < 0) {
  347. dev_err(&pdev->dev, "Failed to read RTC control: %d\n", ret);
  348. return ret;
  349. }
  350. if (ret & WM831X_RTC_ALM_ENA)
  351. wm831x_rtc->alarm_enabled = 1;
  352. device_init_wakeup(&pdev->dev, 1);
  353. wm831x_rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
  354. if (IS_ERR(wm831x_rtc->rtc))
  355. return PTR_ERR(wm831x_rtc->rtc);
  356. wm831x_rtc->rtc->ops = &wm831x_rtc_ops;
  357. wm831x_rtc->rtc->range_max = U32_MAX;
  358. ret = rtc_register_device(wm831x_rtc->rtc);
  359. if (ret)
  360. return ret;
  361. ret = devm_request_threaded_irq(&pdev->dev, alm_irq, NULL,
  362. wm831x_alm_irq,
  363. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  364. "RTC alarm",
  365. wm831x_rtc);
  366. if (ret != 0) {
  367. dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n",
  368. alm_irq, ret);
  369. }
  370. wm831x_rtc_add_randomness(wm831x);
  371. return 0;
  372. }
  373. static const struct dev_pm_ops wm831x_rtc_pm_ops = {
  374. .suspend = wm831x_rtc_suspend,
  375. .resume = wm831x_rtc_resume,
  376. .freeze = wm831x_rtc_freeze,
  377. .thaw = wm831x_rtc_resume,
  378. .restore = wm831x_rtc_resume,
  379. .poweroff = wm831x_rtc_suspend,
  380. };
  381. static struct platform_driver wm831x_rtc_driver = {
  382. .probe = wm831x_rtc_probe,
  383. .driver = {
  384. .name = "wm831x-rtc",
  385. .pm = &wm831x_rtc_pm_ops,
  386. },
  387. };
  388. module_platform_driver(wm831x_rtc_driver);
  389. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  390. MODULE_DESCRIPTION("RTC driver for the WM831x series PMICs");
  391. MODULE_LICENSE("GPL");
  392. MODULE_ALIAS("platform:wm831x-rtc");