rtc-v3020.c 8.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* drivers/rtc/rtc-v3020.c
  3. *
  4. * Copyright (C) 2006 8D Technologies inc.
  5. * Copyright (C) 2004 Compulab Ltd.
  6. *
  7. * Driver for the V3020 RTC
  8. *
  9. * Changelog:
  10. *
  11. * 10-May-2006: Raphael Assenat <raph@8d.com>
  12. * - Converted to platform driver
  13. * - Use the generic rtc class
  14. *
  15. * ??-???-2004: Someone at Compulab
  16. * - Initial driver creation.
  17. */
  18. #include <linux/platform_device.h>
  19. #include <linux/module.h>
  20. #include <linux/init.h>
  21. #include <linux/rtc.h>
  22. #include <linux/types.h>
  23. #include <linux/bcd.h>
  24. #include <linux/platform_data/rtc-v3020.h>
  25. #include <linux/delay.h>
  26. #include <linux/gpio.h>
  27. #include <linux/slab.h>
  28. #include <linux/io.h>
  29. #undef DEBUG
  30. struct v3020;
  31. struct v3020_chip_ops {
  32. int (*map_io)(struct v3020 *chip, struct platform_device *pdev,
  33. struct v3020_platform_data *pdata);
  34. void (*unmap_io)(struct v3020 *chip);
  35. unsigned char (*read_bit)(struct v3020 *chip);
  36. void (*write_bit)(struct v3020 *chip, unsigned char bit);
  37. };
  38. #define V3020_CS 0
  39. #define V3020_WR 1
  40. #define V3020_RD 2
  41. #define V3020_IO 3
  42. struct v3020 {
  43. /* MMIO access */
  44. void __iomem *ioaddress;
  45. int leftshift;
  46. /* GPIO access */
  47. struct gpio *gpio;
  48. const struct v3020_chip_ops *ops;
  49. struct rtc_device *rtc;
  50. };
  51. static int v3020_mmio_map(struct v3020 *chip, struct platform_device *pdev,
  52. struct v3020_platform_data *pdata)
  53. {
  54. if (pdev->num_resources != 1)
  55. return -EBUSY;
  56. if (pdev->resource[0].flags != IORESOURCE_MEM)
  57. return -EBUSY;
  58. chip->leftshift = pdata->leftshift;
  59. chip->ioaddress = ioremap(pdev->resource[0].start, 1);
  60. if (chip->ioaddress == NULL)
  61. return -EBUSY;
  62. return 0;
  63. }
  64. static void v3020_mmio_unmap(struct v3020 *chip)
  65. {
  66. iounmap(chip->ioaddress);
  67. }
  68. static void v3020_mmio_write_bit(struct v3020 *chip, unsigned char bit)
  69. {
  70. writel(bit << chip->leftshift, chip->ioaddress);
  71. }
  72. static unsigned char v3020_mmio_read_bit(struct v3020 *chip)
  73. {
  74. return !!(readl(chip->ioaddress) & (1 << chip->leftshift));
  75. }
  76. static const struct v3020_chip_ops v3020_mmio_ops = {
  77. .map_io = v3020_mmio_map,
  78. .unmap_io = v3020_mmio_unmap,
  79. .read_bit = v3020_mmio_read_bit,
  80. .write_bit = v3020_mmio_write_bit,
  81. };
  82. static struct gpio v3020_gpio[] = {
  83. { 0, GPIOF_OUT_INIT_HIGH, "RTC CS"},
  84. { 0, GPIOF_OUT_INIT_HIGH, "RTC WR"},
  85. { 0, GPIOF_OUT_INIT_HIGH, "RTC RD"},
  86. { 0, GPIOF_OUT_INIT_HIGH, "RTC IO"},
  87. };
  88. static int v3020_gpio_map(struct v3020 *chip, struct platform_device *pdev,
  89. struct v3020_platform_data *pdata)
  90. {
  91. int err;
  92. v3020_gpio[V3020_CS].gpio = pdata->gpio_cs;
  93. v3020_gpio[V3020_WR].gpio = pdata->gpio_wr;
  94. v3020_gpio[V3020_RD].gpio = pdata->gpio_rd;
  95. v3020_gpio[V3020_IO].gpio = pdata->gpio_io;
  96. err = gpio_request_array(v3020_gpio, ARRAY_SIZE(v3020_gpio));
  97. if (!err)
  98. chip->gpio = v3020_gpio;
  99. return err;
  100. }
  101. static void v3020_gpio_unmap(struct v3020 *chip)
  102. {
  103. gpio_free_array(v3020_gpio, ARRAY_SIZE(v3020_gpio));
  104. }
  105. static void v3020_gpio_write_bit(struct v3020 *chip, unsigned char bit)
  106. {
  107. gpio_direction_output(chip->gpio[V3020_IO].gpio, bit);
  108. gpio_set_value(chip->gpio[V3020_CS].gpio, 0);
  109. gpio_set_value(chip->gpio[V3020_WR].gpio, 0);
  110. udelay(1);
  111. gpio_set_value(chip->gpio[V3020_WR].gpio, 1);
  112. gpio_set_value(chip->gpio[V3020_CS].gpio, 1);
  113. }
  114. static unsigned char v3020_gpio_read_bit(struct v3020 *chip)
  115. {
  116. int bit;
  117. gpio_direction_input(chip->gpio[V3020_IO].gpio);
  118. gpio_set_value(chip->gpio[V3020_CS].gpio, 0);
  119. gpio_set_value(chip->gpio[V3020_RD].gpio, 0);
  120. udelay(1);
  121. bit = !!gpio_get_value(chip->gpio[V3020_IO].gpio);
  122. udelay(1);
  123. gpio_set_value(chip->gpio[V3020_RD].gpio, 1);
  124. gpio_set_value(chip->gpio[V3020_CS].gpio, 1);
  125. return bit;
  126. }
  127. static const struct v3020_chip_ops v3020_gpio_ops = {
  128. .map_io = v3020_gpio_map,
  129. .unmap_io = v3020_gpio_unmap,
  130. .read_bit = v3020_gpio_read_bit,
  131. .write_bit = v3020_gpio_write_bit,
  132. };
  133. static void v3020_set_reg(struct v3020 *chip, unsigned char address,
  134. unsigned char data)
  135. {
  136. int i;
  137. unsigned char tmp;
  138. tmp = address;
  139. for (i = 0; i < 4; i++) {
  140. chip->ops->write_bit(chip, (tmp & 1));
  141. tmp >>= 1;
  142. udelay(1);
  143. }
  144. /* Commands dont have data */
  145. if (!V3020_IS_COMMAND(address)) {
  146. for (i = 0; i < 8; i++) {
  147. chip->ops->write_bit(chip, (data & 1));
  148. data >>= 1;
  149. udelay(1);
  150. }
  151. }
  152. }
  153. static unsigned char v3020_get_reg(struct v3020 *chip, unsigned char address)
  154. {
  155. unsigned int data = 0;
  156. int i;
  157. for (i = 0; i < 4; i++) {
  158. chip->ops->write_bit(chip, (address & 1));
  159. address >>= 1;
  160. udelay(1);
  161. }
  162. for (i = 0; i < 8; i++) {
  163. data >>= 1;
  164. if (chip->ops->read_bit(chip))
  165. data |= 0x80;
  166. udelay(1);
  167. }
  168. return data;
  169. }
  170. static int v3020_read_time(struct device *dev, struct rtc_time *dt)
  171. {
  172. struct v3020 *chip = dev_get_drvdata(dev);
  173. int tmp;
  174. /* Copy the current time to ram... */
  175. v3020_set_reg(chip, V3020_CMD_CLOCK2RAM, 0);
  176. /* ...and then read constant values. */
  177. tmp = v3020_get_reg(chip, V3020_SECONDS);
  178. dt->tm_sec = bcd2bin(tmp);
  179. tmp = v3020_get_reg(chip, V3020_MINUTES);
  180. dt->tm_min = bcd2bin(tmp);
  181. tmp = v3020_get_reg(chip, V3020_HOURS);
  182. dt->tm_hour = bcd2bin(tmp);
  183. tmp = v3020_get_reg(chip, V3020_MONTH_DAY);
  184. dt->tm_mday = bcd2bin(tmp);
  185. tmp = v3020_get_reg(chip, V3020_MONTH);
  186. dt->tm_mon = bcd2bin(tmp) - 1;
  187. tmp = v3020_get_reg(chip, V3020_WEEK_DAY);
  188. dt->tm_wday = bcd2bin(tmp);
  189. tmp = v3020_get_reg(chip, V3020_YEAR);
  190. dt->tm_year = bcd2bin(tmp)+100;
  191. dev_dbg(dev, "\n%s : Read RTC values\n", __func__);
  192. dev_dbg(dev, "tm_hour: %i\n", dt->tm_hour);
  193. dev_dbg(dev, "tm_min : %i\n", dt->tm_min);
  194. dev_dbg(dev, "tm_sec : %i\n", dt->tm_sec);
  195. dev_dbg(dev, "tm_year: %i\n", dt->tm_year);
  196. dev_dbg(dev, "tm_mon : %i\n", dt->tm_mon);
  197. dev_dbg(dev, "tm_mday: %i\n", dt->tm_mday);
  198. dev_dbg(dev, "tm_wday: %i\n", dt->tm_wday);
  199. return 0;
  200. }
  201. static int v3020_set_time(struct device *dev, struct rtc_time *dt)
  202. {
  203. struct v3020 *chip = dev_get_drvdata(dev);
  204. dev_dbg(dev, "\n%s : Setting RTC values\n", __func__);
  205. dev_dbg(dev, "tm_sec : %i\n", dt->tm_sec);
  206. dev_dbg(dev, "tm_min : %i\n", dt->tm_min);
  207. dev_dbg(dev, "tm_hour: %i\n", dt->tm_hour);
  208. dev_dbg(dev, "tm_mday: %i\n", dt->tm_mday);
  209. dev_dbg(dev, "tm_wday: %i\n", dt->tm_wday);
  210. dev_dbg(dev, "tm_year: %i\n", dt->tm_year);
  211. /* Write all the values to ram... */
  212. v3020_set_reg(chip, V3020_SECONDS, bin2bcd(dt->tm_sec));
  213. v3020_set_reg(chip, V3020_MINUTES, bin2bcd(dt->tm_min));
  214. v3020_set_reg(chip, V3020_HOURS, bin2bcd(dt->tm_hour));
  215. v3020_set_reg(chip, V3020_MONTH_DAY, bin2bcd(dt->tm_mday));
  216. v3020_set_reg(chip, V3020_MONTH, bin2bcd(dt->tm_mon + 1));
  217. v3020_set_reg(chip, V3020_WEEK_DAY, bin2bcd(dt->tm_wday));
  218. v3020_set_reg(chip, V3020_YEAR, bin2bcd(dt->tm_year % 100));
  219. /* ...and set the clock. */
  220. v3020_set_reg(chip, V3020_CMD_RAM2CLOCK, 0);
  221. /* Compulab used this delay here. I dont know why,
  222. * the datasheet does not specify a delay. */
  223. /*mdelay(5);*/
  224. return 0;
  225. }
  226. static const struct rtc_class_ops v3020_rtc_ops = {
  227. .read_time = v3020_read_time,
  228. .set_time = v3020_set_time,
  229. };
  230. static int rtc_probe(struct platform_device *pdev)
  231. {
  232. struct v3020_platform_data *pdata = dev_get_platdata(&pdev->dev);
  233. struct v3020 *chip;
  234. int retval = -EBUSY;
  235. int i;
  236. chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
  237. if (!chip)
  238. return -ENOMEM;
  239. if (pdata->use_gpio)
  240. chip->ops = &v3020_gpio_ops;
  241. else
  242. chip->ops = &v3020_mmio_ops;
  243. retval = chip->ops->map_io(chip, pdev, pdata);
  244. if (retval)
  245. return retval;
  246. /* Make sure the v3020 expects a communication cycle
  247. * by reading 8 times */
  248. for (i = 0; i < 8; i++)
  249. chip->ops->read_bit(chip);
  250. /* Test chip by doing a write/read sequence
  251. * to the chip ram */
  252. v3020_set_reg(chip, V3020_SECONDS, 0x33);
  253. if (v3020_get_reg(chip, V3020_SECONDS) != 0x33) {
  254. retval = -ENODEV;
  255. goto err_io;
  256. }
  257. /* Make sure frequency measurement mode, test modes, and lock
  258. * are all disabled */
  259. v3020_set_reg(chip, V3020_STATUS_0, 0x0);
  260. if (pdata->use_gpio)
  261. dev_info(&pdev->dev, "Chip available at GPIOs "
  262. "%d, %d, %d, %d\n",
  263. chip->gpio[V3020_CS].gpio, chip->gpio[V3020_WR].gpio,
  264. chip->gpio[V3020_RD].gpio, chip->gpio[V3020_IO].gpio);
  265. else
  266. dev_info(&pdev->dev, "Chip available at "
  267. "physical address 0x%llx,"
  268. "data connected to D%d\n",
  269. (unsigned long long)pdev->resource[0].start,
  270. chip->leftshift);
  271. platform_set_drvdata(pdev, chip);
  272. chip->rtc = devm_rtc_device_register(&pdev->dev, "v3020",
  273. &v3020_rtc_ops, THIS_MODULE);
  274. if (IS_ERR(chip->rtc)) {
  275. retval = PTR_ERR(chip->rtc);
  276. goto err_io;
  277. }
  278. return 0;
  279. err_io:
  280. chip->ops->unmap_io(chip);
  281. return retval;
  282. }
  283. static int rtc_remove(struct platform_device *dev)
  284. {
  285. struct v3020 *chip = platform_get_drvdata(dev);
  286. chip->ops->unmap_io(chip);
  287. return 0;
  288. }
  289. static struct platform_driver rtc_device_driver = {
  290. .probe = rtc_probe,
  291. .remove = rtc_remove,
  292. .driver = {
  293. .name = "v3020",
  294. },
  295. };
  296. module_platform_driver(rtc_device_driver);
  297. MODULE_DESCRIPTION("V3020 RTC");
  298. MODULE_AUTHOR("Raphael Assenat");
  299. MODULE_LICENSE("GPL");
  300. MODULE_ALIAS("platform:v3020");