rtc-rs5c372.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs
  4. *
  5. * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net>
  6. * Copyright (C) 2006 Tower Technologies
  7. * Copyright (C) 2008 Paul Mundt
  8. */
  9. #include <linux/i2c.h>
  10. #include <linux/rtc.h>
  11. #include <linux/bcd.h>
  12. #include <linux/slab.h>
  13. #include <linux/module.h>
  14. #include <linux/of_device.h>
  15. /*
  16. * Ricoh has a family of I2C based RTCs, which differ only slightly from
  17. * each other. Differences center on pinout (e.g. how many interrupts,
  18. * output clock, etc) and how the control registers are used. The '372
  19. * is significant only because that's the one this driver first supported.
  20. */
  21. #define RS5C372_REG_SECS 0
  22. #define RS5C372_REG_MINS 1
  23. #define RS5C372_REG_HOURS 2
  24. #define RS5C372_REG_WDAY 3
  25. #define RS5C372_REG_DAY 4
  26. #define RS5C372_REG_MONTH 5
  27. #define RS5C372_REG_YEAR 6
  28. #define RS5C372_REG_TRIM 7
  29. # define RS5C372_TRIM_XSL 0x80
  30. # define RS5C372_TRIM_MASK 0x7F
  31. #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */
  32. #define RS5C_REG_ALARM_A_HOURS 9
  33. #define RS5C_REG_ALARM_A_WDAY 10
  34. #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */
  35. #define RS5C_REG_ALARM_B_HOURS 12
  36. #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */
  37. #define RS5C_REG_CTRL1 14
  38. # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */
  39. # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */
  40. # define RV5C387_CTRL1_24 (1 << 5)
  41. # define RS5C372A_CTRL1_SL1 (1 << 5)
  42. # define RS5C_CTRL1_CT_MASK (7 << 0)
  43. # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */
  44. # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */
  45. #define RS5C_REG_CTRL2 15
  46. # define RS5C372_CTRL2_24 (1 << 5)
  47. # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2x2x */
  48. # define R2x2x_CTRL2_VDET (1 << 6) /* only if R2x2x */
  49. # define R2x2x_CTRL2_XSTP (1 << 5) /* only if R2x2x */
  50. # define R2x2x_CTRL2_PON (1 << 4) /* only if R2x2x */
  51. # define RS5C_CTRL2_CTFG (1 << 2)
  52. # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */
  53. # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */
  54. /* to read (style 1) or write registers starting at R */
  55. #define RS5C_ADDR(R) (((R) << 4) | 0)
  56. enum rtc_type {
  57. rtc_undef = 0,
  58. rtc_r2025sd,
  59. rtc_r2221tl,
  60. rtc_rs5c372a,
  61. rtc_rs5c372b,
  62. rtc_rv5c386,
  63. rtc_rv5c387a,
  64. };
  65. static const struct i2c_device_id rs5c372_id[] = {
  66. { "r2025sd", rtc_r2025sd },
  67. { "r2221tl", rtc_r2221tl },
  68. { "rs5c372a", rtc_rs5c372a },
  69. { "rs5c372b", rtc_rs5c372b },
  70. { "rv5c386", rtc_rv5c386 },
  71. { "rv5c387a", rtc_rv5c387a },
  72. { }
  73. };
  74. MODULE_DEVICE_TABLE(i2c, rs5c372_id);
  75. static const struct of_device_id rs5c372_of_match[] = {
  76. {
  77. .compatible = "ricoh,r2025sd",
  78. .data = (void *)rtc_r2025sd
  79. },
  80. {
  81. .compatible = "ricoh,r2221tl",
  82. .data = (void *)rtc_r2221tl
  83. },
  84. {
  85. .compatible = "ricoh,rs5c372a",
  86. .data = (void *)rtc_rs5c372a
  87. },
  88. {
  89. .compatible = "ricoh,rs5c372b",
  90. .data = (void *)rtc_rs5c372b
  91. },
  92. {
  93. .compatible = "ricoh,rv5c386",
  94. .data = (void *)rtc_rv5c386
  95. },
  96. {
  97. .compatible = "ricoh,rv5c387a",
  98. .data = (void *)rtc_rv5c387a
  99. },
  100. { }
  101. };
  102. MODULE_DEVICE_TABLE(of, rs5c372_of_match);
  103. /* REVISIT: this assumes that:
  104. * - we're in the 21st century, so it's safe to ignore the century
  105. * bit for rv5c38[67] (REG_MONTH bit 7);
  106. * - we should use ALARM_A not ALARM_B (may be wrong on some boards)
  107. */
  108. struct rs5c372 {
  109. struct i2c_client *client;
  110. struct rtc_device *rtc;
  111. enum rtc_type type;
  112. unsigned time24:1;
  113. unsigned has_irq:1;
  114. unsigned smbus:1;
  115. char buf[17];
  116. char *regs;
  117. };
  118. static int rs5c_get_regs(struct rs5c372 *rs5c)
  119. {
  120. struct i2c_client *client = rs5c->client;
  121. struct i2c_msg msgs[] = {
  122. {
  123. .addr = client->addr,
  124. .flags = I2C_M_RD,
  125. .len = sizeof(rs5c->buf),
  126. .buf = rs5c->buf
  127. },
  128. };
  129. /* This implements the third reading method from the datasheet, using
  130. * an internal address that's reset after each transaction (by STOP)
  131. * to 0x0f ... so we read extra registers, and skip the first one.
  132. *
  133. * The first method doesn't work with the iop3xx adapter driver, on at
  134. * least 80219 chips; this works around that bug.
  135. *
  136. * The third method on the other hand doesn't work for the SMBus-only
  137. * configurations, so we use the the first method there, stripping off
  138. * the extra register in the process.
  139. */
  140. if (rs5c->smbus) {
  141. int addr = RS5C_ADDR(RS5C372_REG_SECS);
  142. int size = sizeof(rs5c->buf) - 1;
  143. if (i2c_smbus_read_i2c_block_data(client, addr, size,
  144. rs5c->buf + 1) != size) {
  145. dev_warn(&client->dev, "can't read registers\n");
  146. return -EIO;
  147. }
  148. } else {
  149. if ((i2c_transfer(client->adapter, msgs, 1)) != 1) {
  150. dev_warn(&client->dev, "can't read registers\n");
  151. return -EIO;
  152. }
  153. }
  154. dev_dbg(&client->dev,
  155. "%3ph (%02x) %3ph (%02x), %3ph, %3ph; %02x %02x\n",
  156. rs5c->regs + 0, rs5c->regs[3],
  157. rs5c->regs + 4, rs5c->regs[7],
  158. rs5c->regs + 8, rs5c->regs + 11,
  159. rs5c->regs[14], rs5c->regs[15]);
  160. return 0;
  161. }
  162. static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg)
  163. {
  164. unsigned hour;
  165. if (rs5c->time24)
  166. return bcd2bin(reg & 0x3f);
  167. hour = bcd2bin(reg & 0x1f);
  168. if (hour == 12)
  169. hour = 0;
  170. if (reg & 0x20)
  171. hour += 12;
  172. return hour;
  173. }
  174. static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour)
  175. {
  176. if (rs5c->time24)
  177. return bin2bcd(hour);
  178. if (hour > 12)
  179. return 0x20 | bin2bcd(hour - 12);
  180. if (hour == 12)
  181. return 0x20 | bin2bcd(12);
  182. if (hour == 0)
  183. return bin2bcd(12);
  184. return bin2bcd(hour);
  185. }
  186. static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm)
  187. {
  188. struct i2c_client *client = to_i2c_client(dev);
  189. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  190. int status = rs5c_get_regs(rs5c);
  191. unsigned char ctrl2 = rs5c->regs[RS5C_REG_CTRL2];
  192. if (status < 0)
  193. return status;
  194. switch (rs5c->type) {
  195. case rtc_r2025sd:
  196. case rtc_r2221tl:
  197. if ((rs5c->type == rtc_r2025sd && !(ctrl2 & R2x2x_CTRL2_XSTP)) ||
  198. (rs5c->type == rtc_r2221tl && (ctrl2 & R2x2x_CTRL2_XSTP))) {
  199. dev_warn(&client->dev, "rtc oscillator interruption detected. Please reset the rtc clock.\n");
  200. return -EINVAL;
  201. }
  202. break;
  203. default:
  204. if (ctrl2 & RS5C_CTRL2_XSTP) {
  205. dev_warn(&client->dev, "rtc oscillator interruption detected. Please reset the rtc clock.\n");
  206. return -EINVAL;
  207. }
  208. }
  209. tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f);
  210. tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f);
  211. tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]);
  212. tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07);
  213. tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f);
  214. /* tm->tm_mon is zero-based */
  215. tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1;
  216. /* year is 1900 + tm->tm_year */
  217. tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100;
  218. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  219. "mday=%d, mon=%d, year=%d, wday=%d\n",
  220. __func__,
  221. tm->tm_sec, tm->tm_min, tm->tm_hour,
  222. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  223. return 0;
  224. }
  225. static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm)
  226. {
  227. struct i2c_client *client = to_i2c_client(dev);
  228. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  229. unsigned char buf[7];
  230. unsigned char ctrl2;
  231. int addr;
  232. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d "
  233. "mday=%d, mon=%d, year=%d, wday=%d\n",
  234. __func__,
  235. tm->tm_sec, tm->tm_min, tm->tm_hour,
  236. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  237. addr = RS5C_ADDR(RS5C372_REG_SECS);
  238. buf[0] = bin2bcd(tm->tm_sec);
  239. buf[1] = bin2bcd(tm->tm_min);
  240. buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour);
  241. buf[3] = bin2bcd(tm->tm_wday);
  242. buf[4] = bin2bcd(tm->tm_mday);
  243. buf[5] = bin2bcd(tm->tm_mon + 1);
  244. buf[6] = bin2bcd(tm->tm_year - 100);
  245. if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) {
  246. dev_dbg(&client->dev, "%s: write error in line %i\n",
  247. __func__, __LINE__);
  248. return -EIO;
  249. }
  250. addr = RS5C_ADDR(RS5C_REG_CTRL2);
  251. ctrl2 = i2c_smbus_read_byte_data(client, addr);
  252. /* clear rtc warning bits */
  253. switch (rs5c->type) {
  254. case rtc_r2025sd:
  255. case rtc_r2221tl:
  256. ctrl2 &= ~(R2x2x_CTRL2_VDET | R2x2x_CTRL2_PON);
  257. if (rs5c->type == rtc_r2025sd)
  258. ctrl2 |= R2x2x_CTRL2_XSTP;
  259. else
  260. ctrl2 &= ~R2x2x_CTRL2_XSTP;
  261. break;
  262. default:
  263. ctrl2 &= ~RS5C_CTRL2_XSTP;
  264. break;
  265. }
  266. if (i2c_smbus_write_byte_data(client, addr, ctrl2) < 0) {
  267. dev_dbg(&client->dev, "%s: write error in line %i\n",
  268. __func__, __LINE__);
  269. return -EIO;
  270. }
  271. return 0;
  272. }
  273. #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
  274. #define NEED_TRIM
  275. #endif
  276. #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS)
  277. #define NEED_TRIM
  278. #endif
  279. #ifdef NEED_TRIM
  280. static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim)
  281. {
  282. struct rs5c372 *rs5c372 = i2c_get_clientdata(client);
  283. u8 tmp = rs5c372->regs[RS5C372_REG_TRIM];
  284. if (osc)
  285. *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768;
  286. if (trim) {
  287. dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp);
  288. tmp &= RS5C372_TRIM_MASK;
  289. if (tmp & 0x3e) {
  290. int t = tmp & 0x3f;
  291. if (tmp & 0x40)
  292. t = (~t | (s8)0xc0) + 1;
  293. else
  294. t = t - 1;
  295. tmp = t * 2;
  296. } else
  297. tmp = 0;
  298. *trim = tmp;
  299. }
  300. return 0;
  301. }
  302. #endif
  303. static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  304. {
  305. struct i2c_client *client = to_i2c_client(dev);
  306. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  307. unsigned char buf;
  308. int status, addr;
  309. buf = rs5c->regs[RS5C_REG_CTRL1];
  310. if (!rs5c->has_irq)
  311. return -EINVAL;
  312. status = rs5c_get_regs(rs5c);
  313. if (status < 0)
  314. return status;
  315. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  316. if (enabled)
  317. buf |= RS5C_CTRL1_AALE;
  318. else
  319. buf &= ~RS5C_CTRL1_AALE;
  320. if (i2c_smbus_write_byte_data(client, addr, buf) < 0) {
  321. dev_warn(dev, "can't update alarm\n");
  322. status = -EIO;
  323. } else
  324. rs5c->regs[RS5C_REG_CTRL1] = buf;
  325. return status;
  326. }
  327. /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI,
  328. * which only exposes a polled programming interface; and since
  329. * these calls map directly to those EFI requests; we don't demand
  330. * we have an IRQ for this chip when we go through this API.
  331. *
  332. * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs
  333. * though, managed through RTC_AIE_{ON,OFF} requests.
  334. */
  335. static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  336. {
  337. struct i2c_client *client = to_i2c_client(dev);
  338. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  339. int status;
  340. status = rs5c_get_regs(rs5c);
  341. if (status < 0)
  342. return status;
  343. /* report alarm time */
  344. t->time.tm_sec = 0;
  345. t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f);
  346. t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]);
  347. /* ... and status */
  348. t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE);
  349. t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG);
  350. return 0;
  351. }
  352. static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  353. {
  354. struct i2c_client *client = to_i2c_client(dev);
  355. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  356. int status, addr, i;
  357. unsigned char buf[3];
  358. /* only handle up to 24 hours in the future, like RTC_ALM_SET */
  359. if (t->time.tm_mday != -1
  360. || t->time.tm_mon != -1
  361. || t->time.tm_year != -1)
  362. return -EINVAL;
  363. /* REVISIT: round up tm_sec */
  364. /* if needed, disable irq (clears pending status) */
  365. status = rs5c_get_regs(rs5c);
  366. if (status < 0)
  367. return status;
  368. if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) {
  369. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  370. buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE;
  371. if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) {
  372. dev_dbg(dev, "can't disable alarm\n");
  373. return -EIO;
  374. }
  375. rs5c->regs[RS5C_REG_CTRL1] = buf[0];
  376. }
  377. /* set alarm */
  378. buf[0] = bin2bcd(t->time.tm_min);
  379. buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour);
  380. buf[2] = 0x7f; /* any/all days */
  381. for (i = 0; i < sizeof(buf); i++) {
  382. addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i);
  383. if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) {
  384. dev_dbg(dev, "can't set alarm time\n");
  385. return -EIO;
  386. }
  387. }
  388. /* ... and maybe enable its irq */
  389. if (t->enabled) {
  390. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  391. buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE;
  392. if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0)
  393. dev_warn(dev, "can't enable alarm\n");
  394. rs5c->regs[RS5C_REG_CTRL1] = buf[0];
  395. }
  396. return 0;
  397. }
  398. #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
  399. static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq)
  400. {
  401. int err, osc, trim;
  402. err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim);
  403. if (err == 0) {
  404. seq_printf(seq, "crystal\t\t: %d.%03d KHz\n",
  405. osc / 1000, osc % 1000);
  406. seq_printf(seq, "trim\t\t: %d\n", trim);
  407. }
  408. return 0;
  409. }
  410. #else
  411. #define rs5c372_rtc_proc NULL
  412. #endif
  413. static const struct rtc_class_ops rs5c372_rtc_ops = {
  414. .proc = rs5c372_rtc_proc,
  415. .read_time = rs5c372_rtc_read_time,
  416. .set_time = rs5c372_rtc_set_time,
  417. .read_alarm = rs5c_read_alarm,
  418. .set_alarm = rs5c_set_alarm,
  419. .alarm_irq_enable = rs5c_rtc_alarm_irq_enable,
  420. };
  421. #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS)
  422. static ssize_t rs5c372_sysfs_show_trim(struct device *dev,
  423. struct device_attribute *attr, char *buf)
  424. {
  425. int err, trim;
  426. err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim);
  427. if (err)
  428. return err;
  429. return sprintf(buf, "%d\n", trim);
  430. }
  431. static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL);
  432. static ssize_t rs5c372_sysfs_show_osc(struct device *dev,
  433. struct device_attribute *attr, char *buf)
  434. {
  435. int err, osc;
  436. err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL);
  437. if (err)
  438. return err;
  439. return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000);
  440. }
  441. static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL);
  442. static int rs5c_sysfs_register(struct device *dev)
  443. {
  444. int err;
  445. err = device_create_file(dev, &dev_attr_trim);
  446. if (err)
  447. return err;
  448. err = device_create_file(dev, &dev_attr_osc);
  449. if (err)
  450. device_remove_file(dev, &dev_attr_trim);
  451. return err;
  452. }
  453. static void rs5c_sysfs_unregister(struct device *dev)
  454. {
  455. device_remove_file(dev, &dev_attr_trim);
  456. device_remove_file(dev, &dev_attr_osc);
  457. }
  458. #else
  459. static int rs5c_sysfs_register(struct device *dev)
  460. {
  461. return 0;
  462. }
  463. static void rs5c_sysfs_unregister(struct device *dev)
  464. {
  465. /* nothing */
  466. }
  467. #endif /* SYSFS */
  468. static struct i2c_driver rs5c372_driver;
  469. static int rs5c_oscillator_setup(struct rs5c372 *rs5c372)
  470. {
  471. unsigned char buf[2];
  472. int addr, i, ret = 0;
  473. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  474. buf[0] = rs5c372->regs[RS5C_REG_CTRL1];
  475. buf[1] = rs5c372->regs[RS5C_REG_CTRL2];
  476. switch (rs5c372->type) {
  477. case rtc_r2025sd:
  478. if (buf[1] & R2x2x_CTRL2_XSTP)
  479. return ret;
  480. break;
  481. case rtc_r2221tl:
  482. if (!(buf[1] & R2x2x_CTRL2_XSTP))
  483. return ret;
  484. break;
  485. default:
  486. if (!(buf[1] & RS5C_CTRL2_XSTP))
  487. return ret;
  488. break;
  489. }
  490. /* use 24hr mode */
  491. switch (rs5c372->type) {
  492. case rtc_rs5c372a:
  493. case rtc_rs5c372b:
  494. buf[1] |= RS5C372_CTRL2_24;
  495. rs5c372->time24 = 1;
  496. break;
  497. case rtc_r2025sd:
  498. case rtc_r2221tl:
  499. case rtc_rv5c386:
  500. case rtc_rv5c387a:
  501. buf[0] |= RV5C387_CTRL1_24;
  502. rs5c372->time24 = 1;
  503. break;
  504. default:
  505. /* impossible */
  506. break;
  507. }
  508. for (i = 0; i < sizeof(buf); i++) {
  509. addr = RS5C_ADDR(RS5C_REG_CTRL1 + i);
  510. ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]);
  511. if (unlikely(ret < 0))
  512. return ret;
  513. }
  514. rs5c372->regs[RS5C_REG_CTRL1] = buf[0];
  515. rs5c372->regs[RS5C_REG_CTRL2] = buf[1];
  516. return 0;
  517. }
  518. static int rs5c372_probe(struct i2c_client *client,
  519. const struct i2c_device_id *id)
  520. {
  521. int err = 0;
  522. int smbus_mode = 0;
  523. struct rs5c372 *rs5c372;
  524. dev_dbg(&client->dev, "%s\n", __func__);
  525. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
  526. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) {
  527. /*
  528. * If we don't have any master mode adapter, try breaking
  529. * it down in to the barest of capabilities.
  530. */
  531. if (i2c_check_functionality(client->adapter,
  532. I2C_FUNC_SMBUS_BYTE_DATA |
  533. I2C_FUNC_SMBUS_I2C_BLOCK))
  534. smbus_mode = 1;
  535. else {
  536. /* Still no good, give up */
  537. err = -ENODEV;
  538. goto exit;
  539. }
  540. }
  541. rs5c372 = devm_kzalloc(&client->dev, sizeof(struct rs5c372),
  542. GFP_KERNEL);
  543. if (!rs5c372) {
  544. err = -ENOMEM;
  545. goto exit;
  546. }
  547. rs5c372->client = client;
  548. i2c_set_clientdata(client, rs5c372);
  549. if (client->dev.of_node)
  550. rs5c372->type = (enum rtc_type)
  551. of_device_get_match_data(&client->dev);
  552. else
  553. rs5c372->type = id->driver_data;
  554. /* we read registers 0x0f then 0x00-0x0f; skip the first one */
  555. rs5c372->regs = &rs5c372->buf[1];
  556. rs5c372->smbus = smbus_mode;
  557. err = rs5c_get_regs(rs5c372);
  558. if (err < 0)
  559. goto exit;
  560. /* clock may be set for am/pm or 24 hr time */
  561. switch (rs5c372->type) {
  562. case rtc_rs5c372a:
  563. case rtc_rs5c372b:
  564. /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b.
  565. * so does periodic irq, except some 327a modes.
  566. */
  567. if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24)
  568. rs5c372->time24 = 1;
  569. break;
  570. case rtc_r2025sd:
  571. case rtc_r2221tl:
  572. case rtc_rv5c386:
  573. case rtc_rv5c387a:
  574. if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24)
  575. rs5c372->time24 = 1;
  576. /* alarm uses ALARM_W; and nINTRB for alarm and periodic
  577. * irq, on both 386 and 387
  578. */
  579. break;
  580. default:
  581. dev_err(&client->dev, "unknown RTC type\n");
  582. goto exit;
  583. }
  584. /* if the oscillator lost power and no other software (like
  585. * the bootloader) set it up, do it here.
  586. *
  587. * The R2025S/D does this a little differently than the other
  588. * parts, so we special case that..
  589. */
  590. err = rs5c_oscillator_setup(rs5c372);
  591. if (unlikely(err < 0)) {
  592. dev_err(&client->dev, "setup error\n");
  593. goto exit;
  594. }
  595. dev_info(&client->dev, "%s found, %s\n",
  596. ({ char *s; switch (rs5c372->type) {
  597. case rtc_r2025sd: s = "r2025sd"; break;
  598. case rtc_r2221tl: s = "r2221tl"; break;
  599. case rtc_rs5c372a: s = "rs5c372a"; break;
  600. case rtc_rs5c372b: s = "rs5c372b"; break;
  601. case rtc_rv5c386: s = "rv5c386"; break;
  602. case rtc_rv5c387a: s = "rv5c387a"; break;
  603. default: s = "chip"; break;
  604. }; s;}),
  605. rs5c372->time24 ? "24hr" : "am/pm"
  606. );
  607. /* REVISIT use client->irq to register alarm irq ... */
  608. rs5c372->rtc = devm_rtc_device_register(&client->dev,
  609. rs5c372_driver.driver.name,
  610. &rs5c372_rtc_ops, THIS_MODULE);
  611. if (IS_ERR(rs5c372->rtc)) {
  612. err = PTR_ERR(rs5c372->rtc);
  613. goto exit;
  614. }
  615. err = rs5c_sysfs_register(&client->dev);
  616. if (err)
  617. goto exit;
  618. return 0;
  619. exit:
  620. return err;
  621. }
  622. static int rs5c372_remove(struct i2c_client *client)
  623. {
  624. rs5c_sysfs_unregister(&client->dev);
  625. return 0;
  626. }
  627. static struct i2c_driver rs5c372_driver = {
  628. .driver = {
  629. .name = "rtc-rs5c372",
  630. .of_match_table = of_match_ptr(rs5c372_of_match),
  631. },
  632. .probe = rs5c372_probe,
  633. .remove = rs5c372_remove,
  634. .id_table = rs5c372_id,
  635. };
  636. module_i2c_driver(rs5c372_driver);
  637. MODULE_AUTHOR(
  638. "Pavel Mironchik <pmironchik@optifacio.net>, "
  639. "Alessandro Zummo <a.zummo@towertech.it>, "
  640. "Paul Mundt <lethal@linux-sh.org>");
  641. MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver");
  642. MODULE_LICENSE("GPL");