rtc-r7301.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * EPSON TOYOCOM RTC-7301SF/DG Driver
  4. *
  5. * Copyright (c) 2016 Akinobu Mita <akinobu.mita@gmail.com>
  6. *
  7. * Based on rtc-rp5c01.c
  8. *
  9. * Datasheet: http://www5.epsondevice.com/en/products/parallel/rtc7301sf.html
  10. */
  11. #include <linux/io.h>
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/mod_devicetable.h>
  15. #include <linux/delay.h>
  16. #include <linux/regmap.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/rtc.h>
  19. #define DRV_NAME "rtc-r7301"
  20. #define RTC7301_1_SEC 0x0 /* Bank 0 and Band 1 */
  21. #define RTC7301_10_SEC 0x1 /* Bank 0 and Band 1 */
  22. #define RTC7301_AE BIT(3)
  23. #define RTC7301_1_MIN 0x2 /* Bank 0 and Band 1 */
  24. #define RTC7301_10_MIN 0x3 /* Bank 0 and Band 1 */
  25. #define RTC7301_1_HOUR 0x4 /* Bank 0 and Band 1 */
  26. #define RTC7301_10_HOUR 0x5 /* Bank 0 and Band 1 */
  27. #define RTC7301_DAY_OF_WEEK 0x6 /* Bank 0 and Band 1 */
  28. #define RTC7301_1_DAY 0x7 /* Bank 0 and Band 1 */
  29. #define RTC7301_10_DAY 0x8 /* Bank 0 and Band 1 */
  30. #define RTC7301_1_MONTH 0x9 /* Bank 0 */
  31. #define RTC7301_10_MONTH 0xa /* Bank 0 */
  32. #define RTC7301_1_YEAR 0xb /* Bank 0 */
  33. #define RTC7301_10_YEAR 0xc /* Bank 0 */
  34. #define RTC7301_100_YEAR 0xd /* Bank 0 */
  35. #define RTC7301_1000_YEAR 0xe /* Bank 0 */
  36. #define RTC7301_ALARM_CONTROL 0xe /* Bank 1 */
  37. #define RTC7301_ALARM_CONTROL_AIE BIT(0)
  38. #define RTC7301_ALARM_CONTROL_AF BIT(1)
  39. #define RTC7301_TIMER_CONTROL 0xe /* Bank 2 */
  40. #define RTC7301_TIMER_CONTROL_TIE BIT(0)
  41. #define RTC7301_TIMER_CONTROL_TF BIT(1)
  42. #define RTC7301_CONTROL 0xf /* All banks */
  43. #define RTC7301_CONTROL_BUSY BIT(0)
  44. #define RTC7301_CONTROL_STOP BIT(1)
  45. #define RTC7301_CONTROL_BANK_SEL_0 BIT(2)
  46. #define RTC7301_CONTROL_BANK_SEL_1 BIT(3)
  47. struct rtc7301_priv {
  48. struct regmap *regmap;
  49. int irq;
  50. spinlock_t lock;
  51. u8 bank;
  52. };
  53. static const struct regmap_config rtc7301_regmap_config = {
  54. .reg_bits = 32,
  55. .val_bits = 8,
  56. .reg_stride = 4,
  57. };
  58. static u8 rtc7301_read(struct rtc7301_priv *priv, unsigned int reg)
  59. {
  60. int reg_stride = regmap_get_reg_stride(priv->regmap);
  61. unsigned int val;
  62. regmap_read(priv->regmap, reg_stride * reg, &val);
  63. return val & 0xf;
  64. }
  65. static void rtc7301_write(struct rtc7301_priv *priv, u8 val, unsigned int reg)
  66. {
  67. int reg_stride = regmap_get_reg_stride(priv->regmap);
  68. regmap_write(priv->regmap, reg_stride * reg, val);
  69. }
  70. static void rtc7301_update_bits(struct rtc7301_priv *priv, unsigned int reg,
  71. u8 mask, u8 val)
  72. {
  73. int reg_stride = regmap_get_reg_stride(priv->regmap);
  74. regmap_update_bits(priv->regmap, reg_stride * reg, mask, val);
  75. }
  76. static int rtc7301_wait_while_busy(struct rtc7301_priv *priv)
  77. {
  78. int retries = 100;
  79. while (retries-- > 0) {
  80. u8 val;
  81. val = rtc7301_read(priv, RTC7301_CONTROL);
  82. if (!(val & RTC7301_CONTROL_BUSY))
  83. return 0;
  84. udelay(300);
  85. }
  86. return -ETIMEDOUT;
  87. }
  88. static void rtc7301_stop(struct rtc7301_priv *priv)
  89. {
  90. rtc7301_update_bits(priv, RTC7301_CONTROL, RTC7301_CONTROL_STOP,
  91. RTC7301_CONTROL_STOP);
  92. }
  93. static void rtc7301_start(struct rtc7301_priv *priv)
  94. {
  95. rtc7301_update_bits(priv, RTC7301_CONTROL, RTC7301_CONTROL_STOP, 0);
  96. }
  97. static void rtc7301_select_bank(struct rtc7301_priv *priv, u8 bank)
  98. {
  99. u8 val = 0;
  100. if (bank == priv->bank)
  101. return;
  102. if (bank & BIT(0))
  103. val |= RTC7301_CONTROL_BANK_SEL_0;
  104. if (bank & BIT(1))
  105. val |= RTC7301_CONTROL_BANK_SEL_1;
  106. rtc7301_update_bits(priv, RTC7301_CONTROL,
  107. RTC7301_CONTROL_BANK_SEL_0 |
  108. RTC7301_CONTROL_BANK_SEL_1, val);
  109. priv->bank = bank;
  110. }
  111. static void rtc7301_get_time(struct rtc7301_priv *priv, struct rtc_time *tm,
  112. bool alarm)
  113. {
  114. int year;
  115. tm->tm_sec = rtc7301_read(priv, RTC7301_1_SEC);
  116. tm->tm_sec += (rtc7301_read(priv, RTC7301_10_SEC) & ~RTC7301_AE) * 10;
  117. tm->tm_min = rtc7301_read(priv, RTC7301_1_MIN);
  118. tm->tm_min += (rtc7301_read(priv, RTC7301_10_MIN) & ~RTC7301_AE) * 10;
  119. tm->tm_hour = rtc7301_read(priv, RTC7301_1_HOUR);
  120. tm->tm_hour += (rtc7301_read(priv, RTC7301_10_HOUR) & ~RTC7301_AE) * 10;
  121. tm->tm_mday = rtc7301_read(priv, RTC7301_1_DAY);
  122. tm->tm_mday += (rtc7301_read(priv, RTC7301_10_DAY) & ~RTC7301_AE) * 10;
  123. if (alarm) {
  124. tm->tm_wday = -1;
  125. tm->tm_mon = -1;
  126. tm->tm_year = -1;
  127. tm->tm_yday = -1;
  128. tm->tm_isdst = -1;
  129. return;
  130. }
  131. tm->tm_wday = (rtc7301_read(priv, RTC7301_DAY_OF_WEEK) & ~RTC7301_AE);
  132. tm->tm_mon = rtc7301_read(priv, RTC7301_10_MONTH) * 10 +
  133. rtc7301_read(priv, RTC7301_1_MONTH) - 1;
  134. year = rtc7301_read(priv, RTC7301_1000_YEAR) * 1000 +
  135. rtc7301_read(priv, RTC7301_100_YEAR) * 100 +
  136. rtc7301_read(priv, RTC7301_10_YEAR) * 10 +
  137. rtc7301_read(priv, RTC7301_1_YEAR);
  138. tm->tm_year = year - 1900;
  139. }
  140. static void rtc7301_write_time(struct rtc7301_priv *priv, struct rtc_time *tm,
  141. bool alarm)
  142. {
  143. int year;
  144. rtc7301_write(priv, tm->tm_sec % 10, RTC7301_1_SEC);
  145. rtc7301_write(priv, tm->tm_sec / 10, RTC7301_10_SEC);
  146. rtc7301_write(priv, tm->tm_min % 10, RTC7301_1_MIN);
  147. rtc7301_write(priv, tm->tm_min / 10, RTC7301_10_MIN);
  148. rtc7301_write(priv, tm->tm_hour % 10, RTC7301_1_HOUR);
  149. rtc7301_write(priv, tm->tm_hour / 10, RTC7301_10_HOUR);
  150. rtc7301_write(priv, tm->tm_mday % 10, RTC7301_1_DAY);
  151. rtc7301_write(priv, tm->tm_mday / 10, RTC7301_10_DAY);
  152. /* Don't care for alarm register */
  153. rtc7301_write(priv, alarm ? RTC7301_AE : tm->tm_wday,
  154. RTC7301_DAY_OF_WEEK);
  155. if (alarm)
  156. return;
  157. rtc7301_write(priv, (tm->tm_mon + 1) % 10, RTC7301_1_MONTH);
  158. rtc7301_write(priv, (tm->tm_mon + 1) / 10, RTC7301_10_MONTH);
  159. year = tm->tm_year + 1900;
  160. rtc7301_write(priv, year % 10, RTC7301_1_YEAR);
  161. rtc7301_write(priv, (year / 10) % 10, RTC7301_10_YEAR);
  162. rtc7301_write(priv, (year / 100) % 10, RTC7301_100_YEAR);
  163. rtc7301_write(priv, year / 1000, RTC7301_1000_YEAR);
  164. }
  165. static void rtc7301_alarm_irq(struct rtc7301_priv *priv, unsigned int enabled)
  166. {
  167. rtc7301_update_bits(priv, RTC7301_ALARM_CONTROL,
  168. RTC7301_ALARM_CONTROL_AF |
  169. RTC7301_ALARM_CONTROL_AIE,
  170. enabled ? RTC7301_ALARM_CONTROL_AIE : 0);
  171. }
  172. static int rtc7301_read_time(struct device *dev, struct rtc_time *tm)
  173. {
  174. struct rtc7301_priv *priv = dev_get_drvdata(dev);
  175. unsigned long flags;
  176. int err;
  177. spin_lock_irqsave(&priv->lock, flags);
  178. rtc7301_select_bank(priv, 0);
  179. err = rtc7301_wait_while_busy(priv);
  180. if (!err)
  181. rtc7301_get_time(priv, tm, false);
  182. spin_unlock_irqrestore(&priv->lock, flags);
  183. return err;
  184. }
  185. static int rtc7301_set_time(struct device *dev, struct rtc_time *tm)
  186. {
  187. struct rtc7301_priv *priv = dev_get_drvdata(dev);
  188. unsigned long flags;
  189. spin_lock_irqsave(&priv->lock, flags);
  190. rtc7301_stop(priv);
  191. udelay(300);
  192. rtc7301_select_bank(priv, 0);
  193. rtc7301_write_time(priv, tm, false);
  194. rtc7301_start(priv);
  195. spin_unlock_irqrestore(&priv->lock, flags);
  196. return 0;
  197. }
  198. static int rtc7301_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  199. {
  200. struct rtc7301_priv *priv = dev_get_drvdata(dev);
  201. unsigned long flags;
  202. u8 alrm_ctrl;
  203. if (priv->irq <= 0)
  204. return -EINVAL;
  205. spin_lock_irqsave(&priv->lock, flags);
  206. rtc7301_select_bank(priv, 1);
  207. rtc7301_get_time(priv, &alarm->time, true);
  208. alrm_ctrl = rtc7301_read(priv, RTC7301_ALARM_CONTROL);
  209. alarm->enabled = !!(alrm_ctrl & RTC7301_ALARM_CONTROL_AIE);
  210. alarm->pending = !!(alrm_ctrl & RTC7301_ALARM_CONTROL_AF);
  211. spin_unlock_irqrestore(&priv->lock, flags);
  212. return 0;
  213. }
  214. static int rtc7301_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  215. {
  216. struct rtc7301_priv *priv = dev_get_drvdata(dev);
  217. unsigned long flags;
  218. if (priv->irq <= 0)
  219. return -EINVAL;
  220. spin_lock_irqsave(&priv->lock, flags);
  221. rtc7301_select_bank(priv, 1);
  222. rtc7301_write_time(priv, &alarm->time, true);
  223. rtc7301_alarm_irq(priv, alarm->enabled);
  224. spin_unlock_irqrestore(&priv->lock, flags);
  225. return 0;
  226. }
  227. static int rtc7301_alarm_irq_enable(struct device *dev, unsigned int enabled)
  228. {
  229. struct rtc7301_priv *priv = dev_get_drvdata(dev);
  230. unsigned long flags;
  231. if (priv->irq <= 0)
  232. return -EINVAL;
  233. spin_lock_irqsave(&priv->lock, flags);
  234. rtc7301_select_bank(priv, 1);
  235. rtc7301_alarm_irq(priv, enabled);
  236. spin_unlock_irqrestore(&priv->lock, flags);
  237. return 0;
  238. }
  239. static const struct rtc_class_ops rtc7301_rtc_ops = {
  240. .read_time = rtc7301_read_time,
  241. .set_time = rtc7301_set_time,
  242. .read_alarm = rtc7301_read_alarm,
  243. .set_alarm = rtc7301_set_alarm,
  244. .alarm_irq_enable = rtc7301_alarm_irq_enable,
  245. };
  246. static irqreturn_t rtc7301_irq_handler(int irq, void *dev_id)
  247. {
  248. struct rtc_device *rtc = dev_id;
  249. struct rtc7301_priv *priv = dev_get_drvdata(rtc->dev.parent);
  250. unsigned long flags;
  251. irqreturn_t ret = IRQ_NONE;
  252. u8 alrm_ctrl;
  253. spin_lock_irqsave(&priv->lock, flags);
  254. rtc7301_select_bank(priv, 1);
  255. alrm_ctrl = rtc7301_read(priv, RTC7301_ALARM_CONTROL);
  256. if (alrm_ctrl & RTC7301_ALARM_CONTROL_AF) {
  257. ret = IRQ_HANDLED;
  258. rtc7301_alarm_irq(priv, false);
  259. rtc_update_irq(rtc, 1, RTC_IRQF | RTC_AF);
  260. }
  261. spin_unlock_irqrestore(&priv->lock, flags);
  262. return ret;
  263. }
  264. static void rtc7301_init(struct rtc7301_priv *priv)
  265. {
  266. unsigned long flags;
  267. spin_lock_irqsave(&priv->lock, flags);
  268. rtc7301_select_bank(priv, 2);
  269. rtc7301_write(priv, 0, RTC7301_TIMER_CONTROL);
  270. spin_unlock_irqrestore(&priv->lock, flags);
  271. }
  272. static int __init rtc7301_rtc_probe(struct platform_device *dev)
  273. {
  274. void __iomem *regs;
  275. struct rtc7301_priv *priv;
  276. struct rtc_device *rtc;
  277. int ret;
  278. priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
  279. if (!priv)
  280. return -ENOMEM;
  281. regs = devm_platform_ioremap_resource(dev, 0);
  282. if (IS_ERR(regs))
  283. return PTR_ERR(regs);
  284. priv->regmap = devm_regmap_init_mmio(&dev->dev, regs,
  285. &rtc7301_regmap_config);
  286. if (IS_ERR(priv->regmap))
  287. return PTR_ERR(priv->regmap);
  288. priv->irq = platform_get_irq(dev, 0);
  289. spin_lock_init(&priv->lock);
  290. priv->bank = -1;
  291. rtc7301_init(priv);
  292. platform_set_drvdata(dev, priv);
  293. rtc = devm_rtc_device_register(&dev->dev, DRV_NAME, &rtc7301_rtc_ops,
  294. THIS_MODULE);
  295. if (IS_ERR(rtc))
  296. return PTR_ERR(rtc);
  297. if (priv->irq > 0) {
  298. ret = devm_request_irq(&dev->dev, priv->irq,
  299. rtc7301_irq_handler, IRQF_SHARED,
  300. dev_name(&dev->dev), rtc);
  301. if (ret) {
  302. priv->irq = 0;
  303. dev_err(&dev->dev, "unable to request IRQ\n");
  304. } else {
  305. device_set_wakeup_capable(&dev->dev, true);
  306. }
  307. }
  308. return 0;
  309. }
  310. #ifdef CONFIG_PM_SLEEP
  311. static int rtc7301_suspend(struct device *dev)
  312. {
  313. struct rtc7301_priv *priv = dev_get_drvdata(dev);
  314. if (device_may_wakeup(dev))
  315. enable_irq_wake(priv->irq);
  316. return 0;
  317. }
  318. static int rtc7301_resume(struct device *dev)
  319. {
  320. struct rtc7301_priv *priv = dev_get_drvdata(dev);
  321. if (device_may_wakeup(dev))
  322. disable_irq_wake(priv->irq);
  323. return 0;
  324. }
  325. #endif
  326. static SIMPLE_DEV_PM_OPS(rtc7301_pm_ops, rtc7301_suspend, rtc7301_resume);
  327. static const struct of_device_id rtc7301_dt_match[] = {
  328. { .compatible = "epson,rtc7301sf" },
  329. { .compatible = "epson,rtc7301dg" },
  330. {}
  331. };
  332. MODULE_DEVICE_TABLE(of, rtc7301_dt_match);
  333. static struct platform_driver rtc7301_rtc_driver = {
  334. .driver = {
  335. .name = DRV_NAME,
  336. .of_match_table = rtc7301_dt_match,
  337. .pm = &rtc7301_pm_ops,
  338. },
  339. };
  340. module_platform_driver_probe(rtc7301_rtc_driver, rtc7301_rtc_probe);
  341. MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
  342. MODULE_LICENSE("GPL");
  343. MODULE_DESCRIPTION("EPSON TOYOCOM RTC-7301SF/DG Driver");
  344. MODULE_ALIAS("platform:rtc-r7301");