rtc-pcf85363.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * drivers/rtc/rtc-pcf85363.c
  4. *
  5. * Driver for NXP PCF85363 real-time clock.
  6. *
  7. * Copyright (C) 2017 Eric Nelson
  8. */
  9. #include <linux/module.h>
  10. #include <linux/i2c.h>
  11. #include <linux/slab.h>
  12. #include <linux/rtc.h>
  13. #include <linux/init.h>
  14. #include <linux/err.h>
  15. #include <linux/errno.h>
  16. #include <linux/bcd.h>
  17. #include <linux/of.h>
  18. #include <linux/of_device.h>
  19. #include <linux/regmap.h>
  20. /*
  21. * Date/Time registers
  22. */
  23. #define DT_100THS 0x00
  24. #define DT_SECS 0x01
  25. #define DT_MINUTES 0x02
  26. #define DT_HOURS 0x03
  27. #define DT_DAYS 0x04
  28. #define DT_WEEKDAYS 0x05
  29. #define DT_MONTHS 0x06
  30. #define DT_YEARS 0x07
  31. /*
  32. * Alarm registers
  33. */
  34. #define DT_SECOND_ALM1 0x08
  35. #define DT_MINUTE_ALM1 0x09
  36. #define DT_HOUR_ALM1 0x0a
  37. #define DT_DAY_ALM1 0x0b
  38. #define DT_MONTH_ALM1 0x0c
  39. #define DT_MINUTE_ALM2 0x0d
  40. #define DT_HOUR_ALM2 0x0e
  41. #define DT_WEEKDAY_ALM2 0x0f
  42. #define DT_ALARM_EN 0x10
  43. /*
  44. * Time stamp registers
  45. */
  46. #define DT_TIMESTAMP1 0x11
  47. #define DT_TIMESTAMP2 0x17
  48. #define DT_TIMESTAMP3 0x1d
  49. #define DT_TS_MODE 0x23
  50. /*
  51. * control registers
  52. */
  53. #define CTRL_OFFSET 0x24
  54. #define CTRL_OSCILLATOR 0x25
  55. #define CTRL_BATTERY 0x26
  56. #define CTRL_PIN_IO 0x27
  57. #define CTRL_FUNCTION 0x28
  58. #define CTRL_INTA_EN 0x29
  59. #define CTRL_INTB_EN 0x2a
  60. #define CTRL_FLAGS 0x2b
  61. #define CTRL_RAMBYTE 0x2c
  62. #define CTRL_WDOG 0x2d
  63. #define CTRL_STOP_EN 0x2e
  64. #define CTRL_RESETS 0x2f
  65. #define CTRL_RAM 0x40
  66. #define ALRM_SEC_A1E BIT(0)
  67. #define ALRM_MIN_A1E BIT(1)
  68. #define ALRM_HR_A1E BIT(2)
  69. #define ALRM_DAY_A1E BIT(3)
  70. #define ALRM_MON_A1E BIT(4)
  71. #define ALRM_MIN_A2E BIT(5)
  72. #define ALRM_HR_A2E BIT(6)
  73. #define ALRM_DAY_A2E BIT(7)
  74. #define INT_WDIE BIT(0)
  75. #define INT_BSIE BIT(1)
  76. #define INT_TSRIE BIT(2)
  77. #define INT_A2IE BIT(3)
  78. #define INT_A1IE BIT(4)
  79. #define INT_OIE BIT(5)
  80. #define INT_PIE BIT(6)
  81. #define INT_ILP BIT(7)
  82. #define FLAGS_TSR1F BIT(0)
  83. #define FLAGS_TSR2F BIT(1)
  84. #define FLAGS_TSR3F BIT(2)
  85. #define FLAGS_BSF BIT(3)
  86. #define FLAGS_WDF BIT(4)
  87. #define FLAGS_A1F BIT(5)
  88. #define FLAGS_A2F BIT(6)
  89. #define FLAGS_PIF BIT(7)
  90. #define PIN_IO_INTAPM GENMASK(1, 0)
  91. #define PIN_IO_INTA_CLK 0
  92. #define PIN_IO_INTA_BAT 1
  93. #define PIN_IO_INTA_OUT 2
  94. #define PIN_IO_INTA_HIZ 3
  95. #define STOP_EN_STOP BIT(0)
  96. #define RESET_CPR 0xa4
  97. #define NVRAM_SIZE 0x40
  98. struct pcf85363 {
  99. struct rtc_device *rtc;
  100. struct regmap *regmap;
  101. };
  102. struct pcf85x63_config {
  103. struct regmap_config regmap;
  104. unsigned int num_nvram;
  105. };
  106. static int pcf85363_rtc_read_time(struct device *dev, struct rtc_time *tm)
  107. {
  108. struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
  109. unsigned char buf[DT_YEARS + 1];
  110. int ret, len = sizeof(buf);
  111. /* read the RTC date and time registers all at once */
  112. ret = regmap_bulk_read(pcf85363->regmap, DT_100THS, buf, len);
  113. if (ret) {
  114. dev_err(dev, "%s: error %d\n", __func__, ret);
  115. return ret;
  116. }
  117. tm->tm_year = bcd2bin(buf[DT_YEARS]);
  118. /* adjust for 1900 base of rtc_time */
  119. tm->tm_year += 100;
  120. tm->tm_wday = buf[DT_WEEKDAYS] & 7;
  121. buf[DT_SECS] &= 0x7F;
  122. tm->tm_sec = bcd2bin(buf[DT_SECS]);
  123. buf[DT_MINUTES] &= 0x7F;
  124. tm->tm_min = bcd2bin(buf[DT_MINUTES]);
  125. tm->tm_hour = bcd2bin(buf[DT_HOURS]);
  126. tm->tm_mday = bcd2bin(buf[DT_DAYS]);
  127. tm->tm_mon = bcd2bin(buf[DT_MONTHS]) - 1;
  128. return 0;
  129. }
  130. static int pcf85363_rtc_set_time(struct device *dev, struct rtc_time *tm)
  131. {
  132. struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
  133. unsigned char tmp[11];
  134. unsigned char *buf = &tmp[2];
  135. int ret;
  136. tmp[0] = STOP_EN_STOP;
  137. tmp[1] = RESET_CPR;
  138. buf[DT_100THS] = 0;
  139. buf[DT_SECS] = bin2bcd(tm->tm_sec);
  140. buf[DT_MINUTES] = bin2bcd(tm->tm_min);
  141. buf[DT_HOURS] = bin2bcd(tm->tm_hour);
  142. buf[DT_DAYS] = bin2bcd(tm->tm_mday);
  143. buf[DT_WEEKDAYS] = tm->tm_wday;
  144. buf[DT_MONTHS] = bin2bcd(tm->tm_mon + 1);
  145. buf[DT_YEARS] = bin2bcd(tm->tm_year % 100);
  146. ret = regmap_bulk_write(pcf85363->regmap, CTRL_STOP_EN,
  147. tmp, 2);
  148. if (ret)
  149. return ret;
  150. ret = regmap_bulk_write(pcf85363->regmap, DT_100THS,
  151. buf, sizeof(tmp) - 2);
  152. if (ret)
  153. return ret;
  154. return regmap_write(pcf85363->regmap, CTRL_STOP_EN, 0);
  155. }
  156. static int pcf85363_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  157. {
  158. struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
  159. unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1];
  160. unsigned int val;
  161. int ret;
  162. ret = regmap_bulk_read(pcf85363->regmap, DT_SECOND_ALM1, buf,
  163. sizeof(buf));
  164. if (ret)
  165. return ret;
  166. alrm->time.tm_sec = bcd2bin(buf[0]);
  167. alrm->time.tm_min = bcd2bin(buf[1]);
  168. alrm->time.tm_hour = bcd2bin(buf[2]);
  169. alrm->time.tm_mday = bcd2bin(buf[3]);
  170. alrm->time.tm_mon = bcd2bin(buf[4]) - 1;
  171. ret = regmap_read(pcf85363->regmap, CTRL_INTA_EN, &val);
  172. if (ret)
  173. return ret;
  174. alrm->enabled = !!(val & INT_A1IE);
  175. return 0;
  176. }
  177. static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 *pcf85363, unsigned
  178. int enabled)
  179. {
  180. unsigned int alarm_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E |
  181. ALRM_DAY_A1E | ALRM_MON_A1E;
  182. int ret;
  183. ret = regmap_update_bits(pcf85363->regmap, DT_ALARM_EN, alarm_flags,
  184. enabled ? alarm_flags : 0);
  185. if (ret)
  186. return ret;
  187. ret = regmap_update_bits(pcf85363->regmap, CTRL_INTA_EN,
  188. INT_A1IE, enabled ? INT_A1IE : 0);
  189. if (ret || enabled)
  190. return ret;
  191. /* clear current flags */
  192. return regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0);
  193. }
  194. static int pcf85363_rtc_alarm_irq_enable(struct device *dev,
  195. unsigned int enabled)
  196. {
  197. struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
  198. return _pcf85363_rtc_alarm_irq_enable(pcf85363, enabled);
  199. }
  200. static int pcf85363_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  201. {
  202. struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
  203. unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1];
  204. int ret;
  205. buf[0] = bin2bcd(alrm->time.tm_sec);
  206. buf[1] = bin2bcd(alrm->time.tm_min);
  207. buf[2] = bin2bcd(alrm->time.tm_hour);
  208. buf[3] = bin2bcd(alrm->time.tm_mday);
  209. buf[4] = bin2bcd(alrm->time.tm_mon + 1);
  210. /*
  211. * Disable the alarm interrupt before changing the value to avoid
  212. * spurious interrupts
  213. */
  214. ret = _pcf85363_rtc_alarm_irq_enable(pcf85363, 0);
  215. if (ret)
  216. return ret;
  217. ret = regmap_bulk_write(pcf85363->regmap, DT_SECOND_ALM1, buf,
  218. sizeof(buf));
  219. if (ret)
  220. return ret;
  221. return _pcf85363_rtc_alarm_irq_enable(pcf85363, alrm->enabled);
  222. }
  223. static irqreturn_t pcf85363_rtc_handle_irq(int irq, void *dev_id)
  224. {
  225. struct pcf85363 *pcf85363 = i2c_get_clientdata(dev_id);
  226. unsigned int flags;
  227. int err;
  228. err = regmap_read(pcf85363->regmap, CTRL_FLAGS, &flags);
  229. if (err)
  230. return IRQ_NONE;
  231. if (flags & FLAGS_A1F) {
  232. rtc_update_irq(pcf85363->rtc, 1, RTC_IRQF | RTC_AF);
  233. regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0);
  234. return IRQ_HANDLED;
  235. }
  236. return IRQ_NONE;
  237. }
  238. static const struct rtc_class_ops rtc_ops = {
  239. .read_time = pcf85363_rtc_read_time,
  240. .set_time = pcf85363_rtc_set_time,
  241. };
  242. static const struct rtc_class_ops rtc_ops_alarm = {
  243. .read_time = pcf85363_rtc_read_time,
  244. .set_time = pcf85363_rtc_set_time,
  245. .read_alarm = pcf85363_rtc_read_alarm,
  246. .set_alarm = pcf85363_rtc_set_alarm,
  247. .alarm_irq_enable = pcf85363_rtc_alarm_irq_enable,
  248. };
  249. static int pcf85363_nvram_read(void *priv, unsigned int offset, void *val,
  250. size_t bytes)
  251. {
  252. struct pcf85363 *pcf85363 = priv;
  253. return regmap_bulk_read(pcf85363->regmap, CTRL_RAM + offset,
  254. val, bytes);
  255. }
  256. static int pcf85363_nvram_write(void *priv, unsigned int offset, void *val,
  257. size_t bytes)
  258. {
  259. struct pcf85363 *pcf85363 = priv;
  260. return regmap_bulk_write(pcf85363->regmap, CTRL_RAM + offset,
  261. val, bytes);
  262. }
  263. static int pcf85x63_nvram_read(void *priv, unsigned int offset, void *val,
  264. size_t bytes)
  265. {
  266. struct pcf85363 *pcf85363 = priv;
  267. unsigned int tmp_val;
  268. int ret;
  269. ret = regmap_read(pcf85363->regmap, CTRL_RAMBYTE, &tmp_val);
  270. (*(unsigned char *) val) = (unsigned char) tmp_val;
  271. return ret;
  272. }
  273. static int pcf85x63_nvram_write(void *priv, unsigned int offset, void *val,
  274. size_t bytes)
  275. {
  276. struct pcf85363 *pcf85363 = priv;
  277. unsigned char tmp_val;
  278. tmp_val = *((unsigned char *)val);
  279. return regmap_write(pcf85363->regmap, CTRL_RAMBYTE,
  280. (unsigned int)tmp_val);
  281. }
  282. static const struct pcf85x63_config pcf_85263_config = {
  283. .regmap = {
  284. .reg_bits = 8,
  285. .val_bits = 8,
  286. .max_register = 0x2f,
  287. },
  288. .num_nvram = 1
  289. };
  290. static const struct pcf85x63_config pcf_85363_config = {
  291. .regmap = {
  292. .reg_bits = 8,
  293. .val_bits = 8,
  294. .max_register = 0x7f,
  295. },
  296. .num_nvram = 2
  297. };
  298. static int pcf85363_probe(struct i2c_client *client,
  299. const struct i2c_device_id *id)
  300. {
  301. struct pcf85363 *pcf85363;
  302. const struct pcf85x63_config *config = &pcf_85363_config;
  303. const void *data = of_device_get_match_data(&client->dev);
  304. static struct nvmem_config nvmem_cfg[] = {
  305. {
  306. .name = "pcf85x63-",
  307. .word_size = 1,
  308. .stride = 1,
  309. .size = 1,
  310. .reg_read = pcf85x63_nvram_read,
  311. .reg_write = pcf85x63_nvram_write,
  312. }, {
  313. .name = "pcf85363-",
  314. .word_size = 1,
  315. .stride = 1,
  316. .size = NVRAM_SIZE,
  317. .reg_read = pcf85363_nvram_read,
  318. .reg_write = pcf85363_nvram_write,
  319. },
  320. };
  321. int ret, i;
  322. if (data)
  323. config = data;
  324. pcf85363 = devm_kzalloc(&client->dev, sizeof(struct pcf85363),
  325. GFP_KERNEL);
  326. if (!pcf85363)
  327. return -ENOMEM;
  328. pcf85363->regmap = devm_regmap_init_i2c(client, &config->regmap);
  329. if (IS_ERR(pcf85363->regmap)) {
  330. dev_err(&client->dev, "regmap allocation failed\n");
  331. return PTR_ERR(pcf85363->regmap);
  332. }
  333. i2c_set_clientdata(client, pcf85363);
  334. pcf85363->rtc = devm_rtc_allocate_device(&client->dev);
  335. if (IS_ERR(pcf85363->rtc))
  336. return PTR_ERR(pcf85363->rtc);
  337. pcf85363->rtc->ops = &rtc_ops;
  338. pcf85363->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
  339. pcf85363->rtc->range_max = RTC_TIMESTAMP_END_2099;
  340. if (client->irq > 0) {
  341. regmap_write(pcf85363->regmap, CTRL_FLAGS, 0);
  342. regmap_update_bits(pcf85363->regmap, CTRL_PIN_IO,
  343. PIN_IO_INTA_OUT, PIN_IO_INTAPM);
  344. ret = devm_request_threaded_irq(&client->dev, client->irq,
  345. NULL, pcf85363_rtc_handle_irq,
  346. IRQF_TRIGGER_LOW | IRQF_ONESHOT,
  347. "pcf85363", client);
  348. if (ret)
  349. dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
  350. else
  351. pcf85363->rtc->ops = &rtc_ops_alarm;
  352. }
  353. ret = rtc_register_device(pcf85363->rtc);
  354. for (i = 0; i < config->num_nvram; i++) {
  355. nvmem_cfg[i].priv = pcf85363;
  356. rtc_nvmem_register(pcf85363->rtc, &nvmem_cfg[i]);
  357. }
  358. return ret;
  359. }
  360. static const struct of_device_id dev_ids[] = {
  361. { .compatible = "nxp,pcf85263", .data = &pcf_85263_config },
  362. { .compatible = "nxp,pcf85363", .data = &pcf_85363_config },
  363. { /* sentinel */ }
  364. };
  365. MODULE_DEVICE_TABLE(of, dev_ids);
  366. static struct i2c_driver pcf85363_driver = {
  367. .driver = {
  368. .name = "pcf85363",
  369. .of_match_table = of_match_ptr(dev_ids),
  370. },
  371. .probe = pcf85363_probe,
  372. };
  373. module_i2c_driver(pcf85363_driver);
  374. MODULE_AUTHOR("Eric Nelson");
  375. MODULE_DESCRIPTION("pcf85263/pcf85363 I2C RTC driver");
  376. MODULE_LICENSE("GPL");