rtc-lpc24xx.c 8.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * RTC driver for NXP LPC178x/18xx/43xx Real-Time Clock (RTC)
  4. *
  5. * Copyright (C) 2011 NXP Semiconductors
  6. * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
  7. */
  8. #include <linux/clk.h>
  9. #include <linux/io.h>
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/rtc.h>
  16. /* LPC24xx RTC register offsets and bits */
  17. #define LPC24XX_ILR 0x00
  18. #define LPC24XX_RTCCIF BIT(0)
  19. #define LPC24XX_RTCALF BIT(1)
  20. #define LPC24XX_CTC 0x04
  21. #define LPC24XX_CCR 0x08
  22. #define LPC24XX_CLKEN BIT(0)
  23. #define LPC178X_CCALEN BIT(4)
  24. #define LPC24XX_CIIR 0x0c
  25. #define LPC24XX_AMR 0x10
  26. #define LPC24XX_ALARM_DISABLE 0xff
  27. #define LPC24XX_CTIME0 0x14
  28. #define LPC24XX_CTIME1 0x18
  29. #define LPC24XX_CTIME2 0x1c
  30. #define LPC24XX_SEC 0x20
  31. #define LPC24XX_MIN 0x24
  32. #define LPC24XX_HOUR 0x28
  33. #define LPC24XX_DOM 0x2c
  34. #define LPC24XX_DOW 0x30
  35. #define LPC24XX_DOY 0x34
  36. #define LPC24XX_MONTH 0x38
  37. #define LPC24XX_YEAR 0x3c
  38. #define LPC24XX_ALSEC 0x60
  39. #define LPC24XX_ALMIN 0x64
  40. #define LPC24XX_ALHOUR 0x68
  41. #define LPC24XX_ALDOM 0x6c
  42. #define LPC24XX_ALDOW 0x70
  43. #define LPC24XX_ALDOY 0x74
  44. #define LPC24XX_ALMON 0x78
  45. #define LPC24XX_ALYEAR 0x7c
  46. /* Macros to read fields in consolidated time (CT) registers */
  47. #define CT0_SECS(x) (((x) >> 0) & 0x3f)
  48. #define CT0_MINS(x) (((x) >> 8) & 0x3f)
  49. #define CT0_HOURS(x) (((x) >> 16) & 0x1f)
  50. #define CT0_DOW(x) (((x) >> 24) & 0x07)
  51. #define CT1_DOM(x) (((x) >> 0) & 0x1f)
  52. #define CT1_MONTH(x) (((x) >> 8) & 0x0f)
  53. #define CT1_YEAR(x) (((x) >> 16) & 0xfff)
  54. #define CT2_DOY(x) (((x) >> 0) & 0xfff)
  55. #define rtc_readl(dev, reg) readl((dev)->rtc_base + (reg))
  56. #define rtc_writel(dev, reg, val) writel((val), (dev)->rtc_base + (reg))
  57. struct lpc24xx_rtc {
  58. void __iomem *rtc_base;
  59. struct rtc_device *rtc;
  60. struct clk *clk_rtc;
  61. struct clk *clk_reg;
  62. };
  63. static int lpc24xx_rtc_set_time(struct device *dev, struct rtc_time *tm)
  64. {
  65. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  66. /* Disable RTC during update */
  67. rtc_writel(rtc, LPC24XX_CCR, LPC178X_CCALEN);
  68. rtc_writel(rtc, LPC24XX_SEC, tm->tm_sec);
  69. rtc_writel(rtc, LPC24XX_MIN, tm->tm_min);
  70. rtc_writel(rtc, LPC24XX_HOUR, tm->tm_hour);
  71. rtc_writel(rtc, LPC24XX_DOW, tm->tm_wday);
  72. rtc_writel(rtc, LPC24XX_DOM, tm->tm_mday);
  73. rtc_writel(rtc, LPC24XX_DOY, tm->tm_yday);
  74. rtc_writel(rtc, LPC24XX_MONTH, tm->tm_mon);
  75. rtc_writel(rtc, LPC24XX_YEAR, tm->tm_year);
  76. rtc_writel(rtc, LPC24XX_CCR, LPC24XX_CLKEN | LPC178X_CCALEN);
  77. return 0;
  78. }
  79. static int lpc24xx_rtc_read_time(struct device *dev, struct rtc_time *tm)
  80. {
  81. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  82. u32 ct0, ct1, ct2;
  83. ct0 = rtc_readl(rtc, LPC24XX_CTIME0);
  84. ct1 = rtc_readl(rtc, LPC24XX_CTIME1);
  85. ct2 = rtc_readl(rtc, LPC24XX_CTIME2);
  86. tm->tm_sec = CT0_SECS(ct0);
  87. tm->tm_min = CT0_MINS(ct0);
  88. tm->tm_hour = CT0_HOURS(ct0);
  89. tm->tm_wday = CT0_DOW(ct0);
  90. tm->tm_mon = CT1_MONTH(ct1);
  91. tm->tm_mday = CT1_DOM(ct1);
  92. tm->tm_year = CT1_YEAR(ct1);
  93. tm->tm_yday = CT2_DOY(ct2);
  94. return 0;
  95. }
  96. static int lpc24xx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  97. {
  98. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  99. struct rtc_time *tm = &wkalrm->time;
  100. tm->tm_sec = rtc_readl(rtc, LPC24XX_ALSEC);
  101. tm->tm_min = rtc_readl(rtc, LPC24XX_ALMIN);
  102. tm->tm_hour = rtc_readl(rtc, LPC24XX_ALHOUR);
  103. tm->tm_mday = rtc_readl(rtc, LPC24XX_ALDOM);
  104. tm->tm_wday = rtc_readl(rtc, LPC24XX_ALDOW);
  105. tm->tm_yday = rtc_readl(rtc, LPC24XX_ALDOY);
  106. tm->tm_mon = rtc_readl(rtc, LPC24XX_ALMON);
  107. tm->tm_year = rtc_readl(rtc, LPC24XX_ALYEAR);
  108. wkalrm->enabled = rtc_readl(rtc, LPC24XX_AMR) == 0;
  109. wkalrm->pending = !!(rtc_readl(rtc, LPC24XX_ILR) & LPC24XX_RTCCIF);
  110. return rtc_valid_tm(&wkalrm->time);
  111. }
  112. static int lpc24xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  113. {
  114. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  115. struct rtc_time *tm = &wkalrm->time;
  116. /* Disable alarm irq during update */
  117. rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
  118. rtc_writel(rtc, LPC24XX_ALSEC, tm->tm_sec);
  119. rtc_writel(rtc, LPC24XX_ALMIN, tm->tm_min);
  120. rtc_writel(rtc, LPC24XX_ALHOUR, tm->tm_hour);
  121. rtc_writel(rtc, LPC24XX_ALDOM, tm->tm_mday);
  122. rtc_writel(rtc, LPC24XX_ALDOW, tm->tm_wday);
  123. rtc_writel(rtc, LPC24XX_ALDOY, tm->tm_yday);
  124. rtc_writel(rtc, LPC24XX_ALMON, tm->tm_mon);
  125. rtc_writel(rtc, LPC24XX_ALYEAR, tm->tm_year);
  126. if (wkalrm->enabled)
  127. rtc_writel(rtc, LPC24XX_AMR, 0);
  128. return 0;
  129. }
  130. static int lpc24xx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
  131. {
  132. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  133. if (enable)
  134. rtc_writel(rtc, LPC24XX_AMR, 0);
  135. else
  136. rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
  137. return 0;
  138. }
  139. static irqreturn_t lpc24xx_rtc_interrupt(int irq, void *data)
  140. {
  141. unsigned long events = RTC_IRQF;
  142. struct lpc24xx_rtc *rtc = data;
  143. u32 rtc_iir;
  144. /* Check interrupt cause */
  145. rtc_iir = rtc_readl(rtc, LPC24XX_ILR);
  146. if (rtc_iir & LPC24XX_RTCALF) {
  147. events |= RTC_AF;
  148. rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
  149. }
  150. /* Clear interrupt status and report event */
  151. rtc_writel(rtc, LPC24XX_ILR, rtc_iir);
  152. rtc_update_irq(rtc->rtc, 1, events);
  153. return IRQ_HANDLED;
  154. }
  155. static const struct rtc_class_ops lpc24xx_rtc_ops = {
  156. .read_time = lpc24xx_rtc_read_time,
  157. .set_time = lpc24xx_rtc_set_time,
  158. .read_alarm = lpc24xx_rtc_read_alarm,
  159. .set_alarm = lpc24xx_rtc_set_alarm,
  160. .alarm_irq_enable = lpc24xx_rtc_alarm_irq_enable,
  161. };
  162. static int lpc24xx_rtc_probe(struct platform_device *pdev)
  163. {
  164. struct lpc24xx_rtc *rtc;
  165. int irq, ret;
  166. rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
  167. if (!rtc)
  168. return -ENOMEM;
  169. rtc->rtc_base = devm_platform_ioremap_resource(pdev, 0);
  170. if (IS_ERR(rtc->rtc_base))
  171. return PTR_ERR(rtc->rtc_base);
  172. irq = platform_get_irq(pdev, 0);
  173. if (irq < 0)
  174. return irq;
  175. rtc->clk_rtc = devm_clk_get(&pdev->dev, "rtc");
  176. if (IS_ERR(rtc->clk_rtc)) {
  177. dev_err(&pdev->dev, "error getting rtc clock\n");
  178. return PTR_ERR(rtc->clk_rtc);
  179. }
  180. rtc->clk_reg = devm_clk_get(&pdev->dev, "reg");
  181. if (IS_ERR(rtc->clk_reg)) {
  182. dev_err(&pdev->dev, "error getting reg clock\n");
  183. return PTR_ERR(rtc->clk_reg);
  184. }
  185. ret = clk_prepare_enable(rtc->clk_rtc);
  186. if (ret) {
  187. dev_err(&pdev->dev, "unable to enable rtc clock\n");
  188. return ret;
  189. }
  190. ret = clk_prepare_enable(rtc->clk_reg);
  191. if (ret) {
  192. dev_err(&pdev->dev, "unable to enable reg clock\n");
  193. goto disable_rtc_clk;
  194. }
  195. platform_set_drvdata(pdev, rtc);
  196. /* Clear any pending interrupts */
  197. rtc_writel(rtc, LPC24XX_ILR, LPC24XX_RTCCIF | LPC24XX_RTCALF);
  198. /* Enable RTC count */
  199. rtc_writel(rtc, LPC24XX_CCR, LPC24XX_CLKEN | LPC178X_CCALEN);
  200. ret = devm_request_irq(&pdev->dev, irq, lpc24xx_rtc_interrupt, 0,
  201. pdev->name, rtc);
  202. if (ret < 0) {
  203. dev_warn(&pdev->dev, "can't request interrupt\n");
  204. goto disable_clks;
  205. }
  206. rtc->rtc = devm_rtc_device_register(&pdev->dev, "lpc24xx-rtc",
  207. &lpc24xx_rtc_ops, THIS_MODULE);
  208. if (IS_ERR(rtc->rtc)) {
  209. dev_err(&pdev->dev, "can't register rtc device\n");
  210. ret = PTR_ERR(rtc->rtc);
  211. goto disable_clks;
  212. }
  213. return 0;
  214. disable_clks:
  215. clk_disable_unprepare(rtc->clk_reg);
  216. disable_rtc_clk:
  217. clk_disable_unprepare(rtc->clk_rtc);
  218. return ret;
  219. }
  220. static int lpc24xx_rtc_remove(struct platform_device *pdev)
  221. {
  222. struct lpc24xx_rtc *rtc = platform_get_drvdata(pdev);
  223. /* Ensure all interrupt sources are masked */
  224. rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
  225. rtc_writel(rtc, LPC24XX_CIIR, 0);
  226. rtc_writel(rtc, LPC24XX_CCR, LPC178X_CCALEN);
  227. clk_disable_unprepare(rtc->clk_rtc);
  228. clk_disable_unprepare(rtc->clk_reg);
  229. return 0;
  230. }
  231. static const struct of_device_id lpc24xx_rtc_match[] = {
  232. { .compatible = "nxp,lpc1788-rtc" },
  233. { }
  234. };
  235. MODULE_DEVICE_TABLE(of, lpc24xx_rtc_match);
  236. static struct platform_driver lpc24xx_rtc_driver = {
  237. .probe = lpc24xx_rtc_probe,
  238. .remove = lpc24xx_rtc_remove,
  239. .driver = {
  240. .name = "lpc24xx-rtc",
  241. .of_match_table = lpc24xx_rtc_match,
  242. },
  243. };
  244. module_platform_driver(lpc24xx_rtc_driver);
  245. MODULE_AUTHOR("Kevin Wells <wellsk40@gmail.com>");
  246. MODULE_DESCRIPTION("RTC driver for the LPC178x/18xx/408x/43xx SoCs");
  247. MODULE_LICENSE("GPL");