rtc-isl12026.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * An I2C driver for the Intersil ISL 12026
  4. *
  5. * Copyright (c) 2018 Cavium, Inc.
  6. */
  7. #include <linux/bcd.h>
  8. #include <linux/delay.h>
  9. #include <linux/i2c.h>
  10. #include <linux/module.h>
  11. #include <linux/mutex.h>
  12. #include <linux/nvmem-provider.h>
  13. #include <linux/of.h>
  14. #include <linux/of_device.h>
  15. #include <linux/rtc.h>
  16. #include <linux/slab.h>
  17. /* register offsets */
  18. #define ISL12026_REG_PWR 0x14
  19. # define ISL12026_REG_PWR_BSW BIT(6)
  20. # define ISL12026_REG_PWR_SBIB BIT(7)
  21. #define ISL12026_REG_SC 0x30
  22. #define ISL12026_REG_HR 0x32
  23. # define ISL12026_REG_HR_MIL BIT(7) /* military or 24 hour time */
  24. #define ISL12026_REG_SR 0x3f
  25. # define ISL12026_REG_SR_RTCF BIT(0)
  26. # define ISL12026_REG_SR_WEL BIT(1)
  27. # define ISL12026_REG_SR_RWEL BIT(2)
  28. # define ISL12026_REG_SR_MBZ BIT(3)
  29. # define ISL12026_REG_SR_OSCF BIT(4)
  30. /* The EEPROM array responds at i2c address 0x57 */
  31. #define ISL12026_EEPROM_ADDR 0x57
  32. #define ISL12026_PAGESIZE 16
  33. #define ISL12026_NVMEM_WRITE_TIME 20
  34. struct isl12026 {
  35. struct rtc_device *rtc;
  36. struct i2c_client *nvm_client;
  37. };
  38. static int isl12026_read_reg(struct i2c_client *client, int reg)
  39. {
  40. u8 addr[] = {0, reg};
  41. u8 val;
  42. int ret;
  43. struct i2c_msg msgs[] = {
  44. {
  45. .addr = client->addr,
  46. .flags = 0,
  47. .len = sizeof(addr),
  48. .buf = addr
  49. }, {
  50. .addr = client->addr,
  51. .flags = I2C_M_RD,
  52. .len = 1,
  53. .buf = &val
  54. }
  55. };
  56. ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
  57. if (ret != ARRAY_SIZE(msgs)) {
  58. dev_err(&client->dev, "read reg error, ret=%d\n", ret);
  59. ret = ret < 0 ? ret : -EIO;
  60. } else {
  61. ret = val;
  62. }
  63. return ret;
  64. }
  65. static int isl12026_arm_write(struct i2c_client *client)
  66. {
  67. int ret;
  68. u8 op[3];
  69. struct i2c_msg msg = {
  70. .addr = client->addr,
  71. .flags = 0,
  72. .len = 1,
  73. .buf = op
  74. };
  75. /* Set SR.WEL */
  76. op[0] = 0;
  77. op[1] = ISL12026_REG_SR;
  78. op[2] = ISL12026_REG_SR_WEL;
  79. msg.len = 3;
  80. ret = i2c_transfer(client->adapter, &msg, 1);
  81. if (ret != 1) {
  82. dev_err(&client->dev, "write error SR.WEL, ret=%d\n", ret);
  83. ret = ret < 0 ? ret : -EIO;
  84. goto out;
  85. }
  86. /* Set SR.WEL and SR.RWEL */
  87. op[2] = ISL12026_REG_SR_WEL | ISL12026_REG_SR_RWEL;
  88. msg.len = 3;
  89. ret = i2c_transfer(client->adapter, &msg, 1);
  90. if (ret != 1) {
  91. dev_err(&client->dev,
  92. "write error SR.WEL|SR.RWEL, ret=%d\n", ret);
  93. ret = ret < 0 ? ret : -EIO;
  94. goto out;
  95. } else {
  96. ret = 0;
  97. }
  98. out:
  99. return ret;
  100. }
  101. static int isl12026_disarm_write(struct i2c_client *client)
  102. {
  103. int ret;
  104. u8 op[3] = {0, ISL12026_REG_SR, 0};
  105. struct i2c_msg msg = {
  106. .addr = client->addr,
  107. .flags = 0,
  108. .len = sizeof(op),
  109. .buf = op
  110. };
  111. ret = i2c_transfer(client->adapter, &msg, 1);
  112. if (ret != 1) {
  113. dev_err(&client->dev,
  114. "write error SR, ret=%d\n", ret);
  115. ret = ret < 0 ? ret : -EIO;
  116. } else {
  117. ret = 0;
  118. }
  119. return ret;
  120. }
  121. static int isl12026_write_reg(struct i2c_client *client, int reg, u8 val)
  122. {
  123. int ret;
  124. u8 op[3] = {0, reg, val};
  125. struct i2c_msg msg = {
  126. .addr = client->addr,
  127. .flags = 0,
  128. .len = sizeof(op),
  129. .buf = op
  130. };
  131. ret = isl12026_arm_write(client);
  132. if (ret)
  133. return ret;
  134. ret = i2c_transfer(client->adapter, &msg, 1);
  135. if (ret != 1) {
  136. dev_err(&client->dev, "write error CCR, ret=%d\n", ret);
  137. ret = ret < 0 ? ret : -EIO;
  138. goto out;
  139. }
  140. msleep(ISL12026_NVMEM_WRITE_TIME);
  141. ret = isl12026_disarm_write(client);
  142. out:
  143. return ret;
  144. }
  145. static int isl12026_rtc_set_time(struct device *dev, struct rtc_time *tm)
  146. {
  147. struct i2c_client *client = to_i2c_client(dev);
  148. int ret;
  149. u8 op[10];
  150. struct i2c_msg msg = {
  151. .addr = client->addr,
  152. .flags = 0,
  153. .len = sizeof(op),
  154. .buf = op
  155. };
  156. ret = isl12026_arm_write(client);
  157. if (ret)
  158. return ret;
  159. /* Set the CCR registers */
  160. op[0] = 0;
  161. op[1] = ISL12026_REG_SC;
  162. op[2] = bin2bcd(tm->tm_sec); /* SC */
  163. op[3] = bin2bcd(tm->tm_min); /* MN */
  164. op[4] = bin2bcd(tm->tm_hour) | ISL12026_REG_HR_MIL; /* HR */
  165. op[5] = bin2bcd(tm->tm_mday); /* DT */
  166. op[6] = bin2bcd(tm->tm_mon + 1); /* MO */
  167. op[7] = bin2bcd(tm->tm_year % 100); /* YR */
  168. op[8] = bin2bcd(tm->tm_wday & 7); /* DW */
  169. op[9] = bin2bcd(tm->tm_year >= 100 ? 20 : 19); /* Y2K */
  170. ret = i2c_transfer(client->adapter, &msg, 1);
  171. if (ret != 1) {
  172. dev_err(&client->dev, "write error CCR, ret=%d\n", ret);
  173. ret = ret < 0 ? ret : -EIO;
  174. goto out;
  175. }
  176. ret = isl12026_disarm_write(client);
  177. out:
  178. return ret;
  179. }
  180. static int isl12026_rtc_read_time(struct device *dev, struct rtc_time *tm)
  181. {
  182. struct i2c_client *client = to_i2c_client(dev);
  183. u8 ccr[8];
  184. u8 addr[2];
  185. u8 sr;
  186. int ret;
  187. struct i2c_msg msgs[] = {
  188. {
  189. .addr = client->addr,
  190. .flags = 0,
  191. .len = sizeof(addr),
  192. .buf = addr
  193. }, {
  194. .addr = client->addr,
  195. .flags = I2C_M_RD,
  196. }
  197. };
  198. /* First, read SR */
  199. addr[0] = 0;
  200. addr[1] = ISL12026_REG_SR;
  201. msgs[1].len = 1;
  202. msgs[1].buf = &sr;
  203. ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
  204. if (ret != ARRAY_SIZE(msgs)) {
  205. dev_err(&client->dev, "read error, ret=%d\n", ret);
  206. ret = ret < 0 ? ret : -EIO;
  207. goto out;
  208. }
  209. if (sr & ISL12026_REG_SR_RTCF)
  210. dev_warn(&client->dev, "Real-Time Clock Failure on read\n");
  211. if (sr & ISL12026_REG_SR_OSCF)
  212. dev_warn(&client->dev, "Oscillator Failure on read\n");
  213. /* Second, CCR regs */
  214. addr[0] = 0;
  215. addr[1] = ISL12026_REG_SC;
  216. msgs[1].len = sizeof(ccr);
  217. msgs[1].buf = ccr;
  218. ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
  219. if (ret != ARRAY_SIZE(msgs)) {
  220. dev_err(&client->dev, "read error, ret=%d\n", ret);
  221. ret = ret < 0 ? ret : -EIO;
  222. goto out;
  223. }
  224. tm->tm_sec = bcd2bin(ccr[0] & 0x7F);
  225. tm->tm_min = bcd2bin(ccr[1] & 0x7F);
  226. if (ccr[2] & ISL12026_REG_HR_MIL)
  227. tm->tm_hour = bcd2bin(ccr[2] & 0x3F);
  228. else
  229. tm->tm_hour = bcd2bin(ccr[2] & 0x1F) +
  230. ((ccr[2] & 0x20) ? 12 : 0);
  231. tm->tm_mday = bcd2bin(ccr[3] & 0x3F);
  232. tm->tm_mon = bcd2bin(ccr[4] & 0x1F) - 1;
  233. tm->tm_year = bcd2bin(ccr[5]);
  234. if (bcd2bin(ccr[7]) == 20)
  235. tm->tm_year += 100;
  236. tm->tm_wday = ccr[6] & 0x07;
  237. ret = 0;
  238. out:
  239. return ret;
  240. }
  241. static const struct rtc_class_ops isl12026_rtc_ops = {
  242. .read_time = isl12026_rtc_read_time,
  243. .set_time = isl12026_rtc_set_time,
  244. };
  245. static int isl12026_nvm_read(void *p, unsigned int offset,
  246. void *val, size_t bytes)
  247. {
  248. struct isl12026 *priv = p;
  249. int ret;
  250. u8 addr[2];
  251. struct i2c_msg msgs[] = {
  252. {
  253. .addr = priv->nvm_client->addr,
  254. .flags = 0,
  255. .len = sizeof(addr),
  256. .buf = addr
  257. }, {
  258. .addr = priv->nvm_client->addr,
  259. .flags = I2C_M_RD,
  260. .buf = val
  261. }
  262. };
  263. /*
  264. * offset and bytes checked and limited by nvmem core, so
  265. * proceed without further checks.
  266. */
  267. ret = mutex_lock_interruptible(&priv->rtc->ops_lock);
  268. if (ret)
  269. return ret;
  270. /* 2 bytes of address, most significant first */
  271. addr[0] = offset >> 8;
  272. addr[1] = offset;
  273. msgs[1].len = bytes;
  274. ret = i2c_transfer(priv->nvm_client->adapter, msgs, ARRAY_SIZE(msgs));
  275. mutex_unlock(&priv->rtc->ops_lock);
  276. if (ret != ARRAY_SIZE(msgs)) {
  277. dev_err(&priv->nvm_client->dev,
  278. "nvmem read error, ret=%d\n", ret);
  279. return ret < 0 ? ret : -EIO;
  280. }
  281. return 0;
  282. }
  283. static int isl12026_nvm_write(void *p, unsigned int offset,
  284. void *val, size_t bytes)
  285. {
  286. struct isl12026 *priv = p;
  287. int ret;
  288. u8 *v = val;
  289. size_t chunk_size, num_written;
  290. u8 payload[ISL12026_PAGESIZE + 2]; /* page + 2 address bytes */
  291. struct i2c_msg msgs[] = {
  292. {
  293. .addr = priv->nvm_client->addr,
  294. .flags = 0,
  295. .buf = payload
  296. }
  297. };
  298. /*
  299. * offset and bytes checked and limited by nvmem core, so
  300. * proceed without further checks.
  301. */
  302. ret = mutex_lock_interruptible(&priv->rtc->ops_lock);
  303. if (ret)
  304. return ret;
  305. num_written = 0;
  306. while (bytes) {
  307. chunk_size = round_down(offset, ISL12026_PAGESIZE) +
  308. ISL12026_PAGESIZE - offset;
  309. chunk_size = min(bytes, chunk_size);
  310. /*
  311. * 2 bytes of address, most significant first, followed
  312. * by page data bytes
  313. */
  314. memcpy(payload + 2, v + num_written, chunk_size);
  315. payload[0] = offset >> 8;
  316. payload[1] = offset;
  317. msgs[0].len = chunk_size + 2;
  318. ret = i2c_transfer(priv->nvm_client->adapter,
  319. msgs, ARRAY_SIZE(msgs));
  320. if (ret != ARRAY_SIZE(msgs)) {
  321. dev_err(&priv->nvm_client->dev,
  322. "nvmem write error, ret=%d\n", ret);
  323. ret = ret < 0 ? ret : -EIO;
  324. break;
  325. }
  326. ret = 0;
  327. bytes -= chunk_size;
  328. offset += chunk_size;
  329. num_written += chunk_size;
  330. msleep(ISL12026_NVMEM_WRITE_TIME);
  331. }
  332. mutex_unlock(&priv->rtc->ops_lock);
  333. return ret;
  334. }
  335. static void isl12026_force_power_modes(struct i2c_client *client)
  336. {
  337. int ret;
  338. int pwr, requested_pwr;
  339. u32 bsw_val, sbib_val;
  340. bool set_bsw, set_sbib;
  341. /*
  342. * If we can read the of_property, set the specified value.
  343. * If there is an error reading the of_property (likely
  344. * because it does not exist), keep the current value.
  345. */
  346. ret = of_property_read_u32(client->dev.of_node,
  347. "isil,pwr-bsw", &bsw_val);
  348. set_bsw = (ret == 0);
  349. ret = of_property_read_u32(client->dev.of_node,
  350. "isil,pwr-sbib", &sbib_val);
  351. set_sbib = (ret == 0);
  352. /* Check if PWR.BSW and/or PWR.SBIB need specified values */
  353. if (!set_bsw && !set_sbib)
  354. return;
  355. pwr = isl12026_read_reg(client, ISL12026_REG_PWR);
  356. if (pwr < 0) {
  357. dev_warn(&client->dev, "Error: Failed to read PWR %d\n", pwr);
  358. return;
  359. }
  360. requested_pwr = pwr;
  361. if (set_bsw) {
  362. if (bsw_val)
  363. requested_pwr |= ISL12026_REG_PWR_BSW;
  364. else
  365. requested_pwr &= ~ISL12026_REG_PWR_BSW;
  366. } /* else keep current BSW */
  367. if (set_sbib) {
  368. if (sbib_val)
  369. requested_pwr |= ISL12026_REG_PWR_SBIB;
  370. else
  371. requested_pwr &= ~ISL12026_REG_PWR_SBIB;
  372. } /* else keep current SBIB */
  373. if (pwr >= 0 && pwr != requested_pwr) {
  374. dev_dbg(&client->dev, "PWR: %02x\n", pwr);
  375. dev_dbg(&client->dev, "Updating PWR to: %02x\n", requested_pwr);
  376. isl12026_write_reg(client, ISL12026_REG_PWR, requested_pwr);
  377. }
  378. }
  379. static int isl12026_probe_new(struct i2c_client *client)
  380. {
  381. struct isl12026 *priv;
  382. int ret;
  383. struct nvmem_config nvm_cfg = {
  384. .name = "isl12026-",
  385. .base_dev = &client->dev,
  386. .stride = 1,
  387. .word_size = 1,
  388. .size = 512,
  389. .reg_read = isl12026_nvm_read,
  390. .reg_write = isl12026_nvm_write,
  391. };
  392. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  393. return -ENODEV;
  394. priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
  395. if (!priv)
  396. return -ENOMEM;
  397. i2c_set_clientdata(client, priv);
  398. isl12026_force_power_modes(client);
  399. priv->nvm_client = i2c_new_dummy_device(client->adapter, ISL12026_EEPROM_ADDR);
  400. if (IS_ERR(priv->nvm_client))
  401. return PTR_ERR(priv->nvm_client);
  402. priv->rtc = devm_rtc_allocate_device(&client->dev);
  403. ret = PTR_ERR_OR_ZERO(priv->rtc);
  404. if (ret)
  405. return ret;
  406. priv->rtc->ops = &isl12026_rtc_ops;
  407. nvm_cfg.priv = priv;
  408. ret = rtc_nvmem_register(priv->rtc, &nvm_cfg);
  409. if (ret)
  410. return ret;
  411. return rtc_register_device(priv->rtc);
  412. }
  413. static int isl12026_remove(struct i2c_client *client)
  414. {
  415. struct isl12026 *priv = i2c_get_clientdata(client);
  416. i2c_unregister_device(priv->nvm_client);
  417. return 0;
  418. }
  419. static const struct of_device_id isl12026_dt_match[] = {
  420. { .compatible = "isil,isl12026" },
  421. { }
  422. };
  423. MODULE_DEVICE_TABLE(of, isl12026_dt_match);
  424. static struct i2c_driver isl12026_driver = {
  425. .driver = {
  426. .name = "rtc-isl12026",
  427. .of_match_table = isl12026_dt_match,
  428. },
  429. .probe_new = isl12026_probe_new,
  430. .remove = isl12026_remove,
  431. };
  432. module_i2c_driver(isl12026_driver);
  433. MODULE_DESCRIPTION("ISL 12026 RTC driver");
  434. MODULE_LICENSE("GPL");