rtc-ds2404.c 5.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (C) 2012 Sven Schnelle <svens@stackframe.org>
  3. #include <linux/platform_device.h>
  4. #include <linux/module.h>
  5. #include <linux/init.h>
  6. #include <linux/rtc.h>
  7. #include <linux/types.h>
  8. #include <linux/bcd.h>
  9. #include <linux/platform_data/rtc-ds2404.h>
  10. #include <linux/delay.h>
  11. #include <linux/gpio.h>
  12. #include <linux/slab.h>
  13. #include <linux/io.h>
  14. #define DS2404_STATUS_REG 0x200
  15. #define DS2404_CONTROL_REG 0x201
  16. #define DS2404_RTC_REG 0x202
  17. #define DS2404_WRITE_SCRATCHPAD_CMD 0x0f
  18. #define DS2404_READ_SCRATCHPAD_CMD 0xaa
  19. #define DS2404_COPY_SCRATCHPAD_CMD 0x55
  20. #define DS2404_READ_MEMORY_CMD 0xf0
  21. #define DS2404_RST 0
  22. #define DS2404_CLK 1
  23. #define DS2404_DQ 2
  24. struct ds2404_gpio {
  25. const char *name;
  26. unsigned int gpio;
  27. };
  28. struct ds2404 {
  29. struct ds2404_gpio *gpio;
  30. struct rtc_device *rtc;
  31. };
  32. static struct ds2404_gpio ds2404_gpio[] = {
  33. { "RTC RST", 0 },
  34. { "RTC CLK", 0 },
  35. { "RTC DQ", 0 },
  36. };
  37. static int ds2404_gpio_map(struct ds2404 *chip, struct platform_device *pdev,
  38. struct ds2404_platform_data *pdata)
  39. {
  40. int i, err;
  41. ds2404_gpio[DS2404_RST].gpio = pdata->gpio_rst;
  42. ds2404_gpio[DS2404_CLK].gpio = pdata->gpio_clk;
  43. ds2404_gpio[DS2404_DQ].gpio = pdata->gpio_dq;
  44. for (i = 0; i < ARRAY_SIZE(ds2404_gpio); i++) {
  45. err = gpio_request(ds2404_gpio[i].gpio, ds2404_gpio[i].name);
  46. if (err) {
  47. dev_err(&pdev->dev, "error mapping gpio %s: %d\n",
  48. ds2404_gpio[i].name, err);
  49. goto err_request;
  50. }
  51. if (i != DS2404_DQ)
  52. gpio_direction_output(ds2404_gpio[i].gpio, 1);
  53. }
  54. chip->gpio = ds2404_gpio;
  55. return 0;
  56. err_request:
  57. while (--i >= 0)
  58. gpio_free(ds2404_gpio[i].gpio);
  59. return err;
  60. }
  61. static void ds2404_gpio_unmap(void *data)
  62. {
  63. int i;
  64. for (i = 0; i < ARRAY_SIZE(ds2404_gpio); i++)
  65. gpio_free(ds2404_gpio[i].gpio);
  66. }
  67. static void ds2404_reset(struct device *dev)
  68. {
  69. gpio_set_value(ds2404_gpio[DS2404_RST].gpio, 0);
  70. udelay(1000);
  71. gpio_set_value(ds2404_gpio[DS2404_RST].gpio, 1);
  72. gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
  73. gpio_direction_output(ds2404_gpio[DS2404_DQ].gpio, 0);
  74. udelay(10);
  75. }
  76. static void ds2404_write_byte(struct device *dev, u8 byte)
  77. {
  78. int i;
  79. gpio_direction_output(ds2404_gpio[DS2404_DQ].gpio, 1);
  80. for (i = 0; i < 8; i++) {
  81. gpio_set_value(ds2404_gpio[DS2404_DQ].gpio, byte & (1 << i));
  82. udelay(10);
  83. gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 1);
  84. udelay(10);
  85. gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
  86. udelay(10);
  87. }
  88. }
  89. static u8 ds2404_read_byte(struct device *dev)
  90. {
  91. int i;
  92. u8 ret = 0;
  93. gpio_direction_input(ds2404_gpio[DS2404_DQ].gpio);
  94. for (i = 0; i < 8; i++) {
  95. gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
  96. udelay(10);
  97. if (gpio_get_value(ds2404_gpio[DS2404_DQ].gpio))
  98. ret |= 1 << i;
  99. gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 1);
  100. udelay(10);
  101. }
  102. return ret;
  103. }
  104. static void ds2404_read_memory(struct device *dev, u16 offset,
  105. int length, u8 *out)
  106. {
  107. ds2404_reset(dev);
  108. ds2404_write_byte(dev, DS2404_READ_MEMORY_CMD);
  109. ds2404_write_byte(dev, offset & 0xff);
  110. ds2404_write_byte(dev, (offset >> 8) & 0xff);
  111. while (length--)
  112. *out++ = ds2404_read_byte(dev);
  113. }
  114. static void ds2404_write_memory(struct device *dev, u16 offset,
  115. int length, u8 *out)
  116. {
  117. int i;
  118. u8 ta01, ta02, es;
  119. ds2404_reset(dev);
  120. ds2404_write_byte(dev, DS2404_WRITE_SCRATCHPAD_CMD);
  121. ds2404_write_byte(dev, offset & 0xff);
  122. ds2404_write_byte(dev, (offset >> 8) & 0xff);
  123. for (i = 0; i < length; i++)
  124. ds2404_write_byte(dev, out[i]);
  125. ds2404_reset(dev);
  126. ds2404_write_byte(dev, DS2404_READ_SCRATCHPAD_CMD);
  127. ta01 = ds2404_read_byte(dev);
  128. ta02 = ds2404_read_byte(dev);
  129. es = ds2404_read_byte(dev);
  130. for (i = 0; i < length; i++) {
  131. if (out[i] != ds2404_read_byte(dev)) {
  132. dev_err(dev, "read invalid data\n");
  133. return;
  134. }
  135. }
  136. ds2404_reset(dev);
  137. ds2404_write_byte(dev, DS2404_COPY_SCRATCHPAD_CMD);
  138. ds2404_write_byte(dev, ta01);
  139. ds2404_write_byte(dev, ta02);
  140. ds2404_write_byte(dev, es);
  141. gpio_direction_input(ds2404_gpio[DS2404_DQ].gpio);
  142. while (gpio_get_value(ds2404_gpio[DS2404_DQ].gpio))
  143. ;
  144. }
  145. static void ds2404_enable_osc(struct device *dev)
  146. {
  147. u8 in[1] = { 0x10 }; /* enable oscillator */
  148. ds2404_write_memory(dev, 0x201, 1, in);
  149. }
  150. static int ds2404_read_time(struct device *dev, struct rtc_time *dt)
  151. {
  152. unsigned long time = 0;
  153. __le32 hw_time = 0;
  154. ds2404_read_memory(dev, 0x203, 4, (u8 *)&hw_time);
  155. time = le32_to_cpu(hw_time);
  156. rtc_time64_to_tm(time, dt);
  157. return 0;
  158. }
  159. static int ds2404_set_time(struct device *dev, struct rtc_time *dt)
  160. {
  161. u32 time = cpu_to_le32(rtc_tm_to_time64(dt));
  162. ds2404_write_memory(dev, 0x203, 4, (u8 *)&time);
  163. return 0;
  164. }
  165. static const struct rtc_class_ops ds2404_rtc_ops = {
  166. .read_time = ds2404_read_time,
  167. .set_time = ds2404_set_time,
  168. };
  169. static int rtc_probe(struct platform_device *pdev)
  170. {
  171. struct ds2404_platform_data *pdata = dev_get_platdata(&pdev->dev);
  172. struct ds2404 *chip;
  173. int retval = -EBUSY;
  174. chip = devm_kzalloc(&pdev->dev, sizeof(struct ds2404), GFP_KERNEL);
  175. if (!chip)
  176. return -ENOMEM;
  177. chip->rtc = devm_rtc_allocate_device(&pdev->dev);
  178. if (IS_ERR(chip->rtc))
  179. return PTR_ERR(chip->rtc);
  180. retval = ds2404_gpio_map(chip, pdev, pdata);
  181. if (retval)
  182. return retval;
  183. retval = devm_add_action_or_reset(&pdev->dev, ds2404_gpio_unmap, chip);
  184. if (retval)
  185. return retval;
  186. dev_info(&pdev->dev, "using GPIOs RST:%d, CLK:%d, DQ:%d\n",
  187. chip->gpio[DS2404_RST].gpio, chip->gpio[DS2404_CLK].gpio,
  188. chip->gpio[DS2404_DQ].gpio);
  189. platform_set_drvdata(pdev, chip);
  190. chip->rtc->ops = &ds2404_rtc_ops;
  191. chip->rtc->range_max = U32_MAX;
  192. retval = rtc_register_device(chip->rtc);
  193. if (retval)
  194. return retval;
  195. ds2404_enable_osc(&pdev->dev);
  196. return 0;
  197. }
  198. static struct platform_driver rtc_device_driver = {
  199. .probe = rtc_probe,
  200. .driver = {
  201. .name = "ds2404",
  202. },
  203. };
  204. module_platform_driver(rtc_device_driver);
  205. MODULE_DESCRIPTION("DS2404 RTC");
  206. MODULE_AUTHOR("Sven Schnelle");
  207. MODULE_LICENSE("GPL");
  208. MODULE_ALIAS("platform:ds2404");