rtc-cpcap.c 8.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Motorola CPCAP PMIC RTC driver
  4. *
  5. * Based on cpcap-regulator.c from Motorola Linux kernel tree
  6. * Copyright (C) 2009 Motorola, Inc.
  7. *
  8. * Rewritten for mainline kernel
  9. * - use DT
  10. * - use regmap
  11. * - use standard interrupt framework
  12. * - use managed device resources
  13. * - remove custom "secure clock daemon" helpers
  14. *
  15. * Copyright (C) 2017 Sebastian Reichel <sre@kernel.org>
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/module.h>
  19. #include <linux/mod_devicetable.h>
  20. #include <linux/init.h>
  21. #include <linux/device.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/rtc.h>
  24. #include <linux/err.h>
  25. #include <linux/regmap.h>
  26. #include <linux/mfd/motorola-cpcap.h>
  27. #include <linux/slab.h>
  28. #include <linux/sched.h>
  29. #define SECS_PER_DAY 86400
  30. #define DAY_MASK 0x7FFF
  31. #define TOD1_MASK 0x00FF
  32. #define TOD2_MASK 0x01FF
  33. struct cpcap_time {
  34. int day;
  35. int tod1;
  36. int tod2;
  37. };
  38. struct cpcap_rtc {
  39. struct regmap *regmap;
  40. struct rtc_device *rtc_dev;
  41. u16 vendor;
  42. int alarm_irq;
  43. bool alarm_enabled;
  44. int update_irq;
  45. bool update_enabled;
  46. };
  47. static void cpcap2rtc_time(struct rtc_time *rtc, struct cpcap_time *cpcap)
  48. {
  49. unsigned long int tod;
  50. unsigned long int time;
  51. tod = (cpcap->tod1 & TOD1_MASK) | ((cpcap->tod2 & TOD2_MASK) << 8);
  52. time = tod + ((cpcap->day & DAY_MASK) * SECS_PER_DAY);
  53. rtc_time64_to_tm(time, rtc);
  54. }
  55. static void rtc2cpcap_time(struct cpcap_time *cpcap, struct rtc_time *rtc)
  56. {
  57. unsigned long time;
  58. time = rtc_tm_to_time64(rtc);
  59. cpcap->day = time / SECS_PER_DAY;
  60. time %= SECS_PER_DAY;
  61. cpcap->tod2 = (time >> 8) & TOD2_MASK;
  62. cpcap->tod1 = time & TOD1_MASK;
  63. }
  64. static int cpcap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  65. {
  66. struct cpcap_rtc *rtc = dev_get_drvdata(dev);
  67. if (rtc->alarm_enabled == enabled)
  68. return 0;
  69. if (enabled)
  70. enable_irq(rtc->alarm_irq);
  71. else
  72. disable_irq(rtc->alarm_irq);
  73. rtc->alarm_enabled = !!enabled;
  74. return 0;
  75. }
  76. static int cpcap_rtc_read_time(struct device *dev, struct rtc_time *tm)
  77. {
  78. struct cpcap_rtc *rtc;
  79. struct cpcap_time cpcap_tm;
  80. int temp_tod2;
  81. int ret;
  82. rtc = dev_get_drvdata(dev);
  83. ret = regmap_read(rtc->regmap, CPCAP_REG_TOD2, &temp_tod2);
  84. ret |= regmap_read(rtc->regmap, CPCAP_REG_DAY, &cpcap_tm.day);
  85. ret |= regmap_read(rtc->regmap, CPCAP_REG_TOD1, &cpcap_tm.tod1);
  86. ret |= regmap_read(rtc->regmap, CPCAP_REG_TOD2, &cpcap_tm.tod2);
  87. if (temp_tod2 > cpcap_tm.tod2)
  88. ret |= regmap_read(rtc->regmap, CPCAP_REG_DAY, &cpcap_tm.day);
  89. if (ret) {
  90. dev_err(dev, "Failed to read time\n");
  91. return -EIO;
  92. }
  93. cpcap2rtc_time(tm, &cpcap_tm);
  94. return 0;
  95. }
  96. static int cpcap_rtc_set_time(struct device *dev, struct rtc_time *tm)
  97. {
  98. struct cpcap_rtc *rtc;
  99. struct cpcap_time cpcap_tm;
  100. int ret = 0;
  101. rtc = dev_get_drvdata(dev);
  102. rtc2cpcap_time(&cpcap_tm, tm);
  103. if (rtc->alarm_enabled)
  104. disable_irq(rtc->alarm_irq);
  105. if (rtc->update_enabled)
  106. disable_irq(rtc->update_irq);
  107. if (rtc->vendor == CPCAP_VENDOR_ST) {
  108. /* The TOD1 and TOD2 registers MUST be written in this order
  109. * for the change to properly set.
  110. */
  111. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD1,
  112. TOD1_MASK, cpcap_tm.tod1);
  113. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD2,
  114. TOD2_MASK, cpcap_tm.tod2);
  115. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_DAY,
  116. DAY_MASK, cpcap_tm.day);
  117. } else {
  118. /* Clearing the upper lower 8 bits of the TOD guarantees that
  119. * the upper half of TOD (TOD2) will not increment for 0xFF RTC
  120. * ticks (255 seconds). During this time we can safely write
  121. * to DAY, TOD2, then TOD1 (in that order) and expect RTC to be
  122. * synchronized to the exact time requested upon the final write
  123. * to TOD1.
  124. */
  125. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD1,
  126. TOD1_MASK, 0);
  127. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_DAY,
  128. DAY_MASK, cpcap_tm.day);
  129. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD2,
  130. TOD2_MASK, cpcap_tm.tod2);
  131. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TOD1,
  132. TOD1_MASK, cpcap_tm.tod1);
  133. }
  134. if (rtc->update_enabled)
  135. enable_irq(rtc->update_irq);
  136. if (rtc->alarm_enabled)
  137. enable_irq(rtc->alarm_irq);
  138. return ret;
  139. }
  140. static int cpcap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  141. {
  142. struct cpcap_rtc *rtc;
  143. struct cpcap_time cpcap_tm;
  144. int ret;
  145. rtc = dev_get_drvdata(dev);
  146. alrm->enabled = rtc->alarm_enabled;
  147. ret = regmap_read(rtc->regmap, CPCAP_REG_DAYA, &cpcap_tm.day);
  148. ret |= regmap_read(rtc->regmap, CPCAP_REG_TODA2, &cpcap_tm.tod2);
  149. ret |= regmap_read(rtc->regmap, CPCAP_REG_TODA1, &cpcap_tm.tod1);
  150. if (ret) {
  151. dev_err(dev, "Failed to read time\n");
  152. return -EIO;
  153. }
  154. cpcap2rtc_time(&alrm->time, &cpcap_tm);
  155. return rtc_valid_tm(&alrm->time);
  156. }
  157. static int cpcap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  158. {
  159. struct cpcap_rtc *rtc;
  160. struct cpcap_time cpcap_tm;
  161. int ret;
  162. rtc = dev_get_drvdata(dev);
  163. rtc2cpcap_time(&cpcap_tm, &alrm->time);
  164. if (rtc->alarm_enabled)
  165. disable_irq(rtc->alarm_irq);
  166. ret = regmap_update_bits(rtc->regmap, CPCAP_REG_DAYA, DAY_MASK,
  167. cpcap_tm.day);
  168. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TODA2, TOD2_MASK,
  169. cpcap_tm.tod2);
  170. ret |= regmap_update_bits(rtc->regmap, CPCAP_REG_TODA1, TOD1_MASK,
  171. cpcap_tm.tod1);
  172. if (!ret) {
  173. enable_irq(rtc->alarm_irq);
  174. rtc->alarm_enabled = true;
  175. }
  176. return ret;
  177. }
  178. static const struct rtc_class_ops cpcap_rtc_ops = {
  179. .read_time = cpcap_rtc_read_time,
  180. .set_time = cpcap_rtc_set_time,
  181. .read_alarm = cpcap_rtc_read_alarm,
  182. .set_alarm = cpcap_rtc_set_alarm,
  183. .alarm_irq_enable = cpcap_rtc_alarm_irq_enable,
  184. };
  185. static irqreturn_t cpcap_rtc_alarm_irq(int irq, void *data)
  186. {
  187. struct cpcap_rtc *rtc = data;
  188. rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
  189. return IRQ_HANDLED;
  190. }
  191. static irqreturn_t cpcap_rtc_update_irq(int irq, void *data)
  192. {
  193. struct cpcap_rtc *rtc = data;
  194. rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
  195. return IRQ_HANDLED;
  196. }
  197. static int cpcap_rtc_probe(struct platform_device *pdev)
  198. {
  199. struct device *dev = &pdev->dev;
  200. struct cpcap_rtc *rtc;
  201. int err;
  202. rtc = devm_kzalloc(dev, sizeof(*rtc), GFP_KERNEL);
  203. if (!rtc)
  204. return -ENOMEM;
  205. rtc->regmap = dev_get_regmap(dev->parent, NULL);
  206. if (!rtc->regmap)
  207. return -ENODEV;
  208. platform_set_drvdata(pdev, rtc);
  209. rtc->rtc_dev = devm_rtc_allocate_device(dev);
  210. if (IS_ERR(rtc->rtc_dev))
  211. return PTR_ERR(rtc->rtc_dev);
  212. rtc->rtc_dev->ops = &cpcap_rtc_ops;
  213. rtc->rtc_dev->range_max = (timeu64_t) (DAY_MASK + 1) * SECS_PER_DAY - 1;
  214. err = cpcap_get_vendor(dev, rtc->regmap, &rtc->vendor);
  215. if (err)
  216. return err;
  217. rtc->alarm_irq = platform_get_irq(pdev, 0);
  218. err = devm_request_threaded_irq(dev, rtc->alarm_irq, NULL,
  219. cpcap_rtc_alarm_irq, IRQF_TRIGGER_NONE,
  220. "rtc_alarm", rtc);
  221. if (err) {
  222. dev_err(dev, "Could not request alarm irq: %d\n", err);
  223. return err;
  224. }
  225. disable_irq(rtc->alarm_irq);
  226. /* Stock Android uses the 1 Hz interrupt for "secure clock daemon",
  227. * which is not supported by the mainline kernel. The mainline kernel
  228. * does not use the irq at the moment, but we explicitly request and
  229. * disable it, so that its masked and does not wake up the processor
  230. * every second.
  231. */
  232. rtc->update_irq = platform_get_irq(pdev, 1);
  233. err = devm_request_threaded_irq(dev, rtc->update_irq, NULL,
  234. cpcap_rtc_update_irq, IRQF_TRIGGER_NONE,
  235. "rtc_1hz", rtc);
  236. if (err) {
  237. dev_err(dev, "Could not request update irq: %d\n", err);
  238. return err;
  239. }
  240. disable_irq(rtc->update_irq);
  241. err = device_init_wakeup(dev, 1);
  242. if (err) {
  243. dev_err(dev, "wakeup initialization failed (%d)\n", err);
  244. /* ignore error and continue without wakeup support */
  245. }
  246. return rtc_register_device(rtc->rtc_dev);
  247. }
  248. static const struct of_device_id cpcap_rtc_of_match[] = {
  249. { .compatible = "motorola,cpcap-rtc", },
  250. {},
  251. };
  252. MODULE_DEVICE_TABLE(of, cpcap_rtc_of_match);
  253. static struct platform_driver cpcap_rtc_driver = {
  254. .probe = cpcap_rtc_probe,
  255. .driver = {
  256. .name = "cpcap-rtc",
  257. .of_match_table = cpcap_rtc_of_match,
  258. },
  259. };
  260. module_platform_driver(cpcap_rtc_driver);
  261. MODULE_ALIAS("platform:cpcap-rtc");
  262. MODULE_DESCRIPTION("CPCAP RTC driver");
  263. MODULE_AUTHOR("Sebastian Reichel <sre@kernel.org>");
  264. MODULE_LICENSE("GPL");