rtc-cmos.c 37 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * RTC class driver for "CMOS RTC": PCs, ACPI, etc
  4. *
  5. * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
  6. * Copyright (C) 2006 David Brownell (convert to new framework)
  7. */
  8. /*
  9. * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  10. * That defined the register interface now provided by all PCs, some
  11. * non-PC systems, and incorporated into ACPI. Modern PC chipsets
  12. * integrate an MC146818 clone in their southbridge, and boards use
  13. * that instead of discrete clones like the DS12887 or M48T86. There
  14. * are also clones that connect using the LPC bus.
  15. *
  16. * That register API is also used directly by various other drivers
  17. * (notably for integrated NVRAM), infrastructure (x86 has code to
  18. * bypass the RTC framework, directly reading the RTC during boot
  19. * and updating minutes/seconds for systems using NTP synch) and
  20. * utilities (like userspace 'hwclock', if no /dev node exists).
  21. *
  22. * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  23. * interrupts disabled, holding the global rtc_lock, to exclude those
  24. * other drivers and utilities on correctly configured systems.
  25. */
  26. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/spinlock.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/log2.h>
  34. #include <linux/pm.h>
  35. #include <linux/of.h>
  36. #include <linux/of_platform.h>
  37. #ifdef CONFIG_X86
  38. #include <asm/i8259.h>
  39. #include <asm/processor.h>
  40. #include <linux/dmi.h>
  41. #endif
  42. /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  43. #include <linux/mc146818rtc.h>
  44. #ifdef CONFIG_ACPI
  45. /*
  46. * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
  47. *
  48. * If cleared, ACPI SCI is only used to wake up the system from suspend
  49. *
  50. * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
  51. */
  52. static bool use_acpi_alarm;
  53. module_param(use_acpi_alarm, bool, 0444);
  54. static inline int cmos_use_acpi_alarm(void)
  55. {
  56. return use_acpi_alarm;
  57. }
  58. #else /* !CONFIG_ACPI */
  59. static inline int cmos_use_acpi_alarm(void)
  60. {
  61. return 0;
  62. }
  63. #endif
  64. struct cmos_rtc {
  65. struct rtc_device *rtc;
  66. struct device *dev;
  67. int irq;
  68. struct resource *iomem;
  69. time64_t alarm_expires;
  70. void (*wake_on)(struct device *);
  71. void (*wake_off)(struct device *);
  72. u8 enabled_wake;
  73. u8 suspend_ctrl;
  74. /* newer hardware extends the original register set */
  75. u8 day_alrm;
  76. u8 mon_alrm;
  77. u8 century;
  78. struct rtc_wkalrm saved_wkalrm;
  79. };
  80. /* both platform and pnp busses use negative numbers for invalid irqs */
  81. #define is_valid_irq(n) ((n) > 0)
  82. static const char driver_name[] = "rtc_cmos";
  83. /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
  84. * always mask it against the irq enable bits in RTC_CONTROL. Bit values
  85. * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
  86. */
  87. #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
  88. static inline int is_intr(u8 rtc_intr)
  89. {
  90. if (!(rtc_intr & RTC_IRQF))
  91. return 0;
  92. return rtc_intr & RTC_IRQMASK;
  93. }
  94. /*----------------------------------------------------------------*/
  95. /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
  96. * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
  97. * used in a broken "legacy replacement" mode. The breakage includes
  98. * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
  99. * other (better) use.
  100. *
  101. * When that broken mode is in use, platform glue provides a partial
  102. * emulation of hardware RTC IRQ facilities using HPET #1. We don't
  103. * want to use HPET for anything except those IRQs though...
  104. */
  105. #ifdef CONFIG_HPET_EMULATE_RTC
  106. #include <asm/hpet.h>
  107. #else
  108. static inline int is_hpet_enabled(void)
  109. {
  110. return 0;
  111. }
  112. static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
  113. {
  114. return 0;
  115. }
  116. static inline int hpet_set_rtc_irq_bit(unsigned long mask)
  117. {
  118. return 0;
  119. }
  120. static inline int
  121. hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
  122. {
  123. return 0;
  124. }
  125. static inline int hpet_set_periodic_freq(unsigned long freq)
  126. {
  127. return 0;
  128. }
  129. static inline int hpet_rtc_dropped_irq(void)
  130. {
  131. return 0;
  132. }
  133. static inline int hpet_rtc_timer_init(void)
  134. {
  135. return 0;
  136. }
  137. extern irq_handler_t hpet_rtc_interrupt;
  138. static inline int hpet_register_irq_handler(irq_handler_t handler)
  139. {
  140. return 0;
  141. }
  142. static inline int hpet_unregister_irq_handler(irq_handler_t handler)
  143. {
  144. return 0;
  145. }
  146. #endif
  147. /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
  148. static inline int use_hpet_alarm(void)
  149. {
  150. return is_hpet_enabled() && !cmos_use_acpi_alarm();
  151. }
  152. /*----------------------------------------------------------------*/
  153. #ifdef RTC_PORT
  154. /* Most newer x86 systems have two register banks, the first used
  155. * for RTC and NVRAM and the second only for NVRAM. Caller must
  156. * own rtc_lock ... and we won't worry about access during NMI.
  157. */
  158. #define can_bank2 true
  159. static inline unsigned char cmos_read_bank2(unsigned char addr)
  160. {
  161. outb(addr, RTC_PORT(2));
  162. return inb(RTC_PORT(3));
  163. }
  164. static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
  165. {
  166. outb(addr, RTC_PORT(2));
  167. outb(val, RTC_PORT(3));
  168. }
  169. #else
  170. #define can_bank2 false
  171. static inline unsigned char cmos_read_bank2(unsigned char addr)
  172. {
  173. return 0;
  174. }
  175. static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
  176. {
  177. }
  178. #endif
  179. /*----------------------------------------------------------------*/
  180. static int cmos_read_time(struct device *dev, struct rtc_time *t)
  181. {
  182. /*
  183. * If pm_trace abused the RTC for storage, set the timespec to 0,
  184. * which tells the caller that this RTC value is unusable.
  185. */
  186. if (!pm_trace_rtc_valid())
  187. return -EIO;
  188. /* REVISIT: if the clock has a "century" register, use
  189. * that instead of the heuristic in mc146818_get_time().
  190. * That'll make Y3K compatility (year > 2070) easy!
  191. */
  192. mc146818_get_time(t);
  193. return 0;
  194. }
  195. static int cmos_set_time(struct device *dev, struct rtc_time *t)
  196. {
  197. /* REVISIT: set the "century" register if available
  198. *
  199. * NOTE: this ignores the issue whereby updating the seconds
  200. * takes effect exactly 500ms after we write the register.
  201. * (Also queueing and other delays before we get this far.)
  202. */
  203. return mc146818_set_time(t);
  204. }
  205. static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  206. {
  207. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  208. unsigned char rtc_control;
  209. /* This not only a rtc_op, but also called directly */
  210. if (!is_valid_irq(cmos->irq))
  211. return -EIO;
  212. /* Basic alarms only support hour, minute, and seconds fields.
  213. * Some also support day and month, for alarms up to a year in
  214. * the future.
  215. */
  216. spin_lock_irq(&rtc_lock);
  217. t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
  218. t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
  219. t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
  220. if (cmos->day_alrm) {
  221. /* ignore upper bits on readback per ACPI spec */
  222. t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
  223. if (!t->time.tm_mday)
  224. t->time.tm_mday = -1;
  225. if (cmos->mon_alrm) {
  226. t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
  227. if (!t->time.tm_mon)
  228. t->time.tm_mon = -1;
  229. }
  230. }
  231. rtc_control = CMOS_READ(RTC_CONTROL);
  232. spin_unlock_irq(&rtc_lock);
  233. if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
  234. if (((unsigned)t->time.tm_sec) < 0x60)
  235. t->time.tm_sec = bcd2bin(t->time.tm_sec);
  236. else
  237. t->time.tm_sec = -1;
  238. if (((unsigned)t->time.tm_min) < 0x60)
  239. t->time.tm_min = bcd2bin(t->time.tm_min);
  240. else
  241. t->time.tm_min = -1;
  242. if (((unsigned)t->time.tm_hour) < 0x24)
  243. t->time.tm_hour = bcd2bin(t->time.tm_hour);
  244. else
  245. t->time.tm_hour = -1;
  246. if (cmos->day_alrm) {
  247. if (((unsigned)t->time.tm_mday) <= 0x31)
  248. t->time.tm_mday = bcd2bin(t->time.tm_mday);
  249. else
  250. t->time.tm_mday = -1;
  251. if (cmos->mon_alrm) {
  252. if (((unsigned)t->time.tm_mon) <= 0x12)
  253. t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
  254. else
  255. t->time.tm_mon = -1;
  256. }
  257. }
  258. }
  259. t->enabled = !!(rtc_control & RTC_AIE);
  260. t->pending = 0;
  261. return 0;
  262. }
  263. static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
  264. {
  265. unsigned char rtc_intr;
  266. /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
  267. * allegedly some older rtcs need that to handle irqs properly
  268. */
  269. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  270. if (use_hpet_alarm())
  271. return;
  272. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  273. if (is_intr(rtc_intr))
  274. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  275. }
  276. static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
  277. {
  278. unsigned char rtc_control;
  279. /* flush any pending IRQ status, notably for update irqs,
  280. * before we enable new IRQs
  281. */
  282. rtc_control = CMOS_READ(RTC_CONTROL);
  283. cmos_checkintr(cmos, rtc_control);
  284. rtc_control |= mask;
  285. CMOS_WRITE(rtc_control, RTC_CONTROL);
  286. if (use_hpet_alarm())
  287. hpet_set_rtc_irq_bit(mask);
  288. if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
  289. if (cmos->wake_on)
  290. cmos->wake_on(cmos->dev);
  291. }
  292. cmos_checkintr(cmos, rtc_control);
  293. }
  294. static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
  295. {
  296. unsigned char rtc_control;
  297. rtc_control = CMOS_READ(RTC_CONTROL);
  298. rtc_control &= ~mask;
  299. CMOS_WRITE(rtc_control, RTC_CONTROL);
  300. if (use_hpet_alarm())
  301. hpet_mask_rtc_irq_bit(mask);
  302. if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
  303. if (cmos->wake_off)
  304. cmos->wake_off(cmos->dev);
  305. }
  306. cmos_checkintr(cmos, rtc_control);
  307. }
  308. static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
  309. {
  310. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  311. struct rtc_time now;
  312. cmos_read_time(dev, &now);
  313. if (!cmos->day_alrm) {
  314. time64_t t_max_date;
  315. time64_t t_alrm;
  316. t_max_date = rtc_tm_to_time64(&now);
  317. t_max_date += 24 * 60 * 60 - 1;
  318. t_alrm = rtc_tm_to_time64(&t->time);
  319. if (t_alrm > t_max_date) {
  320. dev_err(dev,
  321. "Alarms can be up to one day in the future\n");
  322. return -EINVAL;
  323. }
  324. } else if (!cmos->mon_alrm) {
  325. struct rtc_time max_date = now;
  326. time64_t t_max_date;
  327. time64_t t_alrm;
  328. int max_mday;
  329. if (max_date.tm_mon == 11) {
  330. max_date.tm_mon = 0;
  331. max_date.tm_year += 1;
  332. } else {
  333. max_date.tm_mon += 1;
  334. }
  335. max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
  336. if (max_date.tm_mday > max_mday)
  337. max_date.tm_mday = max_mday;
  338. t_max_date = rtc_tm_to_time64(&max_date);
  339. t_max_date -= 1;
  340. t_alrm = rtc_tm_to_time64(&t->time);
  341. if (t_alrm > t_max_date) {
  342. dev_err(dev,
  343. "Alarms can be up to one month in the future\n");
  344. return -EINVAL;
  345. }
  346. } else {
  347. struct rtc_time max_date = now;
  348. time64_t t_max_date;
  349. time64_t t_alrm;
  350. int max_mday;
  351. max_date.tm_year += 1;
  352. max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
  353. if (max_date.tm_mday > max_mday)
  354. max_date.tm_mday = max_mday;
  355. t_max_date = rtc_tm_to_time64(&max_date);
  356. t_max_date -= 1;
  357. t_alrm = rtc_tm_to_time64(&t->time);
  358. if (t_alrm > t_max_date) {
  359. dev_err(dev,
  360. "Alarms can be up to one year in the future\n");
  361. return -EINVAL;
  362. }
  363. }
  364. return 0;
  365. }
  366. static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  367. {
  368. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  369. unsigned char mon, mday, hrs, min, sec, rtc_control;
  370. int ret;
  371. /* This not only a rtc_op, but also called directly */
  372. if (!is_valid_irq(cmos->irq))
  373. return -EIO;
  374. ret = cmos_validate_alarm(dev, t);
  375. if (ret < 0)
  376. return ret;
  377. mon = t->time.tm_mon + 1;
  378. mday = t->time.tm_mday;
  379. hrs = t->time.tm_hour;
  380. min = t->time.tm_min;
  381. sec = t->time.tm_sec;
  382. spin_lock_irq(&rtc_lock);
  383. rtc_control = CMOS_READ(RTC_CONTROL);
  384. spin_unlock_irq(&rtc_lock);
  385. if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
  386. /* Writing 0xff means "don't care" or "match all". */
  387. mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
  388. mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
  389. hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
  390. min = (min < 60) ? bin2bcd(min) : 0xff;
  391. sec = (sec < 60) ? bin2bcd(sec) : 0xff;
  392. }
  393. spin_lock_irq(&rtc_lock);
  394. /* next rtc irq must not be from previous alarm setting */
  395. cmos_irq_disable(cmos, RTC_AIE);
  396. /* update alarm */
  397. CMOS_WRITE(hrs, RTC_HOURS_ALARM);
  398. CMOS_WRITE(min, RTC_MINUTES_ALARM);
  399. CMOS_WRITE(sec, RTC_SECONDS_ALARM);
  400. /* the system may support an "enhanced" alarm */
  401. if (cmos->day_alrm) {
  402. CMOS_WRITE(mday, cmos->day_alrm);
  403. if (cmos->mon_alrm)
  404. CMOS_WRITE(mon, cmos->mon_alrm);
  405. }
  406. if (use_hpet_alarm()) {
  407. /*
  408. * FIXME the HPET alarm glue currently ignores day_alrm
  409. * and mon_alrm ...
  410. */
  411. hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min,
  412. t->time.tm_sec);
  413. }
  414. if (t->enabled)
  415. cmos_irq_enable(cmos, RTC_AIE);
  416. spin_unlock_irq(&rtc_lock);
  417. cmos->alarm_expires = rtc_tm_to_time64(&t->time);
  418. return 0;
  419. }
  420. static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
  421. {
  422. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  423. unsigned long flags;
  424. spin_lock_irqsave(&rtc_lock, flags);
  425. if (enabled)
  426. cmos_irq_enable(cmos, RTC_AIE);
  427. else
  428. cmos_irq_disable(cmos, RTC_AIE);
  429. spin_unlock_irqrestore(&rtc_lock, flags);
  430. return 0;
  431. }
  432. #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
  433. static int cmos_procfs(struct device *dev, struct seq_file *seq)
  434. {
  435. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  436. unsigned char rtc_control, valid;
  437. spin_lock_irq(&rtc_lock);
  438. rtc_control = CMOS_READ(RTC_CONTROL);
  439. valid = CMOS_READ(RTC_VALID);
  440. spin_unlock_irq(&rtc_lock);
  441. /* NOTE: at least ICH6 reports battery status using a different
  442. * (non-RTC) bit; and SQWE is ignored on many current systems.
  443. */
  444. seq_printf(seq,
  445. "periodic_IRQ\t: %s\n"
  446. "update_IRQ\t: %s\n"
  447. "HPET_emulated\t: %s\n"
  448. // "square_wave\t: %s\n"
  449. "BCD\t\t: %s\n"
  450. "DST_enable\t: %s\n"
  451. "periodic_freq\t: %d\n"
  452. "batt_status\t: %s\n",
  453. (rtc_control & RTC_PIE) ? "yes" : "no",
  454. (rtc_control & RTC_UIE) ? "yes" : "no",
  455. use_hpet_alarm() ? "yes" : "no",
  456. // (rtc_control & RTC_SQWE) ? "yes" : "no",
  457. (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
  458. (rtc_control & RTC_DST_EN) ? "yes" : "no",
  459. cmos->rtc->irq_freq,
  460. (valid & RTC_VRT) ? "okay" : "dead");
  461. return 0;
  462. }
  463. #else
  464. #define cmos_procfs NULL
  465. #endif
  466. static const struct rtc_class_ops cmos_rtc_ops = {
  467. .read_time = cmos_read_time,
  468. .set_time = cmos_set_time,
  469. .read_alarm = cmos_read_alarm,
  470. .set_alarm = cmos_set_alarm,
  471. .proc = cmos_procfs,
  472. .alarm_irq_enable = cmos_alarm_irq_enable,
  473. };
  474. static const struct rtc_class_ops cmos_rtc_ops_no_alarm = {
  475. .read_time = cmos_read_time,
  476. .set_time = cmos_set_time,
  477. .proc = cmos_procfs,
  478. };
  479. /*----------------------------------------------------------------*/
  480. /*
  481. * All these chips have at least 64 bytes of address space, shared by
  482. * RTC registers and NVRAM. Most of those bytes of NVRAM are used
  483. * by boot firmware. Modern chips have 128 or 256 bytes.
  484. */
  485. #define NVRAM_OFFSET (RTC_REG_D + 1)
  486. static int cmos_nvram_read(void *priv, unsigned int off, void *val,
  487. size_t count)
  488. {
  489. unsigned char *buf = val;
  490. int retval;
  491. off += NVRAM_OFFSET;
  492. spin_lock_irq(&rtc_lock);
  493. for (retval = 0; count; count--, off++, retval++) {
  494. if (off < 128)
  495. *buf++ = CMOS_READ(off);
  496. else if (can_bank2)
  497. *buf++ = cmos_read_bank2(off);
  498. else
  499. break;
  500. }
  501. spin_unlock_irq(&rtc_lock);
  502. return retval;
  503. }
  504. static int cmos_nvram_write(void *priv, unsigned int off, void *val,
  505. size_t count)
  506. {
  507. struct cmos_rtc *cmos = priv;
  508. unsigned char *buf = val;
  509. int retval;
  510. /* NOTE: on at least PCs and Ataris, the boot firmware uses a
  511. * checksum on part of the NVRAM data. That's currently ignored
  512. * here. If userspace is smart enough to know what fields of
  513. * NVRAM to update, updating checksums is also part of its job.
  514. */
  515. off += NVRAM_OFFSET;
  516. spin_lock_irq(&rtc_lock);
  517. for (retval = 0; count; count--, off++, retval++) {
  518. /* don't trash RTC registers */
  519. if (off == cmos->day_alrm
  520. || off == cmos->mon_alrm
  521. || off == cmos->century)
  522. buf++;
  523. else if (off < 128)
  524. CMOS_WRITE(*buf++, off);
  525. else if (can_bank2)
  526. cmos_write_bank2(*buf++, off);
  527. else
  528. break;
  529. }
  530. spin_unlock_irq(&rtc_lock);
  531. return retval;
  532. }
  533. /*----------------------------------------------------------------*/
  534. static struct cmos_rtc cmos_rtc;
  535. static irqreturn_t cmos_interrupt(int irq, void *p)
  536. {
  537. unsigned long flags;
  538. u8 irqstat;
  539. u8 rtc_control;
  540. spin_lock_irqsave(&rtc_lock, flags);
  541. /* When the HPET interrupt handler calls us, the interrupt
  542. * status is passed as arg1 instead of the irq number. But
  543. * always clear irq status, even when HPET is in the way.
  544. *
  545. * Note that HPET and RTC are almost certainly out of phase,
  546. * giving different IRQ status ...
  547. */
  548. irqstat = CMOS_READ(RTC_INTR_FLAGS);
  549. rtc_control = CMOS_READ(RTC_CONTROL);
  550. if (use_hpet_alarm())
  551. irqstat = (unsigned long)irq & 0xF0;
  552. /* If we were suspended, RTC_CONTROL may not be accurate since the
  553. * bios may have cleared it.
  554. */
  555. if (!cmos_rtc.suspend_ctrl)
  556. irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  557. else
  558. irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
  559. /* All Linux RTC alarms should be treated as if they were oneshot.
  560. * Similar code may be needed in system wakeup paths, in case the
  561. * alarm woke the system.
  562. */
  563. if (irqstat & RTC_AIE) {
  564. cmos_rtc.suspend_ctrl &= ~RTC_AIE;
  565. rtc_control &= ~RTC_AIE;
  566. CMOS_WRITE(rtc_control, RTC_CONTROL);
  567. if (use_hpet_alarm())
  568. hpet_mask_rtc_irq_bit(RTC_AIE);
  569. CMOS_READ(RTC_INTR_FLAGS);
  570. }
  571. spin_unlock_irqrestore(&rtc_lock, flags);
  572. if (is_intr(irqstat)) {
  573. rtc_update_irq(p, 1, irqstat);
  574. return IRQ_HANDLED;
  575. } else
  576. return IRQ_NONE;
  577. }
  578. #ifdef CONFIG_PNP
  579. #define INITSECTION
  580. #else
  581. #define INITSECTION __init
  582. #endif
  583. static int INITSECTION
  584. cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
  585. {
  586. struct cmos_rtc_board_info *info = dev_get_platdata(dev);
  587. int retval = 0;
  588. unsigned char rtc_control;
  589. unsigned address_space;
  590. u32 flags = 0;
  591. struct nvmem_config nvmem_cfg = {
  592. .name = "cmos_nvram",
  593. .word_size = 1,
  594. .stride = 1,
  595. .reg_read = cmos_nvram_read,
  596. .reg_write = cmos_nvram_write,
  597. .priv = &cmos_rtc,
  598. };
  599. /* there can be only one ... */
  600. if (cmos_rtc.dev)
  601. return -EBUSY;
  602. if (!ports)
  603. return -ENODEV;
  604. /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
  605. *
  606. * REVISIT non-x86 systems may instead use memory space resources
  607. * (needing ioremap etc), not i/o space resources like this ...
  608. */
  609. if (RTC_IOMAPPED)
  610. ports = request_region(ports->start, resource_size(ports),
  611. driver_name);
  612. else
  613. ports = request_mem_region(ports->start, resource_size(ports),
  614. driver_name);
  615. if (!ports) {
  616. dev_dbg(dev, "i/o registers already in use\n");
  617. return -EBUSY;
  618. }
  619. cmos_rtc.irq = rtc_irq;
  620. cmos_rtc.iomem = ports;
  621. /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
  622. * driver did, but don't reject unknown configs. Old hardware
  623. * won't address 128 bytes. Newer chips have multiple banks,
  624. * though they may not be listed in one I/O resource.
  625. */
  626. #if defined(CONFIG_ATARI)
  627. address_space = 64;
  628. #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
  629. || defined(__sparc__) || defined(__mips__) \
  630. || defined(__powerpc__)
  631. address_space = 128;
  632. #else
  633. #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
  634. address_space = 128;
  635. #endif
  636. if (can_bank2 && ports->end > (ports->start + 1))
  637. address_space = 256;
  638. /* For ACPI systems extension info comes from the FADT. On others,
  639. * board specific setup provides it as appropriate. Systems where
  640. * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
  641. * some almost-clones) can provide hooks to make that behave.
  642. *
  643. * Note that ACPI doesn't preclude putting these registers into
  644. * "extended" areas of the chip, including some that we won't yet
  645. * expect CMOS_READ and friends to handle.
  646. */
  647. if (info) {
  648. if (info->flags)
  649. flags = info->flags;
  650. if (info->address_space)
  651. address_space = info->address_space;
  652. if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
  653. cmos_rtc.day_alrm = info->rtc_day_alarm;
  654. if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
  655. cmos_rtc.mon_alrm = info->rtc_mon_alarm;
  656. if (info->rtc_century && info->rtc_century < 128)
  657. cmos_rtc.century = info->rtc_century;
  658. if (info->wake_on && info->wake_off) {
  659. cmos_rtc.wake_on = info->wake_on;
  660. cmos_rtc.wake_off = info->wake_off;
  661. }
  662. }
  663. cmos_rtc.dev = dev;
  664. dev_set_drvdata(dev, &cmos_rtc);
  665. cmos_rtc.rtc = devm_rtc_allocate_device(dev);
  666. if (IS_ERR(cmos_rtc.rtc)) {
  667. retval = PTR_ERR(cmos_rtc.rtc);
  668. goto cleanup0;
  669. }
  670. rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
  671. spin_lock_irq(&rtc_lock);
  672. if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
  673. /* force periodic irq to CMOS reset default of 1024Hz;
  674. *
  675. * REVISIT it's been reported that at least one x86_64 ALI
  676. * mobo doesn't use 32KHz here ... for portability we might
  677. * need to do something about other clock frequencies.
  678. */
  679. cmos_rtc.rtc->irq_freq = 1024;
  680. if (use_hpet_alarm())
  681. hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
  682. CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
  683. }
  684. /* disable irqs */
  685. if (is_valid_irq(rtc_irq))
  686. cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
  687. rtc_control = CMOS_READ(RTC_CONTROL);
  688. spin_unlock_irq(&rtc_lock);
  689. if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
  690. dev_warn(dev, "only 24-hr supported\n");
  691. retval = -ENXIO;
  692. goto cleanup1;
  693. }
  694. if (use_hpet_alarm())
  695. hpet_rtc_timer_init();
  696. if (is_valid_irq(rtc_irq)) {
  697. irq_handler_t rtc_cmos_int_handler;
  698. if (use_hpet_alarm()) {
  699. rtc_cmos_int_handler = hpet_rtc_interrupt;
  700. retval = hpet_register_irq_handler(cmos_interrupt);
  701. if (retval) {
  702. hpet_mask_rtc_irq_bit(RTC_IRQMASK);
  703. dev_warn(dev, "hpet_register_irq_handler "
  704. " failed in rtc_init().");
  705. goto cleanup1;
  706. }
  707. } else
  708. rtc_cmos_int_handler = cmos_interrupt;
  709. retval = request_irq(rtc_irq, rtc_cmos_int_handler,
  710. 0, dev_name(&cmos_rtc.rtc->dev),
  711. cmos_rtc.rtc);
  712. if (retval < 0) {
  713. dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
  714. goto cleanup1;
  715. }
  716. cmos_rtc.rtc->ops = &cmos_rtc_ops;
  717. } else {
  718. cmos_rtc.rtc->ops = &cmos_rtc_ops_no_alarm;
  719. }
  720. cmos_rtc.rtc->nvram_old_abi = true;
  721. retval = rtc_register_device(cmos_rtc.rtc);
  722. if (retval)
  723. goto cleanup2;
  724. /* export at least the first block of NVRAM */
  725. nvmem_cfg.size = address_space - NVRAM_OFFSET;
  726. if (rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg))
  727. dev_err(dev, "nvmem registration failed\n");
  728. dev_info(dev, "%s%s, %d bytes nvram%s\n",
  729. !is_valid_irq(rtc_irq) ? "no alarms" :
  730. cmos_rtc.mon_alrm ? "alarms up to one year" :
  731. cmos_rtc.day_alrm ? "alarms up to one month" :
  732. "alarms up to one day",
  733. cmos_rtc.century ? ", y3k" : "",
  734. nvmem_cfg.size,
  735. use_hpet_alarm() ? ", hpet irqs" : "");
  736. return 0;
  737. cleanup2:
  738. if (is_valid_irq(rtc_irq))
  739. free_irq(rtc_irq, cmos_rtc.rtc);
  740. cleanup1:
  741. cmos_rtc.dev = NULL;
  742. cleanup0:
  743. if (RTC_IOMAPPED)
  744. release_region(ports->start, resource_size(ports));
  745. else
  746. release_mem_region(ports->start, resource_size(ports));
  747. return retval;
  748. }
  749. static void cmos_do_shutdown(int rtc_irq)
  750. {
  751. spin_lock_irq(&rtc_lock);
  752. if (is_valid_irq(rtc_irq))
  753. cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
  754. spin_unlock_irq(&rtc_lock);
  755. }
  756. static void cmos_do_remove(struct device *dev)
  757. {
  758. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  759. struct resource *ports;
  760. cmos_do_shutdown(cmos->irq);
  761. if (is_valid_irq(cmos->irq)) {
  762. free_irq(cmos->irq, cmos->rtc);
  763. if (use_hpet_alarm())
  764. hpet_unregister_irq_handler(cmos_interrupt);
  765. }
  766. cmos->rtc = NULL;
  767. ports = cmos->iomem;
  768. if (RTC_IOMAPPED)
  769. release_region(ports->start, resource_size(ports));
  770. else
  771. release_mem_region(ports->start, resource_size(ports));
  772. cmos->iomem = NULL;
  773. cmos->dev = NULL;
  774. }
  775. static int cmos_aie_poweroff(struct device *dev)
  776. {
  777. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  778. struct rtc_time now;
  779. time64_t t_now;
  780. int retval = 0;
  781. unsigned char rtc_control;
  782. if (!cmos->alarm_expires)
  783. return -EINVAL;
  784. spin_lock_irq(&rtc_lock);
  785. rtc_control = CMOS_READ(RTC_CONTROL);
  786. spin_unlock_irq(&rtc_lock);
  787. /* We only care about the situation where AIE is disabled. */
  788. if (rtc_control & RTC_AIE)
  789. return -EBUSY;
  790. cmos_read_time(dev, &now);
  791. t_now = rtc_tm_to_time64(&now);
  792. /*
  793. * When enabling "RTC wake-up" in BIOS setup, the machine reboots
  794. * automatically right after shutdown on some buggy boxes.
  795. * This automatic rebooting issue won't happen when the alarm
  796. * time is larger than now+1 seconds.
  797. *
  798. * If the alarm time is equal to now+1 seconds, the issue can be
  799. * prevented by cancelling the alarm.
  800. */
  801. if (cmos->alarm_expires == t_now + 1) {
  802. struct rtc_wkalrm alarm;
  803. /* Cancel the AIE timer by configuring the past time. */
  804. rtc_time64_to_tm(t_now - 1, &alarm.time);
  805. alarm.enabled = 0;
  806. retval = cmos_set_alarm(dev, &alarm);
  807. } else if (cmos->alarm_expires > t_now + 1) {
  808. retval = -EBUSY;
  809. }
  810. return retval;
  811. }
  812. static int cmos_suspend(struct device *dev)
  813. {
  814. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  815. unsigned char tmp;
  816. /* only the alarm might be a wakeup event source */
  817. spin_lock_irq(&rtc_lock);
  818. cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
  819. if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
  820. unsigned char mask;
  821. if (device_may_wakeup(dev))
  822. mask = RTC_IRQMASK & ~RTC_AIE;
  823. else
  824. mask = RTC_IRQMASK;
  825. tmp &= ~mask;
  826. CMOS_WRITE(tmp, RTC_CONTROL);
  827. if (use_hpet_alarm())
  828. hpet_mask_rtc_irq_bit(mask);
  829. cmos_checkintr(cmos, tmp);
  830. }
  831. spin_unlock_irq(&rtc_lock);
  832. if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
  833. cmos->enabled_wake = 1;
  834. if (cmos->wake_on)
  835. cmos->wake_on(dev);
  836. else
  837. enable_irq_wake(cmos->irq);
  838. }
  839. memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm));
  840. cmos_read_alarm(dev, &cmos->saved_wkalrm);
  841. dev_dbg(dev, "suspend%s, ctrl %02x\n",
  842. (tmp & RTC_AIE) ? ", alarm may wake" : "",
  843. tmp);
  844. return 0;
  845. }
  846. /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
  847. * after a detour through G3 "mechanical off", although the ACPI spec
  848. * says wakeup should only work from G1/S4 "hibernate". To most users,
  849. * distinctions between S4 and S5 are pointless. So when the hardware
  850. * allows, don't draw that distinction.
  851. */
  852. static inline int cmos_poweroff(struct device *dev)
  853. {
  854. if (!IS_ENABLED(CONFIG_PM))
  855. return -ENOSYS;
  856. return cmos_suspend(dev);
  857. }
  858. static void cmos_check_wkalrm(struct device *dev)
  859. {
  860. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  861. struct rtc_wkalrm current_alarm;
  862. time64_t t_now;
  863. time64_t t_current_expires;
  864. time64_t t_saved_expires;
  865. struct rtc_time now;
  866. /* Check if we have RTC Alarm armed */
  867. if (!(cmos->suspend_ctrl & RTC_AIE))
  868. return;
  869. cmos_read_time(dev, &now);
  870. t_now = rtc_tm_to_time64(&now);
  871. /*
  872. * ACPI RTC wake event is cleared after resume from STR,
  873. * ACK the rtc irq here
  874. */
  875. if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
  876. cmos_interrupt(0, (void *)cmos->rtc);
  877. return;
  878. }
  879. memset(&current_alarm, 0, sizeof(struct rtc_wkalrm));
  880. cmos_read_alarm(dev, &current_alarm);
  881. t_current_expires = rtc_tm_to_time64(&current_alarm.time);
  882. t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
  883. if (t_current_expires != t_saved_expires ||
  884. cmos->saved_wkalrm.enabled != current_alarm.enabled) {
  885. cmos_set_alarm(dev, &cmos->saved_wkalrm);
  886. }
  887. }
  888. static void cmos_check_acpi_rtc_status(struct device *dev,
  889. unsigned char *rtc_control);
  890. static int __maybe_unused cmos_resume(struct device *dev)
  891. {
  892. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  893. unsigned char tmp;
  894. if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
  895. if (cmos->wake_off)
  896. cmos->wake_off(dev);
  897. else
  898. disable_irq_wake(cmos->irq);
  899. cmos->enabled_wake = 0;
  900. }
  901. /* The BIOS might have changed the alarm, restore it */
  902. cmos_check_wkalrm(dev);
  903. spin_lock_irq(&rtc_lock);
  904. tmp = cmos->suspend_ctrl;
  905. cmos->suspend_ctrl = 0;
  906. /* re-enable any irqs previously active */
  907. if (tmp & RTC_IRQMASK) {
  908. unsigned char mask;
  909. if (device_may_wakeup(dev) && use_hpet_alarm())
  910. hpet_rtc_timer_init();
  911. do {
  912. CMOS_WRITE(tmp, RTC_CONTROL);
  913. if (use_hpet_alarm())
  914. hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
  915. mask = CMOS_READ(RTC_INTR_FLAGS);
  916. mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
  917. if (!use_hpet_alarm() || !is_intr(mask))
  918. break;
  919. /* force one-shot behavior if HPET blocked
  920. * the wake alarm's irq
  921. */
  922. rtc_update_irq(cmos->rtc, 1, mask);
  923. tmp &= ~RTC_AIE;
  924. hpet_mask_rtc_irq_bit(RTC_AIE);
  925. } while (mask & RTC_AIE);
  926. if (tmp & RTC_AIE)
  927. cmos_check_acpi_rtc_status(dev, &tmp);
  928. }
  929. spin_unlock_irq(&rtc_lock);
  930. dev_dbg(dev, "resume, ctrl %02x\n", tmp);
  931. return 0;
  932. }
  933. static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
  934. /*----------------------------------------------------------------*/
  935. /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
  936. * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
  937. * probably list them in similar PNPBIOS tables; so PNP is more common.
  938. *
  939. * We don't use legacy "poke at the hardware" probing. Ancient PCs that
  940. * predate even PNPBIOS should set up platform_bus devices.
  941. */
  942. #ifdef CONFIG_ACPI
  943. #include <linux/acpi.h>
  944. static u32 rtc_handler(void *context)
  945. {
  946. struct device *dev = context;
  947. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  948. unsigned char rtc_control = 0;
  949. unsigned char rtc_intr;
  950. unsigned long flags;
  951. /*
  952. * Always update rtc irq when ACPI is used as RTC Alarm.
  953. * Or else, ACPI SCI is enabled during suspend/resume only,
  954. * update rtc irq in that case.
  955. */
  956. if (cmos_use_acpi_alarm())
  957. cmos_interrupt(0, (void *)cmos->rtc);
  958. else {
  959. /* Fix me: can we use cmos_interrupt() here as well? */
  960. spin_lock_irqsave(&rtc_lock, flags);
  961. if (cmos_rtc.suspend_ctrl)
  962. rtc_control = CMOS_READ(RTC_CONTROL);
  963. if (rtc_control & RTC_AIE) {
  964. cmos_rtc.suspend_ctrl &= ~RTC_AIE;
  965. CMOS_WRITE(rtc_control, RTC_CONTROL);
  966. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  967. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  968. }
  969. spin_unlock_irqrestore(&rtc_lock, flags);
  970. }
  971. pm_wakeup_hard_event(dev);
  972. acpi_clear_event(ACPI_EVENT_RTC);
  973. acpi_disable_event(ACPI_EVENT_RTC, 0);
  974. return ACPI_INTERRUPT_HANDLED;
  975. }
  976. static inline void rtc_wake_setup(struct device *dev)
  977. {
  978. acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
  979. /*
  980. * After the RTC handler is installed, the Fixed_RTC event should
  981. * be disabled. Only when the RTC alarm is set will it be enabled.
  982. */
  983. acpi_clear_event(ACPI_EVENT_RTC);
  984. acpi_disable_event(ACPI_EVENT_RTC, 0);
  985. }
  986. static void rtc_wake_on(struct device *dev)
  987. {
  988. acpi_clear_event(ACPI_EVENT_RTC);
  989. acpi_enable_event(ACPI_EVENT_RTC, 0);
  990. }
  991. static void rtc_wake_off(struct device *dev)
  992. {
  993. acpi_disable_event(ACPI_EVENT_RTC, 0);
  994. }
  995. #ifdef CONFIG_X86
  996. /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */
  997. static void use_acpi_alarm_quirks(void)
  998. {
  999. if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
  1000. return;
  1001. if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0))
  1002. return;
  1003. if (!is_hpet_enabled())
  1004. return;
  1005. if (dmi_get_bios_year() < 2015)
  1006. return;
  1007. use_acpi_alarm = true;
  1008. }
  1009. #else
  1010. static inline void use_acpi_alarm_quirks(void) { }
  1011. #endif
  1012. /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
  1013. * its device node and pass extra config data. This helps its driver use
  1014. * capabilities that the now-obsolete mc146818 didn't have, and informs it
  1015. * that this board's RTC is wakeup-capable (per ACPI spec).
  1016. */
  1017. static struct cmos_rtc_board_info acpi_rtc_info;
  1018. static void cmos_wake_setup(struct device *dev)
  1019. {
  1020. if (acpi_disabled)
  1021. return;
  1022. use_acpi_alarm_quirks();
  1023. rtc_wake_setup(dev);
  1024. acpi_rtc_info.wake_on = rtc_wake_on;
  1025. acpi_rtc_info.wake_off = rtc_wake_off;
  1026. /* workaround bug in some ACPI tables */
  1027. if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
  1028. dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
  1029. acpi_gbl_FADT.month_alarm);
  1030. acpi_gbl_FADT.month_alarm = 0;
  1031. }
  1032. acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
  1033. acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
  1034. acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
  1035. /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
  1036. if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
  1037. dev_info(dev, "RTC can wake from S4\n");
  1038. dev->platform_data = &acpi_rtc_info;
  1039. /* RTC always wakes from S1/S2/S3, and often S4/STD */
  1040. device_init_wakeup(dev, 1);
  1041. }
  1042. static void cmos_check_acpi_rtc_status(struct device *dev,
  1043. unsigned char *rtc_control)
  1044. {
  1045. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1046. acpi_event_status rtc_status;
  1047. acpi_status status;
  1048. if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
  1049. return;
  1050. status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
  1051. if (ACPI_FAILURE(status)) {
  1052. dev_err(dev, "Could not get RTC status\n");
  1053. } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
  1054. unsigned char mask;
  1055. *rtc_control &= ~RTC_AIE;
  1056. CMOS_WRITE(*rtc_control, RTC_CONTROL);
  1057. mask = CMOS_READ(RTC_INTR_FLAGS);
  1058. rtc_update_irq(cmos->rtc, 1, mask);
  1059. }
  1060. }
  1061. #else
  1062. static void cmos_wake_setup(struct device *dev)
  1063. {
  1064. }
  1065. static void cmos_check_acpi_rtc_status(struct device *dev,
  1066. unsigned char *rtc_control)
  1067. {
  1068. }
  1069. #endif
  1070. #ifdef CONFIG_PNP
  1071. #include <linux/pnp.h>
  1072. static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
  1073. {
  1074. cmos_wake_setup(&pnp->dev);
  1075. if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
  1076. unsigned int irq = 0;
  1077. #ifdef CONFIG_X86
  1078. /* Some machines contain a PNP entry for the RTC, but
  1079. * don't define the IRQ. It should always be safe to
  1080. * hardcode it on systems with a legacy PIC.
  1081. */
  1082. if (nr_legacy_irqs())
  1083. irq = RTC_IRQ;
  1084. #endif
  1085. return cmos_do_probe(&pnp->dev,
  1086. pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
  1087. } else {
  1088. return cmos_do_probe(&pnp->dev,
  1089. pnp_get_resource(pnp, IORESOURCE_IO, 0),
  1090. pnp_irq(pnp, 0));
  1091. }
  1092. }
  1093. static void cmos_pnp_remove(struct pnp_dev *pnp)
  1094. {
  1095. cmos_do_remove(&pnp->dev);
  1096. }
  1097. static void cmos_pnp_shutdown(struct pnp_dev *pnp)
  1098. {
  1099. struct device *dev = &pnp->dev;
  1100. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1101. if (system_state == SYSTEM_POWER_OFF) {
  1102. int retval = cmos_poweroff(dev);
  1103. if (cmos_aie_poweroff(dev) < 0 && !retval)
  1104. return;
  1105. }
  1106. cmos_do_shutdown(cmos->irq);
  1107. }
  1108. static const struct pnp_device_id rtc_ids[] = {
  1109. { .id = "PNP0b00", },
  1110. { .id = "PNP0b01", },
  1111. { .id = "PNP0b02", },
  1112. { },
  1113. };
  1114. MODULE_DEVICE_TABLE(pnp, rtc_ids);
  1115. static struct pnp_driver cmos_pnp_driver = {
  1116. .name = driver_name,
  1117. .id_table = rtc_ids,
  1118. .probe = cmos_pnp_probe,
  1119. .remove = cmos_pnp_remove,
  1120. .shutdown = cmos_pnp_shutdown,
  1121. /* flag ensures resume() gets called, and stops syslog spam */
  1122. .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
  1123. .driver = {
  1124. .pm = &cmos_pm_ops,
  1125. },
  1126. };
  1127. #endif /* CONFIG_PNP */
  1128. #ifdef CONFIG_OF
  1129. static const struct of_device_id of_cmos_match[] = {
  1130. {
  1131. .compatible = "motorola,mc146818",
  1132. },
  1133. { },
  1134. };
  1135. MODULE_DEVICE_TABLE(of, of_cmos_match);
  1136. static __init void cmos_of_init(struct platform_device *pdev)
  1137. {
  1138. struct device_node *node = pdev->dev.of_node;
  1139. const __be32 *val;
  1140. if (!node)
  1141. return;
  1142. val = of_get_property(node, "ctrl-reg", NULL);
  1143. if (val)
  1144. CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
  1145. val = of_get_property(node, "freq-reg", NULL);
  1146. if (val)
  1147. CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
  1148. }
  1149. #else
  1150. static inline void cmos_of_init(struct platform_device *pdev) {}
  1151. #endif
  1152. /*----------------------------------------------------------------*/
  1153. /* Platform setup should have set up an RTC device, when PNP is
  1154. * unavailable ... this could happen even on (older) PCs.
  1155. */
  1156. static int __init cmos_platform_probe(struct platform_device *pdev)
  1157. {
  1158. struct resource *resource;
  1159. int irq;
  1160. cmos_of_init(pdev);
  1161. cmos_wake_setup(&pdev->dev);
  1162. if (RTC_IOMAPPED)
  1163. resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1164. else
  1165. resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1166. irq = platform_get_irq(pdev, 0);
  1167. if (irq < 0)
  1168. irq = -1;
  1169. return cmos_do_probe(&pdev->dev, resource, irq);
  1170. }
  1171. static int cmos_platform_remove(struct platform_device *pdev)
  1172. {
  1173. cmos_do_remove(&pdev->dev);
  1174. return 0;
  1175. }
  1176. static void cmos_platform_shutdown(struct platform_device *pdev)
  1177. {
  1178. struct device *dev = &pdev->dev;
  1179. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1180. if (system_state == SYSTEM_POWER_OFF) {
  1181. int retval = cmos_poweroff(dev);
  1182. if (cmos_aie_poweroff(dev) < 0 && !retval)
  1183. return;
  1184. }
  1185. cmos_do_shutdown(cmos->irq);
  1186. }
  1187. /* work with hotplug and coldplug */
  1188. MODULE_ALIAS("platform:rtc_cmos");
  1189. static struct platform_driver cmos_platform_driver = {
  1190. .remove = cmos_platform_remove,
  1191. .shutdown = cmos_platform_shutdown,
  1192. .driver = {
  1193. .name = driver_name,
  1194. .pm = &cmos_pm_ops,
  1195. .of_match_table = of_match_ptr(of_cmos_match),
  1196. }
  1197. };
  1198. #ifdef CONFIG_PNP
  1199. static bool pnp_driver_registered;
  1200. #endif
  1201. static bool platform_driver_registered;
  1202. static int __init cmos_init(void)
  1203. {
  1204. int retval = 0;
  1205. #ifdef CONFIG_PNP
  1206. retval = pnp_register_driver(&cmos_pnp_driver);
  1207. if (retval == 0)
  1208. pnp_driver_registered = true;
  1209. #endif
  1210. if (!cmos_rtc.dev) {
  1211. retval = platform_driver_probe(&cmos_platform_driver,
  1212. cmos_platform_probe);
  1213. if (retval == 0)
  1214. platform_driver_registered = true;
  1215. }
  1216. if (retval == 0)
  1217. return 0;
  1218. #ifdef CONFIG_PNP
  1219. if (pnp_driver_registered)
  1220. pnp_unregister_driver(&cmos_pnp_driver);
  1221. #endif
  1222. return retval;
  1223. }
  1224. module_init(cmos_init);
  1225. static void __exit cmos_exit(void)
  1226. {
  1227. #ifdef CONFIG_PNP
  1228. if (pnp_driver_registered)
  1229. pnp_unregister_driver(&cmos_pnp_driver);
  1230. #endif
  1231. if (platform_driver_registered)
  1232. platform_driver_unregister(&cmos_platform_driver);
  1233. }
  1234. module_exit(cmos_exit);
  1235. MODULE_AUTHOR("David Brownell");
  1236. MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
  1237. MODULE_LICENSE("GPL");