rtc-abx80x.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * A driver for the I2C members of the Abracon AB x8xx RTC family,
  4. * and compatible: AB 1805 and AB 0805
  5. *
  6. * Copyright 2014-2015 Macq S.A.
  7. *
  8. * Author: Philippe De Muyter <phdm@macqel.be>
  9. * Author: Alexandre Belloni <alexandre.belloni@bootlin.com>
  10. *
  11. */
  12. #include <linux/bcd.h>
  13. #include <linux/i2c.h>
  14. #include <linux/module.h>
  15. #include <linux/of_device.h>
  16. #include <linux/rtc.h>
  17. #include <linux/watchdog.h>
  18. #define ABX8XX_REG_HTH 0x00
  19. #define ABX8XX_REG_SC 0x01
  20. #define ABX8XX_REG_MN 0x02
  21. #define ABX8XX_REG_HR 0x03
  22. #define ABX8XX_REG_DA 0x04
  23. #define ABX8XX_REG_MO 0x05
  24. #define ABX8XX_REG_YR 0x06
  25. #define ABX8XX_REG_WD 0x07
  26. #define ABX8XX_REG_AHTH 0x08
  27. #define ABX8XX_REG_ASC 0x09
  28. #define ABX8XX_REG_AMN 0x0a
  29. #define ABX8XX_REG_AHR 0x0b
  30. #define ABX8XX_REG_ADA 0x0c
  31. #define ABX8XX_REG_AMO 0x0d
  32. #define ABX8XX_REG_AWD 0x0e
  33. #define ABX8XX_REG_STATUS 0x0f
  34. #define ABX8XX_STATUS_AF BIT(2)
  35. #define ABX8XX_STATUS_BLF BIT(4)
  36. #define ABX8XX_STATUS_WDT BIT(6)
  37. #define ABX8XX_REG_CTRL1 0x10
  38. #define ABX8XX_CTRL_WRITE BIT(0)
  39. #define ABX8XX_CTRL_ARST BIT(2)
  40. #define ABX8XX_CTRL_12_24 BIT(6)
  41. #define ABX8XX_REG_CTRL2 0x11
  42. #define ABX8XX_CTRL2_RSVD BIT(5)
  43. #define ABX8XX_REG_IRQ 0x12
  44. #define ABX8XX_IRQ_AIE BIT(2)
  45. #define ABX8XX_IRQ_IM_1_4 (0x3 << 5)
  46. #define ABX8XX_REG_CD_TIMER_CTL 0x18
  47. #define ABX8XX_REG_OSC 0x1c
  48. #define ABX8XX_OSC_FOS BIT(3)
  49. #define ABX8XX_OSC_BOS BIT(4)
  50. #define ABX8XX_OSC_ACAL_512 BIT(5)
  51. #define ABX8XX_OSC_ACAL_1024 BIT(6)
  52. #define ABX8XX_OSC_OSEL BIT(7)
  53. #define ABX8XX_REG_OSS 0x1d
  54. #define ABX8XX_OSS_OF BIT(1)
  55. #define ABX8XX_OSS_OMODE BIT(4)
  56. #define ABX8XX_REG_WDT 0x1b
  57. #define ABX8XX_WDT_WDS BIT(7)
  58. #define ABX8XX_WDT_BMB_MASK 0x7c
  59. #define ABX8XX_WDT_BMB_SHIFT 2
  60. #define ABX8XX_WDT_MAX_TIME (ABX8XX_WDT_BMB_MASK >> ABX8XX_WDT_BMB_SHIFT)
  61. #define ABX8XX_WDT_WRB_MASK 0x03
  62. #define ABX8XX_WDT_WRB_1HZ 0x02
  63. #define ABX8XX_REG_CFG_KEY 0x1f
  64. #define ABX8XX_CFG_KEY_OSC 0xa1
  65. #define ABX8XX_CFG_KEY_MISC 0x9d
  66. #define ABX8XX_REG_ID0 0x28
  67. #define ABX8XX_REG_OUT_CTRL 0x30
  68. #define ABX8XX_OUT_CTRL_EXDS BIT(4)
  69. #define ABX8XX_REG_TRICKLE 0x20
  70. #define ABX8XX_TRICKLE_CHARGE_ENABLE 0xa0
  71. #define ABX8XX_TRICKLE_STANDARD_DIODE 0x8
  72. #define ABX8XX_TRICKLE_SCHOTTKY_DIODE 0x4
  73. static u8 trickle_resistors[] = {0, 3, 6, 11};
  74. enum abx80x_chip {AB0801, AB0803, AB0804, AB0805,
  75. AB1801, AB1803, AB1804, AB1805, RV1805, ABX80X};
  76. struct abx80x_cap {
  77. u16 pn;
  78. bool has_tc;
  79. bool has_wdog;
  80. };
  81. static struct abx80x_cap abx80x_caps[] = {
  82. [AB0801] = {.pn = 0x0801},
  83. [AB0803] = {.pn = 0x0803},
  84. [AB0804] = {.pn = 0x0804, .has_tc = true, .has_wdog = true},
  85. [AB0805] = {.pn = 0x0805, .has_tc = true, .has_wdog = true},
  86. [AB1801] = {.pn = 0x1801},
  87. [AB1803] = {.pn = 0x1803},
  88. [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true},
  89. [AB1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
  90. [RV1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
  91. [ABX80X] = {.pn = 0}
  92. };
  93. struct abx80x_priv {
  94. struct rtc_device *rtc;
  95. struct i2c_client *client;
  96. struct watchdog_device wdog;
  97. };
  98. static int abx80x_is_rc_mode(struct i2c_client *client)
  99. {
  100. int flags = 0;
  101. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
  102. if (flags < 0) {
  103. dev_err(&client->dev,
  104. "Failed to read autocalibration attribute\n");
  105. return flags;
  106. }
  107. return (flags & ABX8XX_OSS_OMODE) ? 1 : 0;
  108. }
  109. static int abx80x_enable_trickle_charger(struct i2c_client *client,
  110. u8 trickle_cfg)
  111. {
  112. int err;
  113. /*
  114. * Write the configuration key register to enable access to the Trickle
  115. * register
  116. */
  117. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
  118. ABX8XX_CFG_KEY_MISC);
  119. if (err < 0) {
  120. dev_err(&client->dev, "Unable to write configuration key\n");
  121. return -EIO;
  122. }
  123. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_TRICKLE,
  124. ABX8XX_TRICKLE_CHARGE_ENABLE |
  125. trickle_cfg);
  126. if (err < 0) {
  127. dev_err(&client->dev, "Unable to write trickle register\n");
  128. return -EIO;
  129. }
  130. return 0;
  131. }
  132. static int abx80x_rtc_read_time(struct device *dev, struct rtc_time *tm)
  133. {
  134. struct i2c_client *client = to_i2c_client(dev);
  135. unsigned char buf[8];
  136. int err, flags, rc_mode = 0;
  137. /* Read the Oscillator Failure only in XT mode */
  138. rc_mode = abx80x_is_rc_mode(client);
  139. if (rc_mode < 0)
  140. return rc_mode;
  141. if (!rc_mode) {
  142. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
  143. if (flags < 0)
  144. return flags;
  145. if (flags & ABX8XX_OSS_OF) {
  146. dev_err(dev, "Oscillator failure, data is invalid.\n");
  147. return -EINVAL;
  148. }
  149. }
  150. err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_HTH,
  151. sizeof(buf), buf);
  152. if (err < 0) {
  153. dev_err(&client->dev, "Unable to read date\n");
  154. return -EIO;
  155. }
  156. tm->tm_sec = bcd2bin(buf[ABX8XX_REG_SC] & 0x7F);
  157. tm->tm_min = bcd2bin(buf[ABX8XX_REG_MN] & 0x7F);
  158. tm->tm_hour = bcd2bin(buf[ABX8XX_REG_HR] & 0x3F);
  159. tm->tm_wday = buf[ABX8XX_REG_WD] & 0x7;
  160. tm->tm_mday = bcd2bin(buf[ABX8XX_REG_DA] & 0x3F);
  161. tm->tm_mon = bcd2bin(buf[ABX8XX_REG_MO] & 0x1F) - 1;
  162. tm->tm_year = bcd2bin(buf[ABX8XX_REG_YR]) + 100;
  163. return 0;
  164. }
  165. static int abx80x_rtc_set_time(struct device *dev, struct rtc_time *tm)
  166. {
  167. struct i2c_client *client = to_i2c_client(dev);
  168. unsigned char buf[8];
  169. int err, flags;
  170. if (tm->tm_year < 100)
  171. return -EINVAL;
  172. buf[ABX8XX_REG_HTH] = 0;
  173. buf[ABX8XX_REG_SC] = bin2bcd(tm->tm_sec);
  174. buf[ABX8XX_REG_MN] = bin2bcd(tm->tm_min);
  175. buf[ABX8XX_REG_HR] = bin2bcd(tm->tm_hour);
  176. buf[ABX8XX_REG_DA] = bin2bcd(tm->tm_mday);
  177. buf[ABX8XX_REG_MO] = bin2bcd(tm->tm_mon + 1);
  178. buf[ABX8XX_REG_YR] = bin2bcd(tm->tm_year - 100);
  179. buf[ABX8XX_REG_WD] = tm->tm_wday;
  180. err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_HTH,
  181. sizeof(buf), buf);
  182. if (err < 0) {
  183. dev_err(&client->dev, "Unable to write to date registers\n");
  184. return -EIO;
  185. }
  186. /* Clear the OF bit of Oscillator Status Register */
  187. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
  188. if (flags < 0)
  189. return flags;
  190. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSS,
  191. flags & ~ABX8XX_OSS_OF);
  192. if (err < 0) {
  193. dev_err(&client->dev, "Unable to write oscillator status register\n");
  194. return err;
  195. }
  196. return 0;
  197. }
  198. static irqreturn_t abx80x_handle_irq(int irq, void *dev_id)
  199. {
  200. struct i2c_client *client = dev_id;
  201. struct abx80x_priv *priv = i2c_get_clientdata(client);
  202. struct rtc_device *rtc = priv->rtc;
  203. int status;
  204. status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
  205. if (status < 0)
  206. return IRQ_NONE;
  207. if (status & ABX8XX_STATUS_AF)
  208. rtc_update_irq(rtc, 1, RTC_AF | RTC_IRQF);
  209. /*
  210. * It is unclear if we'll get an interrupt before the external
  211. * reset kicks in.
  212. */
  213. if (status & ABX8XX_STATUS_WDT)
  214. dev_alert(&client->dev, "watchdog timeout interrupt.\n");
  215. i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0);
  216. return IRQ_HANDLED;
  217. }
  218. static int abx80x_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  219. {
  220. struct i2c_client *client = to_i2c_client(dev);
  221. unsigned char buf[7];
  222. int irq_mask, err;
  223. if (client->irq <= 0)
  224. return -EINVAL;
  225. err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ASC,
  226. sizeof(buf), buf);
  227. if (err)
  228. return err;
  229. irq_mask = i2c_smbus_read_byte_data(client, ABX8XX_REG_IRQ);
  230. if (irq_mask < 0)
  231. return irq_mask;
  232. t->time.tm_sec = bcd2bin(buf[0] & 0x7F);
  233. t->time.tm_min = bcd2bin(buf[1] & 0x7F);
  234. t->time.tm_hour = bcd2bin(buf[2] & 0x3F);
  235. t->time.tm_mday = bcd2bin(buf[3] & 0x3F);
  236. t->time.tm_mon = bcd2bin(buf[4] & 0x1F) - 1;
  237. t->time.tm_wday = buf[5] & 0x7;
  238. t->enabled = !!(irq_mask & ABX8XX_IRQ_AIE);
  239. t->pending = (buf[6] & ABX8XX_STATUS_AF) && t->enabled;
  240. return err;
  241. }
  242. static int abx80x_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  243. {
  244. struct i2c_client *client = to_i2c_client(dev);
  245. u8 alarm[6];
  246. int err;
  247. if (client->irq <= 0)
  248. return -EINVAL;
  249. alarm[0] = 0x0;
  250. alarm[1] = bin2bcd(t->time.tm_sec);
  251. alarm[2] = bin2bcd(t->time.tm_min);
  252. alarm[3] = bin2bcd(t->time.tm_hour);
  253. alarm[4] = bin2bcd(t->time.tm_mday);
  254. alarm[5] = bin2bcd(t->time.tm_mon + 1);
  255. err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_AHTH,
  256. sizeof(alarm), alarm);
  257. if (err < 0) {
  258. dev_err(&client->dev, "Unable to write alarm registers\n");
  259. return -EIO;
  260. }
  261. if (t->enabled) {
  262. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
  263. (ABX8XX_IRQ_IM_1_4 |
  264. ABX8XX_IRQ_AIE));
  265. if (err)
  266. return err;
  267. }
  268. return 0;
  269. }
  270. static int abx80x_rtc_set_autocalibration(struct device *dev,
  271. int autocalibration)
  272. {
  273. struct i2c_client *client = to_i2c_client(dev);
  274. int retval, flags = 0;
  275. if ((autocalibration != 0) && (autocalibration != 1024) &&
  276. (autocalibration != 512)) {
  277. dev_err(dev, "autocalibration value outside permitted range\n");
  278. return -EINVAL;
  279. }
  280. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
  281. if (flags < 0)
  282. return flags;
  283. if (autocalibration == 0) {
  284. flags &= ~(ABX8XX_OSC_ACAL_512 | ABX8XX_OSC_ACAL_1024);
  285. } else if (autocalibration == 1024) {
  286. /* 1024 autocalibration is 0x10 */
  287. flags |= ABX8XX_OSC_ACAL_1024;
  288. flags &= ~(ABX8XX_OSC_ACAL_512);
  289. } else {
  290. /* 512 autocalibration is 0x11 */
  291. flags |= (ABX8XX_OSC_ACAL_1024 | ABX8XX_OSC_ACAL_512);
  292. }
  293. /* Unlock write access to Oscillator Control Register */
  294. retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
  295. ABX8XX_CFG_KEY_OSC);
  296. if (retval < 0) {
  297. dev_err(dev, "Failed to write CONFIG_KEY register\n");
  298. return retval;
  299. }
  300. retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags);
  301. return retval;
  302. }
  303. static int abx80x_rtc_get_autocalibration(struct device *dev)
  304. {
  305. struct i2c_client *client = to_i2c_client(dev);
  306. int flags = 0, autocalibration;
  307. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
  308. if (flags < 0)
  309. return flags;
  310. if (flags & ABX8XX_OSC_ACAL_512)
  311. autocalibration = 512;
  312. else if (flags & ABX8XX_OSC_ACAL_1024)
  313. autocalibration = 1024;
  314. else
  315. autocalibration = 0;
  316. return autocalibration;
  317. }
  318. static ssize_t autocalibration_store(struct device *dev,
  319. struct device_attribute *attr,
  320. const char *buf, size_t count)
  321. {
  322. int retval;
  323. unsigned long autocalibration = 0;
  324. retval = kstrtoul(buf, 10, &autocalibration);
  325. if (retval < 0) {
  326. dev_err(dev, "Failed to store RTC autocalibration attribute\n");
  327. return -EINVAL;
  328. }
  329. retval = abx80x_rtc_set_autocalibration(dev->parent, autocalibration);
  330. return retval ? retval : count;
  331. }
  332. static ssize_t autocalibration_show(struct device *dev,
  333. struct device_attribute *attr, char *buf)
  334. {
  335. int autocalibration = 0;
  336. autocalibration = abx80x_rtc_get_autocalibration(dev->parent);
  337. if (autocalibration < 0) {
  338. dev_err(dev, "Failed to read RTC autocalibration\n");
  339. sprintf(buf, "0\n");
  340. return autocalibration;
  341. }
  342. return sprintf(buf, "%d\n", autocalibration);
  343. }
  344. static DEVICE_ATTR_RW(autocalibration);
  345. static ssize_t oscillator_store(struct device *dev,
  346. struct device_attribute *attr,
  347. const char *buf, size_t count)
  348. {
  349. struct i2c_client *client = to_i2c_client(dev->parent);
  350. int retval, flags, rc_mode = 0;
  351. if (strncmp(buf, "rc", 2) == 0) {
  352. rc_mode = 1;
  353. } else if (strncmp(buf, "xtal", 4) == 0) {
  354. rc_mode = 0;
  355. } else {
  356. dev_err(dev, "Oscillator selection value outside permitted ones\n");
  357. return -EINVAL;
  358. }
  359. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
  360. if (flags < 0)
  361. return flags;
  362. if (rc_mode == 0)
  363. flags &= ~(ABX8XX_OSC_OSEL);
  364. else
  365. flags |= (ABX8XX_OSC_OSEL);
  366. /* Unlock write access on Oscillator Control register */
  367. retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
  368. ABX8XX_CFG_KEY_OSC);
  369. if (retval < 0) {
  370. dev_err(dev, "Failed to write CONFIG_KEY register\n");
  371. return retval;
  372. }
  373. retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags);
  374. if (retval < 0) {
  375. dev_err(dev, "Failed to write Oscillator Control register\n");
  376. return retval;
  377. }
  378. return retval ? retval : count;
  379. }
  380. static ssize_t oscillator_show(struct device *dev,
  381. struct device_attribute *attr, char *buf)
  382. {
  383. int rc_mode = 0;
  384. struct i2c_client *client = to_i2c_client(dev->parent);
  385. rc_mode = abx80x_is_rc_mode(client);
  386. if (rc_mode < 0) {
  387. dev_err(dev, "Failed to read RTC oscillator selection\n");
  388. sprintf(buf, "\n");
  389. return rc_mode;
  390. }
  391. if (rc_mode)
  392. return sprintf(buf, "rc\n");
  393. else
  394. return sprintf(buf, "xtal\n");
  395. }
  396. static DEVICE_ATTR_RW(oscillator);
  397. static struct attribute *rtc_calib_attrs[] = {
  398. &dev_attr_autocalibration.attr,
  399. &dev_attr_oscillator.attr,
  400. NULL,
  401. };
  402. static const struct attribute_group rtc_calib_attr_group = {
  403. .attrs = rtc_calib_attrs,
  404. };
  405. static int abx80x_alarm_irq_enable(struct device *dev, unsigned int enabled)
  406. {
  407. struct i2c_client *client = to_i2c_client(dev);
  408. int err;
  409. if (enabled)
  410. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
  411. (ABX8XX_IRQ_IM_1_4 |
  412. ABX8XX_IRQ_AIE));
  413. else
  414. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
  415. ABX8XX_IRQ_IM_1_4);
  416. return err;
  417. }
  418. static int abx80x_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  419. {
  420. struct i2c_client *client = to_i2c_client(dev);
  421. int status, tmp;
  422. switch (cmd) {
  423. case RTC_VL_READ:
  424. status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
  425. if (status < 0)
  426. return status;
  427. tmp = status & ABX8XX_STATUS_BLF ? RTC_VL_BACKUP_LOW : 0;
  428. return put_user(tmp, (unsigned int __user *)arg);
  429. case RTC_VL_CLR:
  430. status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
  431. if (status < 0)
  432. return status;
  433. status &= ~ABX8XX_STATUS_BLF;
  434. tmp = i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0);
  435. if (tmp < 0)
  436. return tmp;
  437. return 0;
  438. default:
  439. return -ENOIOCTLCMD;
  440. }
  441. }
  442. static const struct rtc_class_ops abx80x_rtc_ops = {
  443. .read_time = abx80x_rtc_read_time,
  444. .set_time = abx80x_rtc_set_time,
  445. .read_alarm = abx80x_read_alarm,
  446. .set_alarm = abx80x_set_alarm,
  447. .alarm_irq_enable = abx80x_alarm_irq_enable,
  448. .ioctl = abx80x_ioctl,
  449. };
  450. static int abx80x_dt_trickle_cfg(struct i2c_client *client)
  451. {
  452. struct device_node *np = client->dev.of_node;
  453. const char *diode;
  454. int trickle_cfg = 0;
  455. int i, ret;
  456. u32 tmp;
  457. ret = of_property_read_string(np, "abracon,tc-diode", &diode);
  458. if (ret)
  459. return ret;
  460. if (!strcmp(diode, "standard")) {
  461. trickle_cfg |= ABX8XX_TRICKLE_STANDARD_DIODE;
  462. } else if (!strcmp(diode, "schottky")) {
  463. trickle_cfg |= ABX8XX_TRICKLE_SCHOTTKY_DIODE;
  464. } else {
  465. dev_dbg(&client->dev, "Invalid tc-diode value: %s\n", diode);
  466. return -EINVAL;
  467. }
  468. ret = of_property_read_u32(np, "abracon,tc-resistor", &tmp);
  469. if (ret)
  470. return ret;
  471. for (i = 0; i < sizeof(trickle_resistors); i++)
  472. if (trickle_resistors[i] == tmp)
  473. break;
  474. if (i == sizeof(trickle_resistors)) {
  475. dev_dbg(&client->dev, "Invalid tc-resistor value: %u\n", tmp);
  476. return -EINVAL;
  477. }
  478. return (trickle_cfg | i);
  479. }
  480. #ifdef CONFIG_WATCHDOG
  481. static inline u8 timeout_bits(unsigned int timeout)
  482. {
  483. return ((timeout << ABX8XX_WDT_BMB_SHIFT) & ABX8XX_WDT_BMB_MASK) |
  484. ABX8XX_WDT_WRB_1HZ;
  485. }
  486. static int __abx80x_wdog_set_timeout(struct watchdog_device *wdog,
  487. unsigned int timeout)
  488. {
  489. struct abx80x_priv *priv = watchdog_get_drvdata(wdog);
  490. u8 val = ABX8XX_WDT_WDS | timeout_bits(timeout);
  491. /*
  492. * Writing any timeout to the WDT register resets the watchdog timer.
  493. * Writing 0 disables it.
  494. */
  495. return i2c_smbus_write_byte_data(priv->client, ABX8XX_REG_WDT, val);
  496. }
  497. static int abx80x_wdog_set_timeout(struct watchdog_device *wdog,
  498. unsigned int new_timeout)
  499. {
  500. int err = 0;
  501. if (watchdog_hw_running(wdog))
  502. err = __abx80x_wdog_set_timeout(wdog, new_timeout);
  503. if (err == 0)
  504. wdog->timeout = new_timeout;
  505. return err;
  506. }
  507. static int abx80x_wdog_ping(struct watchdog_device *wdog)
  508. {
  509. return __abx80x_wdog_set_timeout(wdog, wdog->timeout);
  510. }
  511. static int abx80x_wdog_start(struct watchdog_device *wdog)
  512. {
  513. return __abx80x_wdog_set_timeout(wdog, wdog->timeout);
  514. }
  515. static int abx80x_wdog_stop(struct watchdog_device *wdog)
  516. {
  517. return __abx80x_wdog_set_timeout(wdog, 0);
  518. }
  519. static const struct watchdog_info abx80x_wdog_info = {
  520. .identity = "abx80x watchdog",
  521. .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
  522. };
  523. static const struct watchdog_ops abx80x_wdog_ops = {
  524. .owner = THIS_MODULE,
  525. .start = abx80x_wdog_start,
  526. .stop = abx80x_wdog_stop,
  527. .ping = abx80x_wdog_ping,
  528. .set_timeout = abx80x_wdog_set_timeout,
  529. };
  530. static int abx80x_setup_watchdog(struct abx80x_priv *priv)
  531. {
  532. priv->wdog.parent = &priv->client->dev;
  533. priv->wdog.ops = &abx80x_wdog_ops;
  534. priv->wdog.info = &abx80x_wdog_info;
  535. priv->wdog.min_timeout = 1;
  536. priv->wdog.max_timeout = ABX8XX_WDT_MAX_TIME;
  537. priv->wdog.timeout = ABX8XX_WDT_MAX_TIME;
  538. watchdog_set_drvdata(&priv->wdog, priv);
  539. return devm_watchdog_register_device(&priv->client->dev, &priv->wdog);
  540. }
  541. #else
  542. static int abx80x_setup_watchdog(struct abx80x_priv *priv)
  543. {
  544. return 0;
  545. }
  546. #endif
  547. static int abx80x_probe(struct i2c_client *client,
  548. const struct i2c_device_id *id)
  549. {
  550. struct device_node *np = client->dev.of_node;
  551. struct abx80x_priv *priv;
  552. int i, data, err, trickle_cfg = -EINVAL;
  553. char buf[7];
  554. unsigned int part = id->driver_data;
  555. unsigned int partnumber;
  556. unsigned int majrev, minrev;
  557. unsigned int lot;
  558. unsigned int wafer;
  559. unsigned int uid;
  560. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  561. return -ENODEV;
  562. err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ID0,
  563. sizeof(buf), buf);
  564. if (err < 0) {
  565. dev_err(&client->dev, "Unable to read partnumber\n");
  566. return -EIO;
  567. }
  568. partnumber = (buf[0] << 8) | buf[1];
  569. majrev = buf[2] >> 3;
  570. minrev = buf[2] & 0x7;
  571. lot = ((buf[4] & 0x80) << 2) | ((buf[6] & 0x80) << 1) | buf[3];
  572. uid = ((buf[4] & 0x7f) << 8) | buf[5];
  573. wafer = (buf[6] & 0x7c) >> 2;
  574. dev_info(&client->dev, "model %04x, revision %u.%u, lot %x, wafer %x, uid %x\n",
  575. partnumber, majrev, minrev, lot, wafer, uid);
  576. data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL1);
  577. if (data < 0) {
  578. dev_err(&client->dev, "Unable to read control register\n");
  579. return -EIO;
  580. }
  581. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL1,
  582. ((data & ~(ABX8XX_CTRL_12_24 |
  583. ABX8XX_CTRL_ARST)) |
  584. ABX8XX_CTRL_WRITE));
  585. if (err < 0) {
  586. dev_err(&client->dev, "Unable to write control register\n");
  587. return -EIO;
  588. }
  589. /* Configure RV1805 specifics */
  590. if (part == RV1805) {
  591. /*
  592. * Avoid accidentally entering test mode. This can happen
  593. * on the RV1805 in case the reserved bit 5 in control2
  594. * register is set. RV-1805-C3 datasheet indicates that
  595. * the bit should be cleared in section 11h - Control2.
  596. */
  597. data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL2);
  598. if (data < 0) {
  599. dev_err(&client->dev,
  600. "Unable to read control2 register\n");
  601. return -EIO;
  602. }
  603. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL2,
  604. data & ~ABX8XX_CTRL2_RSVD);
  605. if (err < 0) {
  606. dev_err(&client->dev,
  607. "Unable to write control2 register\n");
  608. return -EIO;
  609. }
  610. /*
  611. * Avoid extra power leakage. The RV1805 uses smaller
  612. * 10pin package and the EXTI input is not present.
  613. * Disable it to avoid leakage.
  614. */
  615. data = i2c_smbus_read_byte_data(client, ABX8XX_REG_OUT_CTRL);
  616. if (data < 0) {
  617. dev_err(&client->dev,
  618. "Unable to read output control register\n");
  619. return -EIO;
  620. }
  621. /*
  622. * Write the configuration key register to enable access to
  623. * the config2 register
  624. */
  625. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
  626. ABX8XX_CFG_KEY_MISC);
  627. if (err < 0) {
  628. dev_err(&client->dev,
  629. "Unable to write configuration key\n");
  630. return -EIO;
  631. }
  632. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OUT_CTRL,
  633. data | ABX8XX_OUT_CTRL_EXDS);
  634. if (err < 0) {
  635. dev_err(&client->dev,
  636. "Unable to write output control register\n");
  637. return -EIO;
  638. }
  639. }
  640. /* part autodetection */
  641. if (part == ABX80X) {
  642. for (i = 0; abx80x_caps[i].pn; i++)
  643. if (partnumber == abx80x_caps[i].pn)
  644. break;
  645. if (abx80x_caps[i].pn == 0) {
  646. dev_err(&client->dev, "Unknown part: %04x\n",
  647. partnumber);
  648. return -EINVAL;
  649. }
  650. part = i;
  651. }
  652. if (partnumber != abx80x_caps[part].pn) {
  653. dev_err(&client->dev, "partnumber mismatch %04x != %04x\n",
  654. partnumber, abx80x_caps[part].pn);
  655. return -EINVAL;
  656. }
  657. if (np && abx80x_caps[part].has_tc)
  658. trickle_cfg = abx80x_dt_trickle_cfg(client);
  659. if (trickle_cfg > 0) {
  660. dev_info(&client->dev, "Enabling trickle charger: %02x\n",
  661. trickle_cfg);
  662. abx80x_enable_trickle_charger(client, trickle_cfg);
  663. }
  664. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CD_TIMER_CTL,
  665. BIT(2));
  666. if (err)
  667. return err;
  668. priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
  669. if (priv == NULL)
  670. return -ENOMEM;
  671. priv->rtc = devm_rtc_allocate_device(&client->dev);
  672. if (IS_ERR(priv->rtc))
  673. return PTR_ERR(priv->rtc);
  674. priv->rtc->ops = &abx80x_rtc_ops;
  675. priv->client = client;
  676. i2c_set_clientdata(client, priv);
  677. if (abx80x_caps[part].has_wdog) {
  678. err = abx80x_setup_watchdog(priv);
  679. if (err)
  680. return err;
  681. }
  682. if (client->irq > 0) {
  683. dev_info(&client->dev, "IRQ %d supplied\n", client->irq);
  684. err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
  685. abx80x_handle_irq,
  686. IRQF_SHARED | IRQF_ONESHOT,
  687. "abx8xx",
  688. client);
  689. if (err) {
  690. dev_err(&client->dev, "unable to request IRQ, alarms disabled\n");
  691. client->irq = 0;
  692. }
  693. }
  694. err = rtc_add_group(priv->rtc, &rtc_calib_attr_group);
  695. if (err) {
  696. dev_err(&client->dev, "Failed to create sysfs group: %d\n",
  697. err);
  698. return err;
  699. }
  700. return rtc_register_device(priv->rtc);
  701. }
  702. static const struct i2c_device_id abx80x_id[] = {
  703. { "abx80x", ABX80X },
  704. { "ab0801", AB0801 },
  705. { "ab0803", AB0803 },
  706. { "ab0804", AB0804 },
  707. { "ab0805", AB0805 },
  708. { "ab1801", AB1801 },
  709. { "ab1803", AB1803 },
  710. { "ab1804", AB1804 },
  711. { "ab1805", AB1805 },
  712. { "rv1805", RV1805 },
  713. { }
  714. };
  715. MODULE_DEVICE_TABLE(i2c, abx80x_id);
  716. #ifdef CONFIG_OF
  717. static const struct of_device_id abx80x_of_match[] = {
  718. {
  719. .compatible = "abracon,abx80x",
  720. .data = (void *)ABX80X
  721. },
  722. {
  723. .compatible = "abracon,ab0801",
  724. .data = (void *)AB0801
  725. },
  726. {
  727. .compatible = "abracon,ab0803",
  728. .data = (void *)AB0803
  729. },
  730. {
  731. .compatible = "abracon,ab0804",
  732. .data = (void *)AB0804
  733. },
  734. {
  735. .compatible = "abracon,ab0805",
  736. .data = (void *)AB0805
  737. },
  738. {
  739. .compatible = "abracon,ab1801",
  740. .data = (void *)AB1801
  741. },
  742. {
  743. .compatible = "abracon,ab1803",
  744. .data = (void *)AB1803
  745. },
  746. {
  747. .compatible = "abracon,ab1804",
  748. .data = (void *)AB1804
  749. },
  750. {
  751. .compatible = "abracon,ab1805",
  752. .data = (void *)AB1805
  753. },
  754. {
  755. .compatible = "microcrystal,rv1805",
  756. .data = (void *)RV1805
  757. },
  758. { }
  759. };
  760. MODULE_DEVICE_TABLE(of, abx80x_of_match);
  761. #endif
  762. static struct i2c_driver abx80x_driver = {
  763. .driver = {
  764. .name = "rtc-abx80x",
  765. .of_match_table = of_match_ptr(abx80x_of_match),
  766. },
  767. .probe = abx80x_probe,
  768. .id_table = abx80x_id,
  769. };
  770. module_i2c_driver(abx80x_driver);
  771. MODULE_AUTHOR("Philippe De Muyter <phdm@macqel.be>");
  772. MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
  773. MODULE_DESCRIPTION("Abracon ABX80X RTC driver");
  774. MODULE_LICENSE("GPL v2");