reset-socfpga.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2018, Intel Corporation
  4. * Copied from reset-sunxi.c
  5. */
  6. #include <linux/err.h>
  7. #include <linux/io.h>
  8. #include <linux/init.h>
  9. #include <linux/of.h>
  10. #include <linux/of_address.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/reset-controller.h>
  13. #include <linux/reset/reset-simple.h>
  14. #include <linux/reset/socfpga.h>
  15. #include <linux/slab.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/types.h>
  18. #define SOCFPGA_NR_BANKS 8
  19. static int a10_reset_init(struct device_node *np)
  20. {
  21. struct reset_simple_data *data;
  22. struct resource res;
  23. resource_size_t size;
  24. int ret;
  25. u32 reg_offset = 0x10;
  26. data = kzalloc(sizeof(*data), GFP_KERNEL);
  27. if (!data)
  28. return -ENOMEM;
  29. ret = of_address_to_resource(np, 0, &res);
  30. if (ret)
  31. goto err_alloc;
  32. size = resource_size(&res);
  33. if (!request_mem_region(res.start, size, np->name)) {
  34. ret = -EBUSY;
  35. goto err_alloc;
  36. }
  37. data->membase = ioremap(res.start, size);
  38. if (!data->membase) {
  39. ret = -ENOMEM;
  40. goto err_alloc;
  41. }
  42. if (of_property_read_u32(np, "altr,modrst-offset", &reg_offset))
  43. pr_warn("missing altr,modrst-offset property, assuming 0x10\n");
  44. data->membase += reg_offset;
  45. spin_lock_init(&data->lock);
  46. data->rcdev.owner = THIS_MODULE;
  47. data->rcdev.nr_resets = SOCFPGA_NR_BANKS * 32;
  48. data->rcdev.ops = &reset_simple_ops;
  49. data->rcdev.of_node = np;
  50. data->status_active_low = true;
  51. return reset_controller_register(&data->rcdev);
  52. err_alloc:
  53. kfree(data);
  54. return ret;
  55. };
  56. /*
  57. * These are the reset controller we need to initialize early on in
  58. * our system, before we can even think of using a regular device
  59. * driver for it.
  60. * The controllers that we can register through the regular device
  61. * model are handled by the simple reset driver directly.
  62. */
  63. static const struct of_device_id socfpga_early_reset_dt_ids[] __initconst = {
  64. { .compatible = "altr,rst-mgr", },
  65. { /* sentinel */ },
  66. };
  67. void __init socfpga_reset_init(void)
  68. {
  69. struct device_node *np;
  70. for_each_matching_node(np, socfpga_early_reset_dt_ids)
  71. a10_reset_init(np);
  72. }
  73. /*
  74. * The early driver is problematic, because it doesn't register
  75. * itself as a driver. This causes certain device links to prevent
  76. * consumer devices from probing. The hacky solution is to register
  77. * an empty driver, whose only job is to attach itself to the reset
  78. * manager and call probe.
  79. */
  80. static const struct of_device_id socfpga_reset_dt_ids[] = {
  81. { .compatible = "altr,rst-mgr", },
  82. { /* sentinel */ },
  83. };
  84. static int reset_simple_probe(struct platform_device *pdev)
  85. {
  86. return 0;
  87. }
  88. static struct platform_driver reset_socfpga_driver = {
  89. .probe = reset_simple_probe,
  90. .driver = {
  91. .name = "socfpga-reset",
  92. .of_match_table = socfpga_reset_dt_ids,
  93. },
  94. };
  95. builtin_platform_driver(reset_socfpga_driver);