reset-a10sr.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright Intel Corporation (C) 2017. All Rights Reserved
  4. *
  5. * Reset driver for Altera Arria10 MAX5 System Resource Chip
  6. *
  7. * Adapted from reset-socfpga.c
  8. */
  9. #include <linux/err.h>
  10. #include <linux/mfd/altera-a10sr.h>
  11. #include <linux/module.h>
  12. #include <linux/of.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/reset-controller.h>
  15. #include <dt-bindings/reset/altr,rst-mgr-a10sr.h>
  16. struct a10sr_reset {
  17. struct reset_controller_dev rcdev;
  18. struct regmap *regmap;
  19. };
  20. static inline struct a10sr_reset *to_a10sr_rst(struct reset_controller_dev *rc)
  21. {
  22. return container_of(rc, struct a10sr_reset, rcdev);
  23. }
  24. static inline int a10sr_reset_shift(unsigned long id)
  25. {
  26. switch (id) {
  27. case A10SR_RESET_ENET_HPS:
  28. return 1;
  29. case A10SR_RESET_PCIE:
  30. case A10SR_RESET_FILE:
  31. case A10SR_RESET_BQSPI:
  32. case A10SR_RESET_USB:
  33. return id + 11;
  34. default:
  35. return -EINVAL;
  36. }
  37. }
  38. static int a10sr_reset_update(struct reset_controller_dev *rcdev,
  39. unsigned long id, bool assert)
  40. {
  41. struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
  42. int offset = a10sr_reset_shift(id);
  43. u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
  44. int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
  45. return regmap_update_bits(a10r->regmap, index, mask, assert ? 0 : mask);
  46. }
  47. static int a10sr_reset_assert(struct reset_controller_dev *rcdev,
  48. unsigned long id)
  49. {
  50. return a10sr_reset_update(rcdev, id, true);
  51. }
  52. static int a10sr_reset_deassert(struct reset_controller_dev *rcdev,
  53. unsigned long id)
  54. {
  55. return a10sr_reset_update(rcdev, id, false);
  56. }
  57. static int a10sr_reset_status(struct reset_controller_dev *rcdev,
  58. unsigned long id)
  59. {
  60. int ret;
  61. struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
  62. int offset = a10sr_reset_shift(id);
  63. u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
  64. int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
  65. unsigned int value;
  66. ret = regmap_read(a10r->regmap, index, &value);
  67. if (ret < 0)
  68. return ret;
  69. return !!(value & mask);
  70. }
  71. static const struct reset_control_ops a10sr_reset_ops = {
  72. .assert = a10sr_reset_assert,
  73. .deassert = a10sr_reset_deassert,
  74. .status = a10sr_reset_status,
  75. };
  76. static int a10sr_reset_probe(struct platform_device *pdev)
  77. {
  78. struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent);
  79. struct a10sr_reset *a10r;
  80. a10r = devm_kzalloc(&pdev->dev, sizeof(struct a10sr_reset),
  81. GFP_KERNEL);
  82. if (!a10r)
  83. return -ENOMEM;
  84. a10r->rcdev.owner = THIS_MODULE;
  85. a10r->rcdev.nr_resets = A10SR_RESET_NUM;
  86. a10r->rcdev.ops = &a10sr_reset_ops;
  87. a10r->rcdev.of_node = pdev->dev.of_node;
  88. a10r->regmap = a10sr->regmap;
  89. platform_set_drvdata(pdev, a10r);
  90. return devm_reset_controller_register(&pdev->dev, &a10r->rcdev);
  91. }
  92. static const struct of_device_id a10sr_reset_of_match[] = {
  93. { .compatible = "altr,a10sr-reset" },
  94. { },
  95. };
  96. MODULE_DEVICE_TABLE(of, a10sr_reset_of_match);
  97. static struct platform_driver a10sr_reset_driver = {
  98. .probe = a10sr_reset_probe,
  99. .driver = {
  100. .name = "altr_a10sr_reset",
  101. .of_match_table = a10sr_reset_of_match,
  102. },
  103. };
  104. module_platform_driver(a10sr_reset_driver);
  105. MODULE_AUTHOR("Thor Thayer <thor.thayer@linux.intel.com>");
  106. MODULE_DESCRIPTION("Altera Arria10 System Resource Reset Controller Driver");
  107. MODULE_LICENSE("GPL v2");