wm831x-dcdc.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. //
  3. // wm831x-dcdc.c -- DC-DC buck converter driver for the WM831x series
  4. //
  5. // Copyright 2009 Wolfson Microelectronics PLC.
  6. //
  7. // Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  8. #include <linux/module.h>
  9. #include <linux/moduleparam.h>
  10. #include <linux/init.h>
  11. #include <linux/bitops.h>
  12. #include <linux/err.h>
  13. #include <linux/i2c.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/regulator/driver.h>
  16. #include <linux/regulator/machine.h>
  17. #include <linux/gpio/consumer.h>
  18. #include <linux/slab.h>
  19. #include <linux/mfd/wm831x/core.h>
  20. #include <linux/mfd/wm831x/regulator.h>
  21. #include <linux/mfd/wm831x/pdata.h>
  22. #define WM831X_BUCKV_MAX_SELECTOR 0x68
  23. #define WM831X_BUCKP_MAX_SELECTOR 0x66
  24. #define WM831X_DCDC_MODE_FAST 0
  25. #define WM831X_DCDC_MODE_NORMAL 1
  26. #define WM831X_DCDC_MODE_IDLE 2
  27. #define WM831X_DCDC_MODE_STANDBY 3
  28. #define WM831X_DCDC_MAX_NAME 9
  29. /* Register offsets in control block */
  30. #define WM831X_DCDC_CONTROL_1 0
  31. #define WM831X_DCDC_CONTROL_2 1
  32. #define WM831X_DCDC_ON_CONFIG 2
  33. #define WM831X_DCDC_SLEEP_CONTROL 3
  34. #define WM831X_DCDC_DVS_CONTROL 4
  35. /*
  36. * Shared
  37. */
  38. struct wm831x_dcdc {
  39. char name[WM831X_DCDC_MAX_NAME];
  40. char supply_name[WM831X_DCDC_MAX_NAME];
  41. struct regulator_desc desc;
  42. int base;
  43. struct wm831x *wm831x;
  44. struct regulator_dev *regulator;
  45. struct gpio_desc *dvs_gpiod;
  46. int dvs_gpio_state;
  47. int on_vsel;
  48. int dvs_vsel;
  49. };
  50. static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
  51. {
  52. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  53. struct wm831x *wm831x = dcdc->wm831x;
  54. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  55. int val;
  56. val = wm831x_reg_read(wm831x, reg);
  57. if (val < 0)
  58. return val;
  59. val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
  60. switch (val) {
  61. case WM831X_DCDC_MODE_FAST:
  62. return REGULATOR_MODE_FAST;
  63. case WM831X_DCDC_MODE_NORMAL:
  64. return REGULATOR_MODE_NORMAL;
  65. case WM831X_DCDC_MODE_STANDBY:
  66. return REGULATOR_MODE_STANDBY;
  67. case WM831X_DCDC_MODE_IDLE:
  68. return REGULATOR_MODE_IDLE;
  69. default:
  70. BUG();
  71. return -EINVAL;
  72. }
  73. }
  74. static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
  75. unsigned int mode)
  76. {
  77. int val;
  78. switch (mode) {
  79. case REGULATOR_MODE_FAST:
  80. val = WM831X_DCDC_MODE_FAST;
  81. break;
  82. case REGULATOR_MODE_NORMAL:
  83. val = WM831X_DCDC_MODE_NORMAL;
  84. break;
  85. case REGULATOR_MODE_STANDBY:
  86. val = WM831X_DCDC_MODE_STANDBY;
  87. break;
  88. case REGULATOR_MODE_IDLE:
  89. val = WM831X_DCDC_MODE_IDLE;
  90. break;
  91. default:
  92. return -EINVAL;
  93. }
  94. return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
  95. val << WM831X_DC1_ON_MODE_SHIFT);
  96. }
  97. static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
  98. {
  99. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  100. struct wm831x *wm831x = dcdc->wm831x;
  101. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  102. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  103. }
  104. static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
  105. unsigned int mode)
  106. {
  107. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  108. struct wm831x *wm831x = dcdc->wm831x;
  109. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  110. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  111. }
  112. static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
  113. {
  114. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  115. struct wm831x *wm831x = dcdc->wm831x;
  116. int ret;
  117. /* First, check for errors */
  118. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  119. if (ret < 0)
  120. return ret;
  121. if (ret & (1 << rdev_get_id(rdev))) {
  122. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  123. rdev_get_id(rdev) + 1);
  124. return REGULATOR_STATUS_ERROR;
  125. }
  126. /* DCDC1 and DCDC2 can additionally detect high voltage/current */
  127. if (rdev_get_id(rdev) < 2) {
  128. if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
  129. dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
  130. rdev_get_id(rdev) + 1);
  131. return REGULATOR_STATUS_ERROR;
  132. }
  133. if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
  134. dev_dbg(wm831x->dev, "DCDC%d over current\n",
  135. rdev_get_id(rdev) + 1);
  136. return REGULATOR_STATUS_ERROR;
  137. }
  138. }
  139. /* Is the regulator on? */
  140. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  141. if (ret < 0)
  142. return ret;
  143. if (!(ret & (1 << rdev_get_id(rdev))))
  144. return REGULATOR_STATUS_OFF;
  145. /* TODO: When we handle hardware control modes so we can report the
  146. * current mode. */
  147. return REGULATOR_STATUS_ON;
  148. }
  149. static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
  150. {
  151. struct wm831x_dcdc *dcdc = data;
  152. regulator_notifier_call_chain(dcdc->regulator,
  153. REGULATOR_EVENT_UNDER_VOLTAGE,
  154. NULL);
  155. return IRQ_HANDLED;
  156. }
  157. static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
  158. {
  159. struct wm831x_dcdc *dcdc = data;
  160. regulator_notifier_call_chain(dcdc->regulator,
  161. REGULATOR_EVENT_OVER_CURRENT,
  162. NULL);
  163. return IRQ_HANDLED;
  164. }
  165. /*
  166. * BUCKV specifics
  167. */
  168. static const struct linear_range wm831x_buckv_ranges[] = {
  169. REGULATOR_LINEAR_RANGE(600000, 0, 0x7, 0),
  170. REGULATOR_LINEAR_RANGE(600000, 0x8, 0x68, 12500),
  171. };
  172. static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
  173. {
  174. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  175. if (state == dcdc->dvs_gpio_state)
  176. return 0;
  177. dcdc->dvs_gpio_state = state;
  178. gpiod_set_value(dcdc->dvs_gpiod, state);
  179. /* Should wait for DVS state change to be asserted if we have
  180. * a GPIO for it, for now assume the device is configured
  181. * for the fastest possible transition.
  182. */
  183. return 0;
  184. }
  185. static int wm831x_buckv_set_voltage_sel(struct regulator_dev *rdev,
  186. unsigned vsel)
  187. {
  188. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  189. struct wm831x *wm831x = dcdc->wm831x;
  190. int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  191. int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
  192. int ret;
  193. /* If this value is already set then do a GPIO update if we can */
  194. if (dcdc->dvs_gpiod && dcdc->on_vsel == vsel)
  195. return wm831x_buckv_set_dvs(rdev, 0);
  196. if (dcdc->dvs_gpiod && dcdc->dvs_vsel == vsel)
  197. return wm831x_buckv_set_dvs(rdev, 1);
  198. /* Always set the ON status to the minimum voltage */
  199. ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
  200. if (ret < 0)
  201. return ret;
  202. dcdc->on_vsel = vsel;
  203. if (!dcdc->dvs_gpiod)
  204. return ret;
  205. /* Kick the voltage transition now */
  206. ret = wm831x_buckv_set_dvs(rdev, 0);
  207. if (ret < 0)
  208. return ret;
  209. /*
  210. * If this VSEL is higher than the last one we've seen then
  211. * remember it as the DVS VSEL. This is optimised for CPUfreq
  212. * usage where we want to get to the highest voltage very
  213. * quickly.
  214. */
  215. if (vsel > dcdc->dvs_vsel) {
  216. ret = wm831x_set_bits(wm831x, dvs_reg,
  217. WM831X_DC1_DVS_VSEL_MASK,
  218. vsel);
  219. if (ret == 0)
  220. dcdc->dvs_vsel = vsel;
  221. else
  222. dev_warn(wm831x->dev,
  223. "Failed to set DCDC DVS VSEL: %d\n", ret);
  224. }
  225. return 0;
  226. }
  227. static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
  228. int uV)
  229. {
  230. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  231. struct wm831x *wm831x = dcdc->wm831x;
  232. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  233. int vsel;
  234. vsel = regulator_map_voltage_linear_range(rdev, uV, uV);
  235. if (vsel < 0)
  236. return vsel;
  237. return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
  238. }
  239. static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
  240. {
  241. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  242. if (dcdc->dvs_gpiod && dcdc->dvs_gpio_state)
  243. return dcdc->dvs_vsel;
  244. else
  245. return dcdc->on_vsel;
  246. }
  247. /* Current limit options */
  248. static const unsigned int wm831x_dcdc_ilim[] = {
  249. 125000, 250000, 375000, 500000, 625000, 750000, 875000, 1000000
  250. };
  251. static const struct regulator_ops wm831x_buckv_ops = {
  252. .set_voltage_sel = wm831x_buckv_set_voltage_sel,
  253. .get_voltage_sel = wm831x_buckv_get_voltage_sel,
  254. .list_voltage = regulator_list_voltage_linear_range,
  255. .map_voltage = regulator_map_voltage_linear_range,
  256. .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
  257. .set_current_limit = regulator_set_current_limit_regmap,
  258. .get_current_limit = regulator_get_current_limit_regmap,
  259. .is_enabled = regulator_is_enabled_regmap,
  260. .enable = regulator_enable_regmap,
  261. .disable = regulator_disable_regmap,
  262. .get_status = wm831x_dcdc_get_status,
  263. .get_mode = wm831x_dcdc_get_mode,
  264. .set_mode = wm831x_dcdc_set_mode,
  265. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  266. };
  267. /*
  268. * Set up DVS control. We just log errors since we can still run
  269. * (with reduced performance) if we fail.
  270. */
  271. static void wm831x_buckv_dvs_init(struct platform_device *pdev,
  272. struct wm831x_dcdc *dcdc,
  273. struct wm831x_buckv_pdata *pdata)
  274. {
  275. struct wm831x *wm831x = dcdc->wm831x;
  276. int ret;
  277. u16 ctrl;
  278. if (!pdata)
  279. return;
  280. /* gpiolib won't let us read the GPIO status so pick the higher
  281. * of the two existing voltages so we take it as platform data.
  282. */
  283. dcdc->dvs_gpio_state = pdata->dvs_init_state;
  284. dcdc->dvs_gpiod = devm_gpiod_get(&pdev->dev, "dvs",
  285. dcdc->dvs_gpio_state ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW);
  286. if (IS_ERR(dcdc->dvs_gpiod)) {
  287. dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %ld\n",
  288. dcdc->name, PTR_ERR(dcdc->dvs_gpiod));
  289. return;
  290. }
  291. switch (pdata->dvs_control_src) {
  292. case 1:
  293. ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
  294. break;
  295. case 2:
  296. ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
  297. break;
  298. default:
  299. dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
  300. pdata->dvs_control_src, dcdc->name);
  301. return;
  302. }
  303. /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
  304. * to make bootstrapping a bit smoother.
  305. */
  306. if (!dcdc->dvs_vsel) {
  307. ret = wm831x_set_bits(wm831x,
  308. dcdc->base + WM831X_DCDC_DVS_CONTROL,
  309. WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
  310. if (ret == 0)
  311. dcdc->dvs_vsel = dcdc->on_vsel;
  312. else
  313. dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
  314. ret);
  315. }
  316. ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
  317. WM831X_DC1_DVS_SRC_MASK, ctrl);
  318. if (ret < 0) {
  319. dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
  320. dcdc->name, ret);
  321. }
  322. }
  323. static int wm831x_buckv_probe(struct platform_device *pdev)
  324. {
  325. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  326. struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
  327. struct regulator_config config = { };
  328. int id;
  329. struct wm831x_dcdc *dcdc;
  330. struct resource *res;
  331. int ret, irq;
  332. if (pdata && pdata->wm831x_num)
  333. id = (pdata->wm831x_num * 10) + 1;
  334. else
  335. id = 0;
  336. id = pdev->id - id;
  337. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  338. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
  339. GFP_KERNEL);
  340. if (!dcdc)
  341. return -ENOMEM;
  342. dcdc->wm831x = wm831x;
  343. res = platform_get_resource(pdev, IORESOURCE_REG, 0);
  344. if (res == NULL) {
  345. dev_err(&pdev->dev, "No REG resource\n");
  346. ret = -EINVAL;
  347. goto err;
  348. }
  349. dcdc->base = res->start;
  350. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  351. dcdc->desc.name = dcdc->name;
  352. snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
  353. "DC%dVDD", id + 1);
  354. dcdc->desc.supply_name = dcdc->supply_name;
  355. dcdc->desc.id = id;
  356. dcdc->desc.type = REGULATOR_VOLTAGE;
  357. dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
  358. dcdc->desc.linear_ranges = wm831x_buckv_ranges;
  359. dcdc->desc.n_linear_ranges = ARRAY_SIZE(wm831x_buckv_ranges);
  360. dcdc->desc.ops = &wm831x_buckv_ops;
  361. dcdc->desc.owner = THIS_MODULE;
  362. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  363. dcdc->desc.enable_mask = 1 << id;
  364. dcdc->desc.csel_reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  365. dcdc->desc.csel_mask = WM831X_DC1_HC_THR_MASK;
  366. dcdc->desc.n_current_limits = ARRAY_SIZE(wm831x_dcdc_ilim);
  367. dcdc->desc.curr_table = wm831x_dcdc_ilim;
  368. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
  369. if (ret < 0) {
  370. dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
  371. goto err;
  372. }
  373. dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
  374. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
  375. if (ret < 0) {
  376. dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
  377. goto err;
  378. }
  379. dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
  380. if (pdata && pdata->dcdc[id])
  381. wm831x_buckv_dvs_init(pdev, dcdc,
  382. pdata->dcdc[id]->driver_data);
  383. config.dev = pdev->dev.parent;
  384. if (pdata)
  385. config.init_data = pdata->dcdc[id];
  386. config.driver_data = dcdc;
  387. config.regmap = wm831x->regmap;
  388. dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
  389. &config);
  390. if (IS_ERR(dcdc->regulator)) {
  391. ret = PTR_ERR(dcdc->regulator);
  392. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  393. id + 1, ret);
  394. goto err;
  395. }
  396. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  397. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  398. wm831x_dcdc_uv_irq,
  399. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  400. dcdc->name, dcdc);
  401. if (ret != 0) {
  402. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  403. irq, ret);
  404. goto err;
  405. }
  406. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC"));
  407. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  408. wm831x_dcdc_oc_irq,
  409. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  410. dcdc->name, dcdc);
  411. if (ret != 0) {
  412. dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
  413. irq, ret);
  414. goto err;
  415. }
  416. platform_set_drvdata(pdev, dcdc);
  417. return 0;
  418. err:
  419. return ret;
  420. }
  421. static struct platform_driver wm831x_buckv_driver = {
  422. .probe = wm831x_buckv_probe,
  423. .driver = {
  424. .name = "wm831x-buckv",
  425. },
  426. };
  427. /*
  428. * BUCKP specifics
  429. */
  430. static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, int uV)
  431. {
  432. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  433. struct wm831x *wm831x = dcdc->wm831x;
  434. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  435. int sel;
  436. sel = regulator_map_voltage_linear(rdev, uV, uV);
  437. if (sel < 0)
  438. return sel;
  439. return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, sel);
  440. }
  441. static const struct regulator_ops wm831x_buckp_ops = {
  442. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  443. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  444. .list_voltage = regulator_list_voltage_linear,
  445. .map_voltage = regulator_map_voltage_linear,
  446. .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
  447. .is_enabled = regulator_is_enabled_regmap,
  448. .enable = regulator_enable_regmap,
  449. .disable = regulator_disable_regmap,
  450. .get_status = wm831x_dcdc_get_status,
  451. .get_mode = wm831x_dcdc_get_mode,
  452. .set_mode = wm831x_dcdc_set_mode,
  453. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  454. };
  455. static int wm831x_buckp_probe(struct platform_device *pdev)
  456. {
  457. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  458. struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
  459. struct regulator_config config = { };
  460. int id;
  461. struct wm831x_dcdc *dcdc;
  462. struct resource *res;
  463. int ret, irq;
  464. if (pdata && pdata->wm831x_num)
  465. id = (pdata->wm831x_num * 10) + 1;
  466. else
  467. id = 0;
  468. id = pdev->id - id;
  469. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  470. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
  471. GFP_KERNEL);
  472. if (!dcdc)
  473. return -ENOMEM;
  474. dcdc->wm831x = wm831x;
  475. res = platform_get_resource(pdev, IORESOURCE_REG, 0);
  476. if (res == NULL) {
  477. dev_err(&pdev->dev, "No REG resource\n");
  478. ret = -EINVAL;
  479. goto err;
  480. }
  481. dcdc->base = res->start;
  482. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  483. dcdc->desc.name = dcdc->name;
  484. snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
  485. "DC%dVDD", id + 1);
  486. dcdc->desc.supply_name = dcdc->supply_name;
  487. dcdc->desc.id = id;
  488. dcdc->desc.type = REGULATOR_VOLTAGE;
  489. dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
  490. dcdc->desc.ops = &wm831x_buckp_ops;
  491. dcdc->desc.owner = THIS_MODULE;
  492. dcdc->desc.vsel_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  493. dcdc->desc.vsel_mask = WM831X_DC3_ON_VSEL_MASK;
  494. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  495. dcdc->desc.enable_mask = 1 << id;
  496. dcdc->desc.min_uV = 850000;
  497. dcdc->desc.uV_step = 25000;
  498. config.dev = pdev->dev.parent;
  499. if (pdata)
  500. config.init_data = pdata->dcdc[id];
  501. config.driver_data = dcdc;
  502. config.regmap = wm831x->regmap;
  503. dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
  504. &config);
  505. if (IS_ERR(dcdc->regulator)) {
  506. ret = PTR_ERR(dcdc->regulator);
  507. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  508. id + 1, ret);
  509. goto err;
  510. }
  511. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  512. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  513. wm831x_dcdc_uv_irq,
  514. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  515. dcdc->name, dcdc);
  516. if (ret != 0) {
  517. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  518. irq, ret);
  519. goto err;
  520. }
  521. platform_set_drvdata(pdev, dcdc);
  522. return 0;
  523. err:
  524. return ret;
  525. }
  526. static struct platform_driver wm831x_buckp_driver = {
  527. .probe = wm831x_buckp_probe,
  528. .driver = {
  529. .name = "wm831x-buckp",
  530. },
  531. };
  532. /*
  533. * DCDC boost convertors
  534. */
  535. static int wm831x_boostp_get_status(struct regulator_dev *rdev)
  536. {
  537. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  538. struct wm831x *wm831x = dcdc->wm831x;
  539. int ret;
  540. /* First, check for errors */
  541. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  542. if (ret < 0)
  543. return ret;
  544. if (ret & (1 << rdev_get_id(rdev))) {
  545. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  546. rdev_get_id(rdev) + 1);
  547. return REGULATOR_STATUS_ERROR;
  548. }
  549. /* Is the regulator on? */
  550. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  551. if (ret < 0)
  552. return ret;
  553. if (ret & (1 << rdev_get_id(rdev)))
  554. return REGULATOR_STATUS_ON;
  555. else
  556. return REGULATOR_STATUS_OFF;
  557. }
  558. static const struct regulator_ops wm831x_boostp_ops = {
  559. .get_status = wm831x_boostp_get_status,
  560. .is_enabled = regulator_is_enabled_regmap,
  561. .enable = regulator_enable_regmap,
  562. .disable = regulator_disable_regmap,
  563. };
  564. static int wm831x_boostp_probe(struct platform_device *pdev)
  565. {
  566. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  567. struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
  568. struct regulator_config config = { };
  569. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  570. struct wm831x_dcdc *dcdc;
  571. struct resource *res;
  572. int ret, irq;
  573. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  574. if (pdata == NULL || pdata->dcdc[id] == NULL)
  575. return -ENODEV;
  576. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
  577. if (!dcdc)
  578. return -ENOMEM;
  579. dcdc->wm831x = wm831x;
  580. res = platform_get_resource(pdev, IORESOURCE_REG, 0);
  581. if (res == NULL) {
  582. dev_err(&pdev->dev, "No REG resource\n");
  583. return -EINVAL;
  584. }
  585. dcdc->base = res->start;
  586. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  587. dcdc->desc.name = dcdc->name;
  588. dcdc->desc.id = id;
  589. dcdc->desc.type = REGULATOR_VOLTAGE;
  590. dcdc->desc.ops = &wm831x_boostp_ops;
  591. dcdc->desc.owner = THIS_MODULE;
  592. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  593. dcdc->desc.enable_mask = 1 << id;
  594. config.dev = pdev->dev.parent;
  595. if (pdata)
  596. config.init_data = pdata->dcdc[id];
  597. config.driver_data = dcdc;
  598. config.regmap = wm831x->regmap;
  599. dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
  600. &config);
  601. if (IS_ERR(dcdc->regulator)) {
  602. ret = PTR_ERR(dcdc->regulator);
  603. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  604. id + 1, ret);
  605. return ret;
  606. }
  607. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  608. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  609. wm831x_dcdc_uv_irq,
  610. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  611. dcdc->name,
  612. dcdc);
  613. if (ret != 0) {
  614. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  615. irq, ret);
  616. return ret;
  617. }
  618. platform_set_drvdata(pdev, dcdc);
  619. return 0;
  620. }
  621. static struct platform_driver wm831x_boostp_driver = {
  622. .probe = wm831x_boostp_probe,
  623. .driver = {
  624. .name = "wm831x-boostp",
  625. },
  626. };
  627. /*
  628. * External Power Enable
  629. *
  630. * These aren't actually DCDCs but look like them in hardware so share
  631. * code.
  632. */
  633. #define WM831X_EPE_BASE 6
  634. static const struct regulator_ops wm831x_epe_ops = {
  635. .is_enabled = regulator_is_enabled_regmap,
  636. .enable = regulator_enable_regmap,
  637. .disable = regulator_disable_regmap,
  638. .get_status = wm831x_dcdc_get_status,
  639. };
  640. static int wm831x_epe_probe(struct platform_device *pdev)
  641. {
  642. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  643. struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
  644. struct regulator_config config = { };
  645. int id = pdev->id % ARRAY_SIZE(pdata->epe);
  646. struct wm831x_dcdc *dcdc;
  647. int ret;
  648. dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
  649. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
  650. if (!dcdc)
  651. return -ENOMEM;
  652. dcdc->wm831x = wm831x;
  653. /* For current parts this is correct; probably need to revisit
  654. * in future.
  655. */
  656. snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
  657. dcdc->desc.name = dcdc->name;
  658. dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
  659. dcdc->desc.ops = &wm831x_epe_ops;
  660. dcdc->desc.type = REGULATOR_VOLTAGE;
  661. dcdc->desc.owner = THIS_MODULE;
  662. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  663. dcdc->desc.enable_mask = 1 << dcdc->desc.id;
  664. config.dev = pdev->dev.parent;
  665. if (pdata)
  666. config.init_data = pdata->epe[id];
  667. config.driver_data = dcdc;
  668. config.regmap = wm831x->regmap;
  669. dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
  670. &config);
  671. if (IS_ERR(dcdc->regulator)) {
  672. ret = PTR_ERR(dcdc->regulator);
  673. dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
  674. id + 1, ret);
  675. goto err;
  676. }
  677. platform_set_drvdata(pdev, dcdc);
  678. return 0;
  679. err:
  680. return ret;
  681. }
  682. static struct platform_driver wm831x_epe_driver = {
  683. .probe = wm831x_epe_probe,
  684. .driver = {
  685. .name = "wm831x-epe",
  686. },
  687. };
  688. static struct platform_driver * const drivers[] = {
  689. &wm831x_buckv_driver,
  690. &wm831x_buckp_driver,
  691. &wm831x_boostp_driver,
  692. &wm831x_epe_driver,
  693. };
  694. static int __init wm831x_dcdc_init(void)
  695. {
  696. return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
  697. }
  698. subsys_initcall(wm831x_dcdc_init);
  699. static void __exit wm831x_dcdc_exit(void)
  700. {
  701. platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
  702. }
  703. module_exit(wm831x_dcdc_exit);
  704. /* Module information */
  705. MODULE_AUTHOR("Mark Brown");
  706. MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
  707. MODULE_LICENSE("GPL");
  708. MODULE_ALIAS("platform:wm831x-buckv");
  709. MODULE_ALIAS("platform:wm831x-buckp");
  710. MODULE_ALIAS("platform:wm831x-boostp");
  711. MODULE_ALIAS("platform:wm831x-epe");