stpmic1_regulator.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (C) STMicroelectronics 2018
  3. // Author: Pascal Paillet <p.paillet@st.com> for STMicroelectronics.
  4. #include <linux/interrupt.h>
  5. #include <linux/mfd/stpmic1.h>
  6. #include <linux/module.h>
  7. #include <linux/of_irq.h>
  8. #include <linux/platform_device.h>
  9. #include <linux/regmap.h>
  10. #include <linux/regulator/driver.h>
  11. #include <linux/regulator/machine.h>
  12. #include <linux/regulator/of_regulator.h>
  13. #include <dt-bindings/mfd/st,stpmic1.h>
  14. /**
  15. * struct stpmic1 regulator description: this structure is used as driver data
  16. * @desc: regulator framework description
  17. * @mask_reset_reg: mask reset register address
  18. * @mask_reset_mask: mask rank and mask reset register mask
  19. * @icc_reg: icc register address
  20. * @icc_mask: icc register mask
  21. */
  22. struct stpmic1_regulator_cfg {
  23. struct regulator_desc desc;
  24. u8 mask_reset_reg;
  25. u8 mask_reset_mask;
  26. u8 icc_reg;
  27. u8 icc_mask;
  28. };
  29. static int stpmic1_set_mode(struct regulator_dev *rdev, unsigned int mode);
  30. static unsigned int stpmic1_get_mode(struct regulator_dev *rdev);
  31. static int stpmic1_set_icc(struct regulator_dev *rdev);
  32. static unsigned int stpmic1_map_mode(unsigned int mode);
  33. enum {
  34. STPMIC1_BUCK1 = 0,
  35. STPMIC1_BUCK2 = 1,
  36. STPMIC1_BUCK3 = 2,
  37. STPMIC1_BUCK4 = 3,
  38. STPMIC1_LDO1 = 4,
  39. STPMIC1_LDO2 = 5,
  40. STPMIC1_LDO3 = 6,
  41. STPMIC1_LDO4 = 7,
  42. STPMIC1_LDO5 = 8,
  43. STPMIC1_LDO6 = 9,
  44. STPMIC1_VREF_DDR = 10,
  45. STPMIC1_BOOST = 11,
  46. STPMIC1_VBUS_OTG = 12,
  47. STPMIC1_SW_OUT = 13,
  48. };
  49. /* Enable time worst case is 5000mV/(2250uV/uS) */
  50. #define PMIC_ENABLE_TIME_US 2200
  51. /* Ramp delay worst case is (2250uV/uS) */
  52. #define PMIC_RAMP_DELAY 2200
  53. static const struct linear_range buck1_ranges[] = {
  54. REGULATOR_LINEAR_RANGE(725000, 0, 4, 0),
  55. REGULATOR_LINEAR_RANGE(725000, 5, 36, 25000),
  56. REGULATOR_LINEAR_RANGE(1500000, 37, 63, 0),
  57. };
  58. static const struct linear_range buck2_ranges[] = {
  59. REGULATOR_LINEAR_RANGE(1000000, 0, 17, 0),
  60. REGULATOR_LINEAR_RANGE(1050000, 18, 19, 0),
  61. REGULATOR_LINEAR_RANGE(1100000, 20, 21, 0),
  62. REGULATOR_LINEAR_RANGE(1150000, 22, 23, 0),
  63. REGULATOR_LINEAR_RANGE(1200000, 24, 25, 0),
  64. REGULATOR_LINEAR_RANGE(1250000, 26, 27, 0),
  65. REGULATOR_LINEAR_RANGE(1300000, 28, 29, 0),
  66. REGULATOR_LINEAR_RANGE(1350000, 30, 31, 0),
  67. REGULATOR_LINEAR_RANGE(1400000, 32, 33, 0),
  68. REGULATOR_LINEAR_RANGE(1450000, 34, 35, 0),
  69. REGULATOR_LINEAR_RANGE(1500000, 36, 63, 0),
  70. };
  71. static const struct linear_range buck3_ranges[] = {
  72. REGULATOR_LINEAR_RANGE(1000000, 0, 19, 0),
  73. REGULATOR_LINEAR_RANGE(1100000, 20, 23, 0),
  74. REGULATOR_LINEAR_RANGE(1200000, 24, 27, 0),
  75. REGULATOR_LINEAR_RANGE(1300000, 28, 31, 0),
  76. REGULATOR_LINEAR_RANGE(1400000, 32, 35, 0),
  77. REGULATOR_LINEAR_RANGE(1500000, 36, 55, 100000),
  78. REGULATOR_LINEAR_RANGE(3400000, 56, 63, 0),
  79. };
  80. static const struct linear_range buck4_ranges[] = {
  81. REGULATOR_LINEAR_RANGE(600000, 0, 27, 25000),
  82. REGULATOR_LINEAR_RANGE(1300000, 28, 29, 0),
  83. REGULATOR_LINEAR_RANGE(1350000, 30, 31, 0),
  84. REGULATOR_LINEAR_RANGE(1400000, 32, 33, 0),
  85. REGULATOR_LINEAR_RANGE(1450000, 34, 35, 0),
  86. REGULATOR_LINEAR_RANGE(1500000, 36, 60, 100000),
  87. REGULATOR_LINEAR_RANGE(3900000, 61, 63, 0),
  88. };
  89. static const struct linear_range ldo1_ranges[] = {
  90. REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
  91. REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000),
  92. REGULATOR_LINEAR_RANGE(3300000, 25, 31, 0),
  93. };
  94. static const struct linear_range ldo2_ranges[] = {
  95. REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
  96. REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000),
  97. REGULATOR_LINEAR_RANGE(3300000, 25, 30, 0),
  98. };
  99. static const struct linear_range ldo3_ranges[] = {
  100. REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
  101. REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000),
  102. REGULATOR_LINEAR_RANGE(3300000, 25, 30, 0),
  103. /* with index 31 LDO3 is in DDR mode */
  104. REGULATOR_LINEAR_RANGE(500000, 31, 31, 0),
  105. };
  106. static const struct linear_range ldo5_ranges[] = {
  107. REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
  108. REGULATOR_LINEAR_RANGE(1700000, 8, 30, 100000),
  109. REGULATOR_LINEAR_RANGE(3900000, 31, 31, 0),
  110. };
  111. static const struct linear_range ldo6_ranges[] = {
  112. REGULATOR_LINEAR_RANGE(900000, 0, 24, 100000),
  113. REGULATOR_LINEAR_RANGE(3300000, 25, 31, 0),
  114. };
  115. static const struct regulator_ops stpmic1_ldo_ops = {
  116. .list_voltage = regulator_list_voltage_linear_range,
  117. .map_voltage = regulator_map_voltage_linear_range,
  118. .is_enabled = regulator_is_enabled_regmap,
  119. .enable = regulator_enable_regmap,
  120. .disable = regulator_disable_regmap,
  121. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  122. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  123. .set_over_current_protection = stpmic1_set_icc,
  124. };
  125. static const struct regulator_ops stpmic1_ldo3_ops = {
  126. .list_voltage = regulator_list_voltage_linear_range,
  127. .map_voltage = regulator_map_voltage_iterate,
  128. .is_enabled = regulator_is_enabled_regmap,
  129. .enable = regulator_enable_regmap,
  130. .disable = regulator_disable_regmap,
  131. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  132. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  133. .get_bypass = regulator_get_bypass_regmap,
  134. .set_bypass = regulator_set_bypass_regmap,
  135. .set_over_current_protection = stpmic1_set_icc,
  136. };
  137. static const struct regulator_ops stpmic1_ldo4_fixed_regul_ops = {
  138. .is_enabled = regulator_is_enabled_regmap,
  139. .enable = regulator_enable_regmap,
  140. .disable = regulator_disable_regmap,
  141. .set_over_current_protection = stpmic1_set_icc,
  142. };
  143. static const struct regulator_ops stpmic1_buck_ops = {
  144. .list_voltage = regulator_list_voltage_linear_range,
  145. .map_voltage = regulator_map_voltage_linear_range,
  146. .is_enabled = regulator_is_enabled_regmap,
  147. .enable = regulator_enable_regmap,
  148. .disable = regulator_disable_regmap,
  149. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  150. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  151. .set_pull_down = regulator_set_pull_down_regmap,
  152. .set_mode = stpmic1_set_mode,
  153. .get_mode = stpmic1_get_mode,
  154. .set_over_current_protection = stpmic1_set_icc,
  155. };
  156. static const struct regulator_ops stpmic1_vref_ddr_ops = {
  157. .is_enabled = regulator_is_enabled_regmap,
  158. .enable = regulator_enable_regmap,
  159. .disable = regulator_disable_regmap,
  160. };
  161. static const struct regulator_ops stpmic1_boost_regul_ops = {
  162. .is_enabled = regulator_is_enabled_regmap,
  163. .enable = regulator_enable_regmap,
  164. .disable = regulator_disable_regmap,
  165. .set_over_current_protection = stpmic1_set_icc,
  166. };
  167. static const struct regulator_ops stpmic1_switch_regul_ops = {
  168. .is_enabled = regulator_is_enabled_regmap,
  169. .enable = regulator_enable_regmap,
  170. .disable = regulator_disable_regmap,
  171. .set_over_current_protection = stpmic1_set_icc,
  172. .set_active_discharge = regulator_set_active_discharge_regmap,
  173. };
  174. #define REG_LDO(ids, base) { \
  175. .name = #ids, \
  176. .id = STPMIC1_##ids, \
  177. .n_voltages = 32, \
  178. .ops = &stpmic1_ldo_ops, \
  179. .linear_ranges = base ## _ranges, \
  180. .n_linear_ranges = ARRAY_SIZE(base ## _ranges), \
  181. .type = REGULATOR_VOLTAGE, \
  182. .owner = THIS_MODULE, \
  183. .vsel_reg = ids##_ACTIVE_CR, \
  184. .vsel_mask = LDO_VOLTAGE_MASK, \
  185. .enable_reg = ids##_ACTIVE_CR, \
  186. .enable_mask = LDO_ENABLE_MASK, \
  187. .enable_val = 1, \
  188. .disable_val = 0, \
  189. .enable_time = PMIC_ENABLE_TIME_US, \
  190. .ramp_delay = PMIC_RAMP_DELAY, \
  191. .supply_name = #base, \
  192. }
  193. #define REG_LDO3(ids, base) { \
  194. .name = #ids, \
  195. .id = STPMIC1_##ids, \
  196. .n_voltages = 32, \
  197. .ops = &stpmic1_ldo3_ops, \
  198. .linear_ranges = ldo3_ranges, \
  199. .n_linear_ranges = ARRAY_SIZE(ldo3_ranges), \
  200. .type = REGULATOR_VOLTAGE, \
  201. .owner = THIS_MODULE, \
  202. .vsel_reg = LDO3_ACTIVE_CR, \
  203. .vsel_mask = LDO_VOLTAGE_MASK, \
  204. .enable_reg = LDO3_ACTIVE_CR, \
  205. .enable_mask = LDO_ENABLE_MASK, \
  206. .enable_val = 1, \
  207. .disable_val = 0, \
  208. .enable_time = PMIC_ENABLE_TIME_US, \
  209. .ramp_delay = PMIC_RAMP_DELAY, \
  210. .bypass_reg = LDO3_ACTIVE_CR, \
  211. .bypass_mask = LDO_BYPASS_MASK, \
  212. .bypass_val_on = LDO_BYPASS_MASK, \
  213. .bypass_val_off = 0, \
  214. .supply_name = #base, \
  215. }
  216. #define REG_LDO4(ids, base) { \
  217. .name = #ids, \
  218. .id = STPMIC1_##ids, \
  219. .n_voltages = 1, \
  220. .ops = &stpmic1_ldo4_fixed_regul_ops, \
  221. .type = REGULATOR_VOLTAGE, \
  222. .owner = THIS_MODULE, \
  223. .min_uV = 3300000, \
  224. .fixed_uV = 3300000, \
  225. .enable_reg = LDO4_ACTIVE_CR, \
  226. .enable_mask = LDO_ENABLE_MASK, \
  227. .enable_val = 1, \
  228. .disable_val = 0, \
  229. .enable_time = PMIC_ENABLE_TIME_US, \
  230. .ramp_delay = PMIC_RAMP_DELAY, \
  231. .supply_name = #base, \
  232. }
  233. #define REG_BUCK(ids, base) { \
  234. .name = #ids, \
  235. .id = STPMIC1_##ids, \
  236. .ops = &stpmic1_buck_ops, \
  237. .n_voltages = 64, \
  238. .linear_ranges = base ## _ranges, \
  239. .n_linear_ranges = ARRAY_SIZE(base ## _ranges), \
  240. .type = REGULATOR_VOLTAGE, \
  241. .owner = THIS_MODULE, \
  242. .vsel_reg = ids##_ACTIVE_CR, \
  243. .vsel_mask = BUCK_VOLTAGE_MASK, \
  244. .enable_reg = ids##_ACTIVE_CR, \
  245. .enable_mask = BUCK_ENABLE_MASK, \
  246. .enable_val = 1, \
  247. .disable_val = 0, \
  248. .enable_time = PMIC_ENABLE_TIME_US, \
  249. .ramp_delay = PMIC_RAMP_DELAY, \
  250. .of_map_mode = stpmic1_map_mode, \
  251. .pull_down_reg = ids##_PULL_DOWN_REG, \
  252. .pull_down_mask = ids##_PULL_DOWN_MASK, \
  253. .supply_name = #base, \
  254. }
  255. #define REG_VREF_DDR(ids, base) { \
  256. .name = #ids, \
  257. .id = STPMIC1_##ids, \
  258. .n_voltages = 1, \
  259. .ops = &stpmic1_vref_ddr_ops, \
  260. .type = REGULATOR_VOLTAGE, \
  261. .owner = THIS_MODULE, \
  262. .min_uV = 500000, \
  263. .fixed_uV = 500000, \
  264. .enable_reg = VREF_DDR_ACTIVE_CR, \
  265. .enable_mask = BUCK_ENABLE_MASK, \
  266. .enable_val = 1, \
  267. .disable_val = 0, \
  268. .enable_time = PMIC_ENABLE_TIME_US, \
  269. .supply_name = #base, \
  270. }
  271. #define REG_BOOST(ids, base) { \
  272. .name = #ids, \
  273. .id = STPMIC1_##ids, \
  274. .n_voltages = 1, \
  275. .ops = &stpmic1_boost_regul_ops, \
  276. .type = REGULATOR_VOLTAGE, \
  277. .owner = THIS_MODULE, \
  278. .min_uV = 0, \
  279. .fixed_uV = 5000000, \
  280. .enable_reg = BST_SW_CR, \
  281. .enable_mask = BOOST_ENABLED, \
  282. .enable_val = BOOST_ENABLED, \
  283. .disable_val = 0, \
  284. .enable_time = PMIC_ENABLE_TIME_US, \
  285. .supply_name = #base, \
  286. }
  287. #define REG_VBUS_OTG(ids, base) { \
  288. .name = #ids, \
  289. .id = STPMIC1_##ids, \
  290. .n_voltages = 1, \
  291. .ops = &stpmic1_switch_regul_ops, \
  292. .type = REGULATOR_VOLTAGE, \
  293. .owner = THIS_MODULE, \
  294. .min_uV = 0, \
  295. .fixed_uV = 5000000, \
  296. .enable_reg = BST_SW_CR, \
  297. .enable_mask = USBSW_OTG_SWITCH_ENABLED, \
  298. .enable_val = USBSW_OTG_SWITCH_ENABLED, \
  299. .disable_val = 0, \
  300. .enable_time = PMIC_ENABLE_TIME_US, \
  301. .supply_name = #base, \
  302. .active_discharge_reg = BST_SW_CR, \
  303. .active_discharge_mask = VBUS_OTG_DISCHARGE, \
  304. .active_discharge_on = VBUS_OTG_DISCHARGE, \
  305. }
  306. #define REG_SW_OUT(ids, base) { \
  307. .name = #ids, \
  308. .id = STPMIC1_##ids, \
  309. .n_voltages = 1, \
  310. .ops = &stpmic1_switch_regul_ops, \
  311. .type = REGULATOR_VOLTAGE, \
  312. .owner = THIS_MODULE, \
  313. .min_uV = 0, \
  314. .fixed_uV = 5000000, \
  315. .enable_reg = BST_SW_CR, \
  316. .enable_mask = SWIN_SWOUT_ENABLED, \
  317. .enable_val = SWIN_SWOUT_ENABLED, \
  318. .disable_val = 0, \
  319. .enable_time = PMIC_ENABLE_TIME_US, \
  320. .supply_name = #base, \
  321. .active_discharge_reg = BST_SW_CR, \
  322. .active_discharge_mask = SW_OUT_DISCHARGE, \
  323. .active_discharge_on = SW_OUT_DISCHARGE, \
  324. }
  325. static const struct stpmic1_regulator_cfg stpmic1_regulator_cfgs[] = {
  326. [STPMIC1_BUCK1] = {
  327. .desc = REG_BUCK(BUCK1, buck1),
  328. .icc_reg = BUCKS_ICCTO_CR,
  329. .icc_mask = BIT(0),
  330. .mask_reset_reg = BUCKS_MASK_RESET_CR,
  331. .mask_reset_mask = BIT(0),
  332. },
  333. [STPMIC1_BUCK2] = {
  334. .desc = REG_BUCK(BUCK2, buck2),
  335. .icc_reg = BUCKS_ICCTO_CR,
  336. .icc_mask = BIT(1),
  337. .mask_reset_reg = BUCKS_MASK_RESET_CR,
  338. .mask_reset_mask = BIT(1),
  339. },
  340. [STPMIC1_BUCK3] = {
  341. .desc = REG_BUCK(BUCK3, buck3),
  342. .icc_reg = BUCKS_ICCTO_CR,
  343. .icc_mask = BIT(2),
  344. .mask_reset_reg = BUCKS_MASK_RESET_CR,
  345. .mask_reset_mask = BIT(2),
  346. },
  347. [STPMIC1_BUCK4] = {
  348. .desc = REG_BUCK(BUCK4, buck4),
  349. .icc_reg = BUCKS_ICCTO_CR,
  350. .icc_mask = BIT(3),
  351. .mask_reset_reg = BUCKS_MASK_RESET_CR,
  352. .mask_reset_mask = BIT(3),
  353. },
  354. [STPMIC1_LDO1] = {
  355. .desc = REG_LDO(LDO1, ldo1),
  356. .icc_reg = LDOS_ICCTO_CR,
  357. .icc_mask = BIT(0),
  358. .mask_reset_reg = LDOS_MASK_RESET_CR,
  359. .mask_reset_mask = BIT(0),
  360. },
  361. [STPMIC1_LDO2] = {
  362. .desc = REG_LDO(LDO2, ldo2),
  363. .icc_reg = LDOS_ICCTO_CR,
  364. .icc_mask = BIT(1),
  365. .mask_reset_reg = LDOS_MASK_RESET_CR,
  366. .mask_reset_mask = BIT(1),
  367. },
  368. [STPMIC1_LDO3] = {
  369. .desc = REG_LDO3(LDO3, ldo3),
  370. .icc_reg = LDOS_ICCTO_CR,
  371. .icc_mask = BIT(2),
  372. .mask_reset_reg = LDOS_MASK_RESET_CR,
  373. .mask_reset_mask = BIT(2),
  374. },
  375. [STPMIC1_LDO4] = {
  376. .desc = REG_LDO4(LDO4, ldo4),
  377. .icc_reg = LDOS_ICCTO_CR,
  378. .icc_mask = BIT(3),
  379. .mask_reset_reg = LDOS_MASK_RESET_CR,
  380. .mask_reset_mask = BIT(3),
  381. },
  382. [STPMIC1_LDO5] = {
  383. .desc = REG_LDO(LDO5, ldo5),
  384. .icc_reg = LDOS_ICCTO_CR,
  385. .icc_mask = BIT(4),
  386. .mask_reset_reg = LDOS_MASK_RESET_CR,
  387. .mask_reset_mask = BIT(4),
  388. },
  389. [STPMIC1_LDO6] = {
  390. .desc = REG_LDO(LDO6, ldo6),
  391. .icc_reg = LDOS_ICCTO_CR,
  392. .icc_mask = BIT(5),
  393. .mask_reset_reg = LDOS_MASK_RESET_CR,
  394. .mask_reset_mask = BIT(5),
  395. },
  396. [STPMIC1_VREF_DDR] = {
  397. .desc = REG_VREF_DDR(VREF_DDR, vref_ddr),
  398. .mask_reset_reg = LDOS_MASK_RESET_CR,
  399. .mask_reset_mask = BIT(6),
  400. },
  401. [STPMIC1_BOOST] = {
  402. .desc = REG_BOOST(BOOST, boost),
  403. .icc_reg = BUCKS_ICCTO_CR,
  404. .icc_mask = BIT(6),
  405. },
  406. [STPMIC1_VBUS_OTG] = {
  407. .desc = REG_VBUS_OTG(VBUS_OTG, pwr_sw1),
  408. .icc_reg = BUCKS_ICCTO_CR,
  409. .icc_mask = BIT(4),
  410. },
  411. [STPMIC1_SW_OUT] = {
  412. .desc = REG_SW_OUT(SW_OUT, pwr_sw2),
  413. .icc_reg = BUCKS_ICCTO_CR,
  414. .icc_mask = BIT(5),
  415. },
  416. };
  417. static unsigned int stpmic1_map_mode(unsigned int mode)
  418. {
  419. switch (mode) {
  420. case STPMIC1_BUCK_MODE_NORMAL:
  421. return REGULATOR_MODE_NORMAL;
  422. case STPMIC1_BUCK_MODE_LP:
  423. return REGULATOR_MODE_STANDBY;
  424. default:
  425. return REGULATOR_MODE_INVALID;
  426. }
  427. }
  428. static unsigned int stpmic1_get_mode(struct regulator_dev *rdev)
  429. {
  430. int value;
  431. struct regmap *regmap = rdev_get_regmap(rdev);
  432. regmap_read(regmap, rdev->desc->enable_reg, &value);
  433. if (value & STPMIC1_BUCK_MODE_LP)
  434. return REGULATOR_MODE_STANDBY;
  435. return REGULATOR_MODE_NORMAL;
  436. }
  437. static int stpmic1_set_mode(struct regulator_dev *rdev, unsigned int mode)
  438. {
  439. int value;
  440. struct regmap *regmap = rdev_get_regmap(rdev);
  441. switch (mode) {
  442. case REGULATOR_MODE_NORMAL:
  443. value = STPMIC1_BUCK_MODE_NORMAL;
  444. break;
  445. case REGULATOR_MODE_STANDBY:
  446. value = STPMIC1_BUCK_MODE_LP;
  447. break;
  448. default:
  449. return -EINVAL;
  450. }
  451. return regmap_update_bits(regmap, rdev->desc->enable_reg,
  452. STPMIC1_BUCK_MODE_LP, value);
  453. }
  454. static int stpmic1_set_icc(struct regulator_dev *rdev)
  455. {
  456. struct stpmic1_regulator_cfg *cfg = rdev_get_drvdata(rdev);
  457. struct regmap *regmap = rdev_get_regmap(rdev);
  458. /* enable switch off in case of over current */
  459. return regmap_update_bits(regmap, cfg->icc_reg, cfg->icc_mask,
  460. cfg->icc_mask);
  461. }
  462. static irqreturn_t stpmic1_curlim_irq_handler(int irq, void *data)
  463. {
  464. struct regulator_dev *rdev = (struct regulator_dev *)data;
  465. /* Send an overcurrent notification */
  466. regulator_notifier_call_chain(rdev,
  467. REGULATOR_EVENT_OVER_CURRENT,
  468. NULL);
  469. return IRQ_HANDLED;
  470. }
  471. #define MATCH(_name, _id) \
  472. [STPMIC1_##_id] = { \
  473. .name = #_name, \
  474. .desc = &stpmic1_regulator_cfgs[STPMIC1_##_id].desc, \
  475. }
  476. static struct of_regulator_match stpmic1_matches[] = {
  477. MATCH(buck1, BUCK1),
  478. MATCH(buck2, BUCK2),
  479. MATCH(buck3, BUCK3),
  480. MATCH(buck4, BUCK4),
  481. MATCH(ldo1, LDO1),
  482. MATCH(ldo2, LDO2),
  483. MATCH(ldo3, LDO3),
  484. MATCH(ldo4, LDO4),
  485. MATCH(ldo5, LDO5),
  486. MATCH(ldo6, LDO6),
  487. MATCH(vref_ddr, VREF_DDR),
  488. MATCH(boost, BOOST),
  489. MATCH(pwr_sw1, VBUS_OTG),
  490. MATCH(pwr_sw2, SW_OUT),
  491. };
  492. static int stpmic1_regulator_register(struct platform_device *pdev, int id,
  493. struct of_regulator_match *match,
  494. const struct stpmic1_regulator_cfg *cfg)
  495. {
  496. struct stpmic1 *pmic_dev = dev_get_drvdata(pdev->dev.parent);
  497. struct regulator_dev *rdev;
  498. struct regulator_config config = {};
  499. int ret = 0;
  500. int irq;
  501. config.dev = &pdev->dev;
  502. config.init_data = match->init_data;
  503. config.of_node = match->of_node;
  504. config.regmap = pmic_dev->regmap;
  505. config.driver_data = (void *)cfg;
  506. rdev = devm_regulator_register(&pdev->dev, &cfg->desc, &config);
  507. if (IS_ERR(rdev)) {
  508. dev_err(&pdev->dev, "failed to register %s regulator\n",
  509. cfg->desc.name);
  510. return PTR_ERR(rdev);
  511. }
  512. /* set mask reset */
  513. if (of_get_property(config.of_node, "st,mask-reset", NULL) &&
  514. cfg->mask_reset_reg != 0) {
  515. ret = regmap_update_bits(pmic_dev->regmap,
  516. cfg->mask_reset_reg,
  517. cfg->mask_reset_mask,
  518. cfg->mask_reset_mask);
  519. if (ret) {
  520. dev_err(&pdev->dev, "set mask reset failed\n");
  521. return ret;
  522. }
  523. }
  524. /* setup an irq handler for over-current detection */
  525. irq = of_irq_get(config.of_node, 0);
  526. if (irq > 0) {
  527. ret = devm_request_threaded_irq(&pdev->dev,
  528. irq, NULL,
  529. stpmic1_curlim_irq_handler,
  530. IRQF_ONESHOT | IRQF_SHARED,
  531. pdev->name, rdev);
  532. if (ret) {
  533. dev_err(&pdev->dev, "Request IRQ failed\n");
  534. return ret;
  535. }
  536. }
  537. return 0;
  538. }
  539. static int stpmic1_regulator_probe(struct platform_device *pdev)
  540. {
  541. int i, ret;
  542. ret = of_regulator_match(&pdev->dev, pdev->dev.of_node, stpmic1_matches,
  543. ARRAY_SIZE(stpmic1_matches));
  544. if (ret < 0) {
  545. dev_err(&pdev->dev,
  546. "Error in PMIC regulator device tree node");
  547. return ret;
  548. }
  549. for (i = 0; i < ARRAY_SIZE(stpmic1_regulator_cfgs); i++) {
  550. ret = stpmic1_regulator_register(pdev, i, &stpmic1_matches[i],
  551. &stpmic1_regulator_cfgs[i]);
  552. if (ret < 0)
  553. return ret;
  554. }
  555. dev_dbg(&pdev->dev, "stpmic1_regulator driver probed\n");
  556. return 0;
  557. }
  558. static const struct of_device_id of_pmic_regulator_match[] = {
  559. { .compatible = "st,stpmic1-regulators" },
  560. { },
  561. };
  562. MODULE_DEVICE_TABLE(of, of_pmic_regulator_match);
  563. static struct platform_driver stpmic1_regulator_driver = {
  564. .driver = {
  565. .name = "stpmic1-regulator",
  566. .of_match_table = of_match_ptr(of_pmic_regulator_match),
  567. },
  568. .probe = stpmic1_regulator_probe,
  569. };
  570. module_platform_driver(stpmic1_regulator_driver);
  571. MODULE_DESCRIPTION("STPMIC1 PMIC voltage regulator driver");
  572. MODULE_AUTHOR("Pascal Paillet <p.paillet@st.com>");
  573. MODULE_LICENSE("GPL v2");