pv88090-regulator.h 2.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * pv88090-regulator.h - Regulator definitions for PV88090
  4. * Copyright (C) 2015 Powerventure Semiconductor Ltd.
  5. */
  6. #ifndef __PV88090_REGISTERS_H__
  7. #define __PV88090_REGISTERS_H__
  8. /* System Control and Event Registers */
  9. #define PV88090_REG_EVENT_A 0x03
  10. #define PV88090_REG_MASK_A 0x06
  11. #define PV88090_REG_MASK_B 0x07
  12. /* Regulator Registers */
  13. #define PV88090_REG_BUCK1_CONF0 0x18
  14. #define PV88090_REG_BUCK1_CONF1 0x19
  15. #define PV88090_REG_BUCK1_CONF2 0x1a
  16. #define PV88090_REG_BUCK2_CONF0 0x1b
  17. #define PV88090_REG_BUCK2_CONF1 0x1c
  18. #define PV88090_REG_BUCK2_CONF2 0x58
  19. #define PV88090_REG_BUCK3_CONF0 0x1d
  20. #define PV88090_REG_BUCK3_CONF1 0x1e
  21. #define PV88090_REG_BUCK3_CONF2 0x5c
  22. #define PV88090_REG_LDO1_CONT 0x1f
  23. #define PV88090_REG_LDO2_CONT 0x20
  24. #define PV88090_REG_LDO3_CONT 0x21
  25. #define PV88090_REG_BUCK_FOLD_RANGE 0x61
  26. /* PV88090_REG_EVENT_A (addr=0x03) */
  27. #define PV88090_E_VDD_FLT 0x01
  28. #define PV88090_E_OVER_TEMP 0x02
  29. /* PV88090_REG_MASK_A (addr=0x06) */
  30. #define PV88090_M_VDD_FLT 0x01
  31. #define PV88090_M_OVER_TEMP 0x02
  32. /* PV88090_REG_BUCK1_CONF0 (addr=0x18) */
  33. #define PV88090_BUCK1_EN 0x80
  34. #define PV88090_VBUCK1_MASK 0x7F
  35. /* PV88090_REG_BUCK2_CONF0 (addr=0x1b) */
  36. #define PV88090_BUCK2_EN 0x80
  37. #define PV88090_VBUCK2_MASK 0x7F
  38. /* PV88090_REG_BUCK3_CONF0 (addr=0x1d) */
  39. #define PV88090_BUCK3_EN 0x80
  40. #define PV88090_VBUCK3_MASK 0x7F
  41. /* PV88090_REG_LDO1_CONT (addr=0x1f) */
  42. #define PV88090_LDO1_EN 0x40
  43. #define PV88090_VLDO1_MASK 0x3F
  44. /* PV88090_REG_LDO2_CONT (addr=0x20) */
  45. #define PV88090_LDO2_EN 0x40
  46. #define PV88090_VLDO2_MASK 0x3F
  47. /* PV88090_REG_BUCK1_CONF1 (addr=0x19) */
  48. #define PV88090_BUCK1_ILIM_SHIFT 2
  49. #define PV88090_BUCK1_ILIM_MASK 0x7C
  50. #define PV88090_BUCK1_MODE_MASK 0x03
  51. /* PV88090_REG_BUCK2_CONF1 (addr=0x1c) */
  52. #define PV88090_BUCK2_ILIM_SHIFT 2
  53. #define PV88090_BUCK2_ILIM_MASK 0x0C
  54. #define PV88090_BUCK2_MODE_MASK 0x03
  55. /* PV88090_REG_BUCK3_CONF1 (addr=0x1e) */
  56. #define PV88090_BUCK3_ILIM_SHIFT 2
  57. #define PV88090_BUCK3_ILIM_MASK 0x0C
  58. #define PV88090_BUCK3_MODE_MASK 0x03
  59. #define PV88090_BUCK_MODE_SLEEP 0x00
  60. #define PV88090_BUCK_MODE_AUTO 0x01
  61. #define PV88090_BUCK_MODE_SYNC 0x02
  62. /* PV88090_REG_BUCK2_CONF2 (addr=0x58) */
  63. /* PV88090_REG_BUCK3_CONF2 (addr=0x5c) */
  64. #define PV88090_BUCK_VDAC_RANGE_SHIFT 7
  65. #define PV88090_BUCK_VDAC_RANGE_MASK 0x01
  66. #define PV88090_BUCK_VDAC_RANGE_1 0x00
  67. #define PV88090_BUCK_VDAC_RANGE_2 0x01
  68. /* PV88090_REG_BUCK_FOLD_RANGE (addr=0x61) */
  69. #define PV88090_BUCK_VRANGE_GAIN_SHIFT 3
  70. #define PV88090_BUCK_VRANGE_GAIN_MASK 0x01
  71. #define PV88090_BUCK_VRANGE_GAIN_1 0x00
  72. #define PV88090_BUCK_VRANGE_GAIN_2 0x01
  73. #endif /* __PV88090_REGISTERS_H__ */