mt6397-regulator.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright (c) 2014 MediaTek Inc.
  4. // Author: Flora Fu <flora.fu@mediatek.com>
  5. #include <linux/module.h>
  6. #include <linux/of.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/regmap.h>
  9. #include <linux/mfd/mt6397/core.h>
  10. #include <linux/mfd/mt6397/registers.h>
  11. #include <linux/regulator/driver.h>
  12. #include <linux/regulator/machine.h>
  13. #include <linux/regulator/mt6397-regulator.h>
  14. #include <linux/regulator/of_regulator.h>
  15. #include <dt-bindings/regulator/mediatek,mt6397-regulator.h>
  16. /*
  17. * MT6397 regulators' information
  18. *
  19. * @desc: standard fields of regulator description.
  20. * @qi: Mask for query enable signal status of regulators
  21. * @vselon_reg: Register sections for hardware control mode of bucks
  22. * @vselctrl_reg: Register for controlling the buck control mode.
  23. * @vselctrl_mask: Mask for query buck's voltage control mode.
  24. */
  25. struct mt6397_regulator_info {
  26. struct regulator_desc desc;
  27. u32 qi;
  28. u32 vselon_reg;
  29. u32 vselctrl_reg;
  30. u32 vselctrl_mask;
  31. u32 modeset_reg;
  32. u32 modeset_mask;
  33. u32 modeset_shift;
  34. };
  35. #define MT6397_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \
  36. vosel, vosel_mask, voselon, vosel_ctrl, _modeset_reg, \
  37. _modeset_shift) \
  38. [MT6397_ID_##vreg] = { \
  39. .desc = { \
  40. .name = #vreg, \
  41. .of_match = of_match_ptr(match), \
  42. .ops = &mt6397_volt_range_ops, \
  43. .type = REGULATOR_VOLTAGE, \
  44. .id = MT6397_ID_##vreg, \
  45. .owner = THIS_MODULE, \
  46. .n_voltages = (max - min)/step + 1, \
  47. .linear_ranges = volt_ranges, \
  48. .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
  49. .vsel_reg = vosel, \
  50. .vsel_mask = vosel_mask, \
  51. .enable_reg = enreg, \
  52. .enable_mask = BIT(0), \
  53. .of_map_mode = mt6397_map_mode, \
  54. }, \
  55. .qi = BIT(13), \
  56. .vselon_reg = voselon, \
  57. .vselctrl_reg = vosel_ctrl, \
  58. .vselctrl_mask = BIT(1), \
  59. .modeset_reg = _modeset_reg, \
  60. .modeset_mask = BIT(_modeset_shift), \
  61. .modeset_shift = _modeset_shift \
  62. }
  63. #define MT6397_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \
  64. vosel_mask) \
  65. [MT6397_ID_##vreg] = { \
  66. .desc = { \
  67. .name = #vreg, \
  68. .of_match = of_match_ptr(match), \
  69. .ops = &mt6397_volt_table_ops, \
  70. .type = REGULATOR_VOLTAGE, \
  71. .id = MT6397_ID_##vreg, \
  72. .owner = THIS_MODULE, \
  73. .n_voltages = ARRAY_SIZE(ldo_volt_table), \
  74. .volt_table = ldo_volt_table, \
  75. .vsel_reg = vosel, \
  76. .vsel_mask = vosel_mask, \
  77. .enable_reg = enreg, \
  78. .enable_mask = BIT(enbit), \
  79. }, \
  80. .qi = BIT(15), \
  81. }
  82. #define MT6397_REG_FIXED(match, vreg, enreg, enbit, volt) \
  83. [MT6397_ID_##vreg] = { \
  84. .desc = { \
  85. .name = #vreg, \
  86. .of_match = of_match_ptr(match), \
  87. .ops = &mt6397_volt_fixed_ops, \
  88. .type = REGULATOR_VOLTAGE, \
  89. .id = MT6397_ID_##vreg, \
  90. .owner = THIS_MODULE, \
  91. .n_voltages = 1, \
  92. .enable_reg = enreg, \
  93. .enable_mask = BIT(enbit), \
  94. .min_uV = volt, \
  95. }, \
  96. .qi = BIT(15), \
  97. }
  98. static const struct linear_range buck_volt_range1[] = {
  99. REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250),
  100. };
  101. static const struct linear_range buck_volt_range2[] = {
  102. REGULATOR_LINEAR_RANGE(800000, 0, 0x7f, 6250),
  103. };
  104. static const struct linear_range buck_volt_range3[] = {
  105. REGULATOR_LINEAR_RANGE(1500000, 0, 0x1f, 20000),
  106. };
  107. static const unsigned int ldo_volt_table1[] = {
  108. 1500000, 1800000, 2500000, 2800000,
  109. };
  110. static const unsigned int ldo_volt_table2[] = {
  111. 1800000, 3300000,
  112. };
  113. static const unsigned int ldo_volt_table3[] = {
  114. 3000000, 3300000,
  115. };
  116. static const unsigned int ldo_volt_table4[] = {
  117. 1220000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000,
  118. };
  119. static const unsigned int ldo_volt_table5[] = {
  120. 1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000,
  121. };
  122. static const unsigned int ldo_volt_table5_v2[] = {
  123. 1200000, 1000000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000,
  124. };
  125. static const unsigned int ldo_volt_table6[] = {
  126. 1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 2000000,
  127. };
  128. static const unsigned int ldo_volt_table7[] = {
  129. 1300000, 1500000, 1800000, 2000000, 2500000, 2800000, 3000000, 3300000,
  130. };
  131. static unsigned int mt6397_map_mode(unsigned int mode)
  132. {
  133. switch (mode) {
  134. case MT6397_BUCK_MODE_AUTO:
  135. return REGULATOR_MODE_NORMAL;
  136. case MT6397_BUCK_MODE_FORCE_PWM:
  137. return REGULATOR_MODE_FAST;
  138. default:
  139. return REGULATOR_MODE_INVALID;
  140. }
  141. }
  142. static int mt6397_regulator_set_mode(struct regulator_dev *rdev,
  143. unsigned int mode)
  144. {
  145. struct mt6397_regulator_info *info = rdev_get_drvdata(rdev);
  146. int ret, val;
  147. switch (mode) {
  148. case REGULATOR_MODE_FAST:
  149. val = MT6397_BUCK_MODE_FORCE_PWM;
  150. break;
  151. case REGULATOR_MODE_NORMAL:
  152. val = MT6397_BUCK_MODE_AUTO;
  153. break;
  154. default:
  155. ret = -EINVAL;
  156. goto err_mode;
  157. }
  158. dev_dbg(&rdev->dev, "mt6397 buck set_mode %#x, %#x, %#x, %#x\n",
  159. info->modeset_reg, info->modeset_mask,
  160. info->modeset_shift, val);
  161. val <<= info->modeset_shift;
  162. ret = regmap_update_bits(rdev->regmap, info->modeset_reg,
  163. info->modeset_mask, val);
  164. err_mode:
  165. if (ret != 0) {
  166. dev_err(&rdev->dev,
  167. "Failed to set mt6397 buck mode: %d\n", ret);
  168. return ret;
  169. }
  170. return 0;
  171. }
  172. static unsigned int mt6397_regulator_get_mode(struct regulator_dev *rdev)
  173. {
  174. struct mt6397_regulator_info *info = rdev_get_drvdata(rdev);
  175. int ret, regval;
  176. ret = regmap_read(rdev->regmap, info->modeset_reg, &regval);
  177. if (ret != 0) {
  178. dev_err(&rdev->dev,
  179. "Failed to get mt6397 buck mode: %d\n", ret);
  180. return ret;
  181. }
  182. switch ((regval & info->modeset_mask) >> info->modeset_shift) {
  183. case MT6397_BUCK_MODE_AUTO:
  184. return REGULATOR_MODE_NORMAL;
  185. case MT6397_BUCK_MODE_FORCE_PWM:
  186. return REGULATOR_MODE_FAST;
  187. default:
  188. return -EINVAL;
  189. }
  190. }
  191. static int mt6397_get_status(struct regulator_dev *rdev)
  192. {
  193. int ret;
  194. u32 regval;
  195. struct mt6397_regulator_info *info = rdev_get_drvdata(rdev);
  196. ret = regmap_read(rdev->regmap, info->desc.enable_reg, &regval);
  197. if (ret != 0) {
  198. dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret);
  199. return ret;
  200. }
  201. return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
  202. }
  203. static const struct regulator_ops mt6397_volt_range_ops = {
  204. .list_voltage = regulator_list_voltage_linear_range,
  205. .map_voltage = regulator_map_voltage_linear_range,
  206. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  207. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  208. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  209. .enable = regulator_enable_regmap,
  210. .disable = regulator_disable_regmap,
  211. .is_enabled = regulator_is_enabled_regmap,
  212. .get_status = mt6397_get_status,
  213. .set_mode = mt6397_regulator_set_mode,
  214. .get_mode = mt6397_regulator_get_mode,
  215. };
  216. static const struct regulator_ops mt6397_volt_table_ops = {
  217. .list_voltage = regulator_list_voltage_table,
  218. .map_voltage = regulator_map_voltage_iterate,
  219. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  220. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  221. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  222. .enable = regulator_enable_regmap,
  223. .disable = regulator_disable_regmap,
  224. .is_enabled = regulator_is_enabled_regmap,
  225. .get_status = mt6397_get_status,
  226. };
  227. static const struct regulator_ops mt6397_volt_fixed_ops = {
  228. .list_voltage = regulator_list_voltage_linear,
  229. .enable = regulator_enable_regmap,
  230. .disable = regulator_disable_regmap,
  231. .is_enabled = regulator_is_enabled_regmap,
  232. .get_status = mt6397_get_status,
  233. };
  234. /* The array is indexed by id(MT6397_ID_XXX) */
  235. static struct mt6397_regulator_info mt6397_regulators[] = {
  236. MT6397_BUCK("buck_vpca15", VPCA15, 700000, 1493750, 6250,
  237. buck_volt_range1, MT6397_VCA15_CON7, MT6397_VCA15_CON9, 0x7f,
  238. MT6397_VCA15_CON10, MT6397_VCA15_CON5, MT6397_VCA15_CON2, 11),
  239. MT6397_BUCK("buck_vpca7", VPCA7, 700000, 1493750, 6250,
  240. buck_volt_range1, MT6397_VPCA7_CON7, MT6397_VPCA7_CON9, 0x7f,
  241. MT6397_VPCA7_CON10, MT6397_VPCA7_CON5, MT6397_VPCA7_CON2, 8),
  242. MT6397_BUCK("buck_vsramca15", VSRAMCA15, 700000, 1493750, 6250,
  243. buck_volt_range1, MT6397_VSRMCA15_CON7, MT6397_VSRMCA15_CON9,
  244. 0x7f, MT6397_VSRMCA15_CON10, MT6397_VSRMCA15_CON5,
  245. MT6397_VSRMCA15_CON2, 8),
  246. MT6397_BUCK("buck_vsramca7", VSRAMCA7, 700000, 1493750, 6250,
  247. buck_volt_range1, MT6397_VSRMCA7_CON7, MT6397_VSRMCA7_CON9,
  248. 0x7f, MT6397_VSRMCA7_CON10, MT6397_VSRMCA7_CON5,
  249. MT6397_VSRMCA7_CON2, 8),
  250. MT6397_BUCK("buck_vcore", VCORE, 700000, 1493750, 6250,
  251. buck_volt_range1, MT6397_VCORE_CON7, MT6397_VCORE_CON9, 0x7f,
  252. MT6397_VCORE_CON10, MT6397_VCORE_CON5, MT6397_VCORE_CON2, 8),
  253. MT6397_BUCK("buck_vgpu", VGPU, 700000, 1493750, 6250, buck_volt_range1,
  254. MT6397_VGPU_CON7, MT6397_VGPU_CON9, 0x7f,
  255. MT6397_VGPU_CON10, MT6397_VGPU_CON5, MT6397_VGPU_CON2, 8),
  256. MT6397_BUCK("buck_vdrm", VDRM, 800000, 1593750, 6250, buck_volt_range2,
  257. MT6397_VDRM_CON7, MT6397_VDRM_CON9, 0x7f,
  258. MT6397_VDRM_CON10, MT6397_VDRM_CON5, MT6397_VDRM_CON2, 8),
  259. MT6397_BUCK("buck_vio18", VIO18, 1500000, 2120000, 20000,
  260. buck_volt_range3, MT6397_VIO18_CON7, MT6397_VIO18_CON9, 0x1f,
  261. MT6397_VIO18_CON10, MT6397_VIO18_CON5, MT6397_VIO18_CON2, 8),
  262. MT6397_REG_FIXED("ldo_vtcxo", VTCXO, MT6397_ANALDO_CON0, 10, 2800000),
  263. MT6397_REG_FIXED("ldo_va28", VA28, MT6397_ANALDO_CON1, 14, 2800000),
  264. MT6397_LDO("ldo_vcama", VCAMA, ldo_volt_table1,
  265. MT6397_ANALDO_CON2, 15, MT6397_ANALDO_CON6, 0xC0),
  266. MT6397_REG_FIXED("ldo_vio28", VIO28, MT6397_DIGLDO_CON0, 14, 2800000),
  267. MT6397_REG_FIXED("ldo_vusb", VUSB, MT6397_DIGLDO_CON1, 14, 3300000),
  268. MT6397_LDO("ldo_vmc", VMC, ldo_volt_table2,
  269. MT6397_DIGLDO_CON2, 12, MT6397_DIGLDO_CON29, 0x10),
  270. MT6397_LDO("ldo_vmch", VMCH, ldo_volt_table3,
  271. MT6397_DIGLDO_CON3, 14, MT6397_DIGLDO_CON17, 0x80),
  272. MT6397_LDO("ldo_vemc3v3", VEMC3V3, ldo_volt_table3,
  273. MT6397_DIGLDO_CON4, 14, MT6397_DIGLDO_CON18, 0x10),
  274. MT6397_LDO("ldo_vgp1", VGP1, ldo_volt_table4,
  275. MT6397_DIGLDO_CON5, 15, MT6397_DIGLDO_CON19, 0xE0),
  276. MT6397_LDO("ldo_vgp2", VGP2, ldo_volt_table5,
  277. MT6397_DIGLDO_CON6, 15, MT6397_DIGLDO_CON20, 0xE0),
  278. MT6397_LDO("ldo_vgp3", VGP3, ldo_volt_table5,
  279. MT6397_DIGLDO_CON7, 15, MT6397_DIGLDO_CON21, 0xE0),
  280. MT6397_LDO("ldo_vgp4", VGP4, ldo_volt_table5,
  281. MT6397_DIGLDO_CON8, 15, MT6397_DIGLDO_CON22, 0xE0),
  282. MT6397_LDO("ldo_vgp5", VGP5, ldo_volt_table6,
  283. MT6397_DIGLDO_CON9, 15, MT6397_DIGLDO_CON23, 0xE0),
  284. MT6397_LDO("ldo_vgp6", VGP6, ldo_volt_table5,
  285. MT6397_DIGLDO_CON10, 15, MT6397_DIGLDO_CON33, 0xE0),
  286. MT6397_LDO("ldo_vibr", VIBR, ldo_volt_table7,
  287. MT6397_DIGLDO_CON24, 15, MT6397_DIGLDO_CON25, 0xE00),
  288. };
  289. static int mt6397_set_buck_vosel_reg(struct platform_device *pdev)
  290. {
  291. struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent);
  292. int i;
  293. u32 regval;
  294. for (i = 0; i < MT6397_MAX_REGULATOR; i++) {
  295. if (mt6397_regulators[i].vselctrl_reg) {
  296. if (regmap_read(mt6397->regmap,
  297. mt6397_regulators[i].vselctrl_reg,
  298. &regval) < 0) {
  299. dev_err(&pdev->dev,
  300. "Failed to read buck ctrl\n");
  301. return -EIO;
  302. }
  303. if (regval & mt6397_regulators[i].vselctrl_mask) {
  304. mt6397_regulators[i].desc.vsel_reg =
  305. mt6397_regulators[i].vselon_reg;
  306. }
  307. }
  308. }
  309. return 0;
  310. }
  311. static int mt6397_regulator_probe(struct platform_device *pdev)
  312. {
  313. struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent);
  314. struct regulator_config config = {};
  315. struct regulator_dev *rdev;
  316. int i;
  317. u32 reg_value, version;
  318. /* Query buck controller to select activated voltage register part */
  319. if (mt6397_set_buck_vosel_reg(pdev))
  320. return -EIO;
  321. /* Read PMIC chip revision to update constraints and voltage table */
  322. if (regmap_read(mt6397->regmap, MT6397_CID, &reg_value) < 0) {
  323. dev_err(&pdev->dev, "Failed to read Chip ID\n");
  324. return -EIO;
  325. }
  326. dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value);
  327. version = (reg_value & 0xFF);
  328. switch (version) {
  329. case MT6397_REGULATOR_ID91:
  330. mt6397_regulators[MT6397_ID_VGP2].desc.volt_table =
  331. ldo_volt_table5_v2;
  332. break;
  333. default:
  334. break;
  335. }
  336. for (i = 0; i < MT6397_MAX_REGULATOR; i++) {
  337. config.dev = &pdev->dev;
  338. config.driver_data = &mt6397_regulators[i];
  339. config.regmap = mt6397->regmap;
  340. rdev = devm_regulator_register(&pdev->dev,
  341. &mt6397_regulators[i].desc, &config);
  342. if (IS_ERR(rdev)) {
  343. dev_err(&pdev->dev, "failed to register %s\n",
  344. mt6397_regulators[i].desc.name);
  345. return PTR_ERR(rdev);
  346. }
  347. }
  348. return 0;
  349. }
  350. static const struct platform_device_id mt6397_platform_ids[] = {
  351. {"mt6397-regulator", 0},
  352. { /* sentinel */ },
  353. };
  354. MODULE_DEVICE_TABLE(platform, mt6397_platform_ids);
  355. static const struct of_device_id mt6397_of_match[] = {
  356. { .compatible = "mediatek,mt6397-regulator", },
  357. { /* sentinel */ },
  358. };
  359. MODULE_DEVICE_TABLE(of, mt6397_of_match);
  360. static struct platform_driver mt6397_regulator_driver = {
  361. .driver = {
  362. .name = "mt6397-regulator",
  363. .of_match_table = of_match_ptr(mt6397_of_match),
  364. },
  365. .probe = mt6397_regulator_probe,
  366. .id_table = mt6397_platform_ids,
  367. };
  368. module_platform_driver(mt6397_regulator_driver);
  369. MODULE_AUTHOR("Flora Fu <flora.fu@mediatek.com>");
  370. MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6397 PMIC");
  371. MODULE_LICENSE("GPL");