da9150-fg.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * DA9150 Fuel-Gauge Driver
  4. *
  5. * Copyright (c) 2015 Dialog Semiconductor
  6. *
  7. * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/module.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/of.h>
  13. #include <linux/of_platform.h>
  14. #include <linux/slab.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/delay.h>
  17. #include <linux/power_supply.h>
  18. #include <linux/list.h>
  19. #include <asm/div64.h>
  20. #include <linux/mfd/da9150/core.h>
  21. #include <linux/mfd/da9150/registers.h>
  22. /* Core2Wire */
  23. #define DA9150_QIF_READ (0x0 << 7)
  24. #define DA9150_QIF_WRITE (0x1 << 7)
  25. #define DA9150_QIF_CODE_MASK 0x7F
  26. #define DA9150_QIF_BYTE_SIZE 8
  27. #define DA9150_QIF_BYTE_MASK 0xFF
  28. #define DA9150_QIF_SHORT_SIZE 2
  29. #define DA9150_QIF_LONG_SIZE 4
  30. /* QIF Codes */
  31. #define DA9150_QIF_UAVG 6
  32. #define DA9150_QIF_UAVG_SIZE DA9150_QIF_LONG_SIZE
  33. #define DA9150_QIF_IAVG 8
  34. #define DA9150_QIF_IAVG_SIZE DA9150_QIF_LONG_SIZE
  35. #define DA9150_QIF_NTCAVG 12
  36. #define DA9150_QIF_NTCAVG_SIZE DA9150_QIF_LONG_SIZE
  37. #define DA9150_QIF_SHUNT_VAL 36
  38. #define DA9150_QIF_SHUNT_VAL_SIZE DA9150_QIF_SHORT_SIZE
  39. #define DA9150_QIF_SD_GAIN 38
  40. #define DA9150_QIF_SD_GAIN_SIZE DA9150_QIF_LONG_SIZE
  41. #define DA9150_QIF_FCC_MAH 40
  42. #define DA9150_QIF_FCC_MAH_SIZE DA9150_QIF_SHORT_SIZE
  43. #define DA9150_QIF_SOC_PCT 43
  44. #define DA9150_QIF_SOC_PCT_SIZE DA9150_QIF_SHORT_SIZE
  45. #define DA9150_QIF_CHARGE_LIMIT 44
  46. #define DA9150_QIF_CHARGE_LIMIT_SIZE DA9150_QIF_SHORT_SIZE
  47. #define DA9150_QIF_DISCHARGE_LIMIT 45
  48. #define DA9150_QIF_DISCHARGE_LIMIT_SIZE DA9150_QIF_SHORT_SIZE
  49. #define DA9150_QIF_FW_MAIN_VER 118
  50. #define DA9150_QIF_FW_MAIN_VER_SIZE DA9150_QIF_SHORT_SIZE
  51. #define DA9150_QIF_E_FG_STATUS 126
  52. #define DA9150_QIF_E_FG_STATUS_SIZE DA9150_QIF_SHORT_SIZE
  53. #define DA9150_QIF_SYNC 127
  54. #define DA9150_QIF_SYNC_SIZE DA9150_QIF_SHORT_SIZE
  55. #define DA9150_QIF_MAX_CODES 128
  56. /* QIF Sync Timeout */
  57. #define DA9150_QIF_SYNC_TIMEOUT 1000
  58. #define DA9150_QIF_SYNC_RETRIES 10
  59. /* QIF E_FG_STATUS */
  60. #define DA9150_FG_IRQ_LOW_SOC_MASK (1 << 0)
  61. #define DA9150_FG_IRQ_HIGH_SOC_MASK (1 << 1)
  62. #define DA9150_FG_IRQ_SOC_MASK \
  63. (DA9150_FG_IRQ_LOW_SOC_MASK | DA9150_FG_IRQ_HIGH_SOC_MASK)
  64. /* Private data */
  65. struct da9150_fg {
  66. struct da9150 *da9150;
  67. struct device *dev;
  68. struct mutex io_lock;
  69. struct power_supply *battery;
  70. struct delayed_work work;
  71. u32 interval;
  72. int warn_soc;
  73. int crit_soc;
  74. int soc;
  75. };
  76. /* Battery Properties */
  77. static u32 da9150_fg_read_attr(struct da9150_fg *fg, u8 code, u8 size)
  78. {
  79. u8 buf[DA9150_QIF_LONG_SIZE];
  80. u8 read_addr;
  81. u32 res = 0;
  82. int i;
  83. /* Set QIF code (READ mode) */
  84. read_addr = (code & DA9150_QIF_CODE_MASK) | DA9150_QIF_READ;
  85. da9150_read_qif(fg->da9150, read_addr, size, buf);
  86. for (i = 0; i < size; ++i)
  87. res |= (buf[i] << (i * DA9150_QIF_BYTE_SIZE));
  88. return res;
  89. }
  90. static void da9150_fg_write_attr(struct da9150_fg *fg, u8 code, u8 size,
  91. u32 val)
  92. {
  93. u8 buf[DA9150_QIF_LONG_SIZE];
  94. u8 write_addr;
  95. int i;
  96. /* Set QIF code (WRITE mode) */
  97. write_addr = (code & DA9150_QIF_CODE_MASK) | DA9150_QIF_WRITE;
  98. for (i = 0; i < size; ++i) {
  99. buf[i] = (val >> (i * DA9150_QIF_BYTE_SIZE)) &
  100. DA9150_QIF_BYTE_MASK;
  101. }
  102. da9150_write_qif(fg->da9150, write_addr, size, buf);
  103. }
  104. /* Trigger QIF Sync to update QIF readable data */
  105. static void da9150_fg_read_sync_start(struct da9150_fg *fg)
  106. {
  107. int i = 0;
  108. u32 res = 0;
  109. mutex_lock(&fg->io_lock);
  110. /* Check if QIF sync already requested, and write to sync if not */
  111. res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
  112. DA9150_QIF_SYNC_SIZE);
  113. if (res > 0)
  114. da9150_fg_write_attr(fg, DA9150_QIF_SYNC,
  115. DA9150_QIF_SYNC_SIZE, 0);
  116. /* Wait for sync to complete */
  117. res = 0;
  118. while ((res == 0) && (i++ < DA9150_QIF_SYNC_RETRIES)) {
  119. usleep_range(DA9150_QIF_SYNC_TIMEOUT,
  120. DA9150_QIF_SYNC_TIMEOUT * 2);
  121. res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
  122. DA9150_QIF_SYNC_SIZE);
  123. }
  124. /* Check if sync completed */
  125. if (res == 0)
  126. dev_err(fg->dev, "Failed to perform QIF read sync!\n");
  127. }
  128. /*
  129. * Should always be called after QIF sync read has been performed, and all
  130. * attributes required have been accessed.
  131. */
  132. static inline void da9150_fg_read_sync_end(struct da9150_fg *fg)
  133. {
  134. mutex_unlock(&fg->io_lock);
  135. }
  136. /* Sync read of single QIF attribute */
  137. static u32 da9150_fg_read_attr_sync(struct da9150_fg *fg, u8 code, u8 size)
  138. {
  139. u32 val;
  140. da9150_fg_read_sync_start(fg);
  141. val = da9150_fg_read_attr(fg, code, size);
  142. da9150_fg_read_sync_end(fg);
  143. return val;
  144. }
  145. /* Wait for QIF Sync, write QIF data and wait for ack */
  146. static void da9150_fg_write_attr_sync(struct da9150_fg *fg, u8 code, u8 size,
  147. u32 val)
  148. {
  149. int i = 0;
  150. u32 res = 0, sync_val;
  151. mutex_lock(&fg->io_lock);
  152. /* Check if QIF sync already requested */
  153. res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
  154. DA9150_QIF_SYNC_SIZE);
  155. /* Wait for an existing sync to complete */
  156. while ((res == 0) && (i++ < DA9150_QIF_SYNC_RETRIES)) {
  157. usleep_range(DA9150_QIF_SYNC_TIMEOUT,
  158. DA9150_QIF_SYNC_TIMEOUT * 2);
  159. res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
  160. DA9150_QIF_SYNC_SIZE);
  161. }
  162. if (res == 0) {
  163. dev_err(fg->dev, "Timeout waiting for existing QIF sync!\n");
  164. mutex_unlock(&fg->io_lock);
  165. return;
  166. }
  167. /* Write value for QIF code */
  168. da9150_fg_write_attr(fg, code, size, val);
  169. /* Wait for write acknowledgment */
  170. i = 0;
  171. sync_val = res;
  172. while ((res == sync_val) && (i++ < DA9150_QIF_SYNC_RETRIES)) {
  173. usleep_range(DA9150_QIF_SYNC_TIMEOUT,
  174. DA9150_QIF_SYNC_TIMEOUT * 2);
  175. res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
  176. DA9150_QIF_SYNC_SIZE);
  177. }
  178. mutex_unlock(&fg->io_lock);
  179. /* Check write was actually successful */
  180. if (res != (sync_val + 1))
  181. dev_err(fg->dev, "Error performing QIF sync write for code %d\n",
  182. code);
  183. }
  184. /* Power Supply attributes */
  185. static int da9150_fg_capacity(struct da9150_fg *fg,
  186. union power_supply_propval *val)
  187. {
  188. val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_SOC_PCT,
  189. DA9150_QIF_SOC_PCT_SIZE);
  190. if (val->intval > 100)
  191. val->intval = 100;
  192. return 0;
  193. }
  194. static int da9150_fg_current_avg(struct da9150_fg *fg,
  195. union power_supply_propval *val)
  196. {
  197. u32 iavg, sd_gain, shunt_val;
  198. u64 div, res;
  199. da9150_fg_read_sync_start(fg);
  200. iavg = da9150_fg_read_attr(fg, DA9150_QIF_IAVG,
  201. DA9150_QIF_IAVG_SIZE);
  202. shunt_val = da9150_fg_read_attr(fg, DA9150_QIF_SHUNT_VAL,
  203. DA9150_QIF_SHUNT_VAL_SIZE);
  204. sd_gain = da9150_fg_read_attr(fg, DA9150_QIF_SD_GAIN,
  205. DA9150_QIF_SD_GAIN_SIZE);
  206. da9150_fg_read_sync_end(fg);
  207. div = (u64) (sd_gain * shunt_val * 65536ULL);
  208. do_div(div, 1000000);
  209. res = (u64) (iavg * 1000000ULL);
  210. do_div(res, div);
  211. val->intval = (int) res;
  212. return 0;
  213. }
  214. static int da9150_fg_voltage_avg(struct da9150_fg *fg,
  215. union power_supply_propval *val)
  216. {
  217. u64 res;
  218. val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_UAVG,
  219. DA9150_QIF_UAVG_SIZE);
  220. res = (u64) (val->intval * 186ULL);
  221. do_div(res, 10000);
  222. val->intval = (int) res;
  223. return 0;
  224. }
  225. static int da9150_fg_charge_full(struct da9150_fg *fg,
  226. union power_supply_propval *val)
  227. {
  228. val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_FCC_MAH,
  229. DA9150_QIF_FCC_MAH_SIZE);
  230. val->intval = val->intval * 1000;
  231. return 0;
  232. }
  233. /*
  234. * Temperature reading from device is only valid if battery/system provides
  235. * valid NTC to associated pin of DA9150 chip.
  236. */
  237. static int da9150_fg_temp(struct da9150_fg *fg,
  238. union power_supply_propval *val)
  239. {
  240. val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_NTCAVG,
  241. DA9150_QIF_NTCAVG_SIZE);
  242. val->intval = (val->intval * 10) / 1048576;
  243. return 0;
  244. }
  245. static enum power_supply_property da9150_fg_props[] = {
  246. POWER_SUPPLY_PROP_CAPACITY,
  247. POWER_SUPPLY_PROP_CURRENT_AVG,
  248. POWER_SUPPLY_PROP_VOLTAGE_AVG,
  249. POWER_SUPPLY_PROP_CHARGE_FULL,
  250. POWER_SUPPLY_PROP_TEMP,
  251. };
  252. static int da9150_fg_get_prop(struct power_supply *psy,
  253. enum power_supply_property psp,
  254. union power_supply_propval *val)
  255. {
  256. struct da9150_fg *fg = dev_get_drvdata(psy->dev.parent);
  257. int ret;
  258. switch (psp) {
  259. case POWER_SUPPLY_PROP_CAPACITY:
  260. ret = da9150_fg_capacity(fg, val);
  261. break;
  262. case POWER_SUPPLY_PROP_CURRENT_AVG:
  263. ret = da9150_fg_current_avg(fg, val);
  264. break;
  265. case POWER_SUPPLY_PROP_VOLTAGE_AVG:
  266. ret = da9150_fg_voltage_avg(fg, val);
  267. break;
  268. case POWER_SUPPLY_PROP_CHARGE_FULL:
  269. ret = da9150_fg_charge_full(fg, val);
  270. break;
  271. case POWER_SUPPLY_PROP_TEMP:
  272. ret = da9150_fg_temp(fg, val);
  273. break;
  274. default:
  275. ret = -EINVAL;
  276. break;
  277. }
  278. return ret;
  279. }
  280. /* Repeated SOC check */
  281. static bool da9150_fg_soc_changed(struct da9150_fg *fg)
  282. {
  283. union power_supply_propval val;
  284. da9150_fg_capacity(fg, &val);
  285. if (val.intval != fg->soc) {
  286. fg->soc = val.intval;
  287. return true;
  288. }
  289. return false;
  290. }
  291. static void da9150_fg_work(struct work_struct *work)
  292. {
  293. struct da9150_fg *fg = container_of(work, struct da9150_fg, work.work);
  294. /* Report if SOC has changed */
  295. if (da9150_fg_soc_changed(fg))
  296. power_supply_changed(fg->battery);
  297. schedule_delayed_work(&fg->work, msecs_to_jiffies(fg->interval));
  298. }
  299. /* SOC level event configuration */
  300. static void da9150_fg_soc_event_config(struct da9150_fg *fg)
  301. {
  302. int soc;
  303. soc = da9150_fg_read_attr_sync(fg, DA9150_QIF_SOC_PCT,
  304. DA9150_QIF_SOC_PCT_SIZE);
  305. if (soc > fg->warn_soc) {
  306. /* If SOC > warn level, set discharge warn level event */
  307. da9150_fg_write_attr_sync(fg, DA9150_QIF_DISCHARGE_LIMIT,
  308. DA9150_QIF_DISCHARGE_LIMIT_SIZE,
  309. fg->warn_soc + 1);
  310. } else if ((soc <= fg->warn_soc) && (soc > fg->crit_soc)) {
  311. /*
  312. * If SOC <= warn level, set discharge crit level event,
  313. * and set charge warn level event.
  314. */
  315. da9150_fg_write_attr_sync(fg, DA9150_QIF_DISCHARGE_LIMIT,
  316. DA9150_QIF_DISCHARGE_LIMIT_SIZE,
  317. fg->crit_soc + 1);
  318. da9150_fg_write_attr_sync(fg, DA9150_QIF_CHARGE_LIMIT,
  319. DA9150_QIF_CHARGE_LIMIT_SIZE,
  320. fg->warn_soc);
  321. } else if (soc <= fg->crit_soc) {
  322. /* If SOC <= crit level, set charge crit level event */
  323. da9150_fg_write_attr_sync(fg, DA9150_QIF_CHARGE_LIMIT,
  324. DA9150_QIF_CHARGE_LIMIT_SIZE,
  325. fg->crit_soc);
  326. }
  327. }
  328. static irqreturn_t da9150_fg_irq(int irq, void *data)
  329. {
  330. struct da9150_fg *fg = data;
  331. u32 e_fg_status;
  332. /* Read FG IRQ status info */
  333. e_fg_status = da9150_fg_read_attr(fg, DA9150_QIF_E_FG_STATUS,
  334. DA9150_QIF_E_FG_STATUS_SIZE);
  335. /* Handle warning/critical threhold events */
  336. if (e_fg_status & DA9150_FG_IRQ_SOC_MASK)
  337. da9150_fg_soc_event_config(fg);
  338. /* Clear any FG IRQs */
  339. da9150_fg_write_attr(fg, DA9150_QIF_E_FG_STATUS,
  340. DA9150_QIF_E_FG_STATUS_SIZE, e_fg_status);
  341. return IRQ_HANDLED;
  342. }
  343. static struct da9150_fg_pdata *da9150_fg_dt_pdata(struct device *dev)
  344. {
  345. struct device_node *fg_node = dev->of_node;
  346. struct da9150_fg_pdata *pdata;
  347. pdata = devm_kzalloc(dev, sizeof(struct da9150_fg_pdata), GFP_KERNEL);
  348. if (!pdata)
  349. return NULL;
  350. of_property_read_u32(fg_node, "dlg,update-interval",
  351. &pdata->update_interval);
  352. of_property_read_u8(fg_node, "dlg,warn-soc-level",
  353. &pdata->warn_soc_lvl);
  354. of_property_read_u8(fg_node, "dlg,crit-soc-level",
  355. &pdata->crit_soc_lvl);
  356. return pdata;
  357. }
  358. static const struct power_supply_desc fg_desc = {
  359. .name = "da9150-fg",
  360. .type = POWER_SUPPLY_TYPE_BATTERY,
  361. .properties = da9150_fg_props,
  362. .num_properties = ARRAY_SIZE(da9150_fg_props),
  363. .get_property = da9150_fg_get_prop,
  364. };
  365. static int da9150_fg_probe(struct platform_device *pdev)
  366. {
  367. struct device *dev = &pdev->dev;
  368. struct da9150 *da9150 = dev_get_drvdata(dev->parent);
  369. struct da9150_fg_pdata *fg_pdata = dev_get_platdata(dev);
  370. struct da9150_fg *fg;
  371. int ver, irq, ret = 0;
  372. fg = devm_kzalloc(dev, sizeof(*fg), GFP_KERNEL);
  373. if (fg == NULL)
  374. return -ENOMEM;
  375. platform_set_drvdata(pdev, fg);
  376. fg->da9150 = da9150;
  377. fg->dev = dev;
  378. mutex_init(&fg->io_lock);
  379. /* Enable QIF */
  380. da9150_set_bits(da9150, DA9150_CORE2WIRE_CTRL_A, DA9150_FG_QIF_EN_MASK,
  381. DA9150_FG_QIF_EN_MASK);
  382. fg->battery = devm_power_supply_register(dev, &fg_desc, NULL);
  383. if (IS_ERR(fg->battery)) {
  384. ret = PTR_ERR(fg->battery);
  385. return ret;
  386. }
  387. ver = da9150_fg_read_attr(fg, DA9150_QIF_FW_MAIN_VER,
  388. DA9150_QIF_FW_MAIN_VER_SIZE);
  389. dev_info(dev, "Version: 0x%x\n", ver);
  390. /* Handle DT data if provided */
  391. if (dev->of_node) {
  392. fg_pdata = da9150_fg_dt_pdata(dev);
  393. dev->platform_data = fg_pdata;
  394. }
  395. /* Handle any pdata provided */
  396. if (fg_pdata) {
  397. fg->interval = fg_pdata->update_interval;
  398. if (fg_pdata->warn_soc_lvl > 100)
  399. dev_warn(dev, "Invalid SOC warning level provided, Ignoring");
  400. else
  401. fg->warn_soc = fg_pdata->warn_soc_lvl;
  402. if ((fg_pdata->crit_soc_lvl > 100) ||
  403. (fg_pdata->crit_soc_lvl >= fg_pdata->warn_soc_lvl))
  404. dev_warn(dev, "Invalid SOC critical level provided, Ignoring");
  405. else
  406. fg->crit_soc = fg_pdata->crit_soc_lvl;
  407. }
  408. /* Configure initial SOC level events */
  409. da9150_fg_soc_event_config(fg);
  410. /*
  411. * If an interval period has been provided then setup repeating
  412. * work for reporting data updates.
  413. */
  414. if (fg->interval) {
  415. INIT_DELAYED_WORK(&fg->work, da9150_fg_work);
  416. schedule_delayed_work(&fg->work,
  417. msecs_to_jiffies(fg->interval));
  418. }
  419. /* Register IRQ */
  420. irq = platform_get_irq_byname(pdev, "FG");
  421. if (irq < 0) {
  422. dev_err(dev, "Failed to get IRQ FG: %d\n", irq);
  423. ret = irq;
  424. goto irq_fail;
  425. }
  426. ret = devm_request_threaded_irq(dev, irq, NULL, da9150_fg_irq,
  427. IRQF_ONESHOT, "FG", fg);
  428. if (ret) {
  429. dev_err(dev, "Failed to request IRQ %d: %d\n", irq, ret);
  430. goto irq_fail;
  431. }
  432. return 0;
  433. irq_fail:
  434. if (fg->interval)
  435. cancel_delayed_work(&fg->work);
  436. return ret;
  437. }
  438. static int da9150_fg_remove(struct platform_device *pdev)
  439. {
  440. struct da9150_fg *fg = platform_get_drvdata(pdev);
  441. if (fg->interval)
  442. cancel_delayed_work(&fg->work);
  443. return 0;
  444. }
  445. static int da9150_fg_resume(struct platform_device *pdev)
  446. {
  447. struct da9150_fg *fg = platform_get_drvdata(pdev);
  448. /*
  449. * Trigger SOC check to happen now so as to indicate any value change
  450. * since last check before suspend.
  451. */
  452. if (fg->interval)
  453. flush_delayed_work(&fg->work);
  454. return 0;
  455. }
  456. static struct platform_driver da9150_fg_driver = {
  457. .driver = {
  458. .name = "da9150-fuel-gauge",
  459. },
  460. .probe = da9150_fg_probe,
  461. .remove = da9150_fg_remove,
  462. .resume = da9150_fg_resume,
  463. };
  464. module_platform_driver(da9150_fg_driver);
  465. MODULE_DESCRIPTION("Fuel-Gauge Driver for DA9150");
  466. MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
  467. MODULE_LICENSE("GPL");