bq25980_charger.c 32 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298
  1. // SPDX-License-Identifier: GPL-2.0
  2. // BQ25980 Battery Charger Driver
  3. // Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
  4. #include <linux/err.h>
  5. #include <linux/i2c.h>
  6. #include <linux/init.h>
  7. #include <linux/interrupt.h>
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/gpio/consumer.h>
  11. #include <linux/power_supply.h>
  12. #include <linux/regmap.h>
  13. #include <linux/types.h>
  14. #include <linux/delay.h>
  15. #include <linux/device.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/slab.h>
  18. #include "bq25980_charger.h"
  19. struct bq25980_state {
  20. bool dischg;
  21. bool ovp;
  22. bool ocp;
  23. bool wdt;
  24. bool tflt;
  25. bool online;
  26. bool ce;
  27. bool hiz;
  28. bool bypass;
  29. u32 vbat_adc;
  30. u32 vsys_adc;
  31. u32 ibat_adc;
  32. };
  33. enum bq25980_id {
  34. BQ25980,
  35. BQ25975,
  36. BQ25960,
  37. };
  38. struct bq25980_chip_info {
  39. int model_id;
  40. const struct regmap_config *regmap_config;
  41. int busocp_def;
  42. int busocp_sc_max;
  43. int busocp_byp_max;
  44. int busocp_sc_min;
  45. int busocp_byp_min;
  46. int busovp_sc_def;
  47. int busovp_byp_def;
  48. int busovp_sc_step;
  49. int busovp_sc_offset;
  50. int busovp_byp_step;
  51. int busovp_byp_offset;
  52. int busovp_sc_min;
  53. int busovp_sc_max;
  54. int busovp_byp_min;
  55. int busovp_byp_max;
  56. int batovp_def;
  57. int batovp_max;
  58. int batovp_min;
  59. int batovp_step;
  60. int batovp_offset;
  61. int batocp_def;
  62. int batocp_max;
  63. };
  64. struct bq25980_init_data {
  65. u32 ichg;
  66. u32 bypass_ilim;
  67. u32 sc_ilim;
  68. u32 vreg;
  69. u32 iterm;
  70. u32 iprechg;
  71. u32 bypass_vlim;
  72. u32 sc_vlim;
  73. u32 ichg_max;
  74. u32 vreg_max;
  75. };
  76. struct bq25980_device {
  77. struct i2c_client *client;
  78. struct device *dev;
  79. struct power_supply *charger;
  80. struct power_supply *battery;
  81. struct mutex lock;
  82. struct regmap *regmap;
  83. char model_name[I2C_NAME_SIZE];
  84. struct bq25980_init_data init_data;
  85. const struct bq25980_chip_info *chip_info;
  86. struct bq25980_state state;
  87. int watchdog_timer;
  88. };
  89. static struct reg_default bq25980_reg_defs[] = {
  90. {BQ25980_BATOVP, 0x5A},
  91. {BQ25980_BATOVP_ALM, 0x46},
  92. {BQ25980_BATOCP, 0x51},
  93. {BQ25980_BATOCP_ALM, 0x50},
  94. {BQ25980_BATUCP_ALM, 0x28},
  95. {BQ25980_CHRGR_CTRL_1, 0x0},
  96. {BQ25980_BUSOVP, 0x26},
  97. {BQ25980_BUSOVP_ALM, 0x22},
  98. {BQ25980_BUSOCP, 0xD},
  99. {BQ25980_BUSOCP_ALM, 0xC},
  100. {BQ25980_TEMP_CONTROL, 0x30},
  101. {BQ25980_TDIE_ALM, 0xC8},
  102. {BQ25980_TSBUS_FLT, 0x15},
  103. {BQ25980_TSBAT_FLG, 0x15},
  104. {BQ25980_VAC_CONTROL, 0x0},
  105. {BQ25980_CHRGR_CTRL_2, 0x0},
  106. {BQ25980_CHRGR_CTRL_3, 0x20},
  107. {BQ25980_CHRGR_CTRL_4, 0x1D},
  108. {BQ25980_CHRGR_CTRL_5, 0x18},
  109. {BQ25980_STAT1, 0x0},
  110. {BQ25980_STAT2, 0x0},
  111. {BQ25980_STAT3, 0x0},
  112. {BQ25980_STAT4, 0x0},
  113. {BQ25980_STAT5, 0x0},
  114. {BQ25980_FLAG1, 0x0},
  115. {BQ25980_FLAG2, 0x0},
  116. {BQ25980_FLAG3, 0x0},
  117. {BQ25980_FLAG4, 0x0},
  118. {BQ25980_FLAG5, 0x0},
  119. {BQ25980_MASK1, 0x0},
  120. {BQ25980_MASK2, 0x0},
  121. {BQ25980_MASK3, 0x0},
  122. {BQ25980_MASK4, 0x0},
  123. {BQ25980_MASK5, 0x0},
  124. {BQ25980_DEVICE_INFO, 0x8},
  125. {BQ25980_ADC_CONTROL1, 0x0},
  126. {BQ25980_ADC_CONTROL2, 0x0},
  127. {BQ25980_IBUS_ADC_LSB, 0x0},
  128. {BQ25980_IBUS_ADC_MSB, 0x0},
  129. {BQ25980_VBUS_ADC_LSB, 0x0},
  130. {BQ25980_VBUS_ADC_MSB, 0x0},
  131. {BQ25980_VAC1_ADC_LSB, 0x0},
  132. {BQ25980_VAC2_ADC_LSB, 0x0},
  133. {BQ25980_VOUT_ADC_LSB, 0x0},
  134. {BQ25980_VBAT_ADC_LSB, 0x0},
  135. {BQ25980_IBAT_ADC_MSB, 0x0},
  136. {BQ25980_IBAT_ADC_LSB, 0x0},
  137. {BQ25980_TSBUS_ADC_LSB, 0x0},
  138. {BQ25980_TSBAT_ADC_LSB, 0x0},
  139. {BQ25980_TDIE_ADC_LSB, 0x0},
  140. {BQ25980_DEGLITCH_TIME, 0x0},
  141. {BQ25980_CHRGR_CTRL_6, 0x0},
  142. };
  143. static struct reg_default bq25975_reg_defs[] = {
  144. {BQ25980_BATOVP, 0x5A},
  145. {BQ25980_BATOVP_ALM, 0x46},
  146. {BQ25980_BATOCP, 0x51},
  147. {BQ25980_BATOCP_ALM, 0x50},
  148. {BQ25980_BATUCP_ALM, 0x28},
  149. {BQ25980_CHRGR_CTRL_1, 0x0},
  150. {BQ25980_BUSOVP, 0x26},
  151. {BQ25980_BUSOVP_ALM, 0x22},
  152. {BQ25980_BUSOCP, 0xD},
  153. {BQ25980_BUSOCP_ALM, 0xC},
  154. {BQ25980_TEMP_CONTROL, 0x30},
  155. {BQ25980_TDIE_ALM, 0xC8},
  156. {BQ25980_TSBUS_FLT, 0x15},
  157. {BQ25980_TSBAT_FLG, 0x15},
  158. {BQ25980_VAC_CONTROL, 0x0},
  159. {BQ25980_CHRGR_CTRL_2, 0x0},
  160. {BQ25980_CHRGR_CTRL_3, 0x20},
  161. {BQ25980_CHRGR_CTRL_4, 0x1D},
  162. {BQ25980_CHRGR_CTRL_5, 0x18},
  163. {BQ25980_STAT1, 0x0},
  164. {BQ25980_STAT2, 0x0},
  165. {BQ25980_STAT3, 0x0},
  166. {BQ25980_STAT4, 0x0},
  167. {BQ25980_STAT5, 0x0},
  168. {BQ25980_FLAG1, 0x0},
  169. {BQ25980_FLAG2, 0x0},
  170. {BQ25980_FLAG3, 0x0},
  171. {BQ25980_FLAG4, 0x0},
  172. {BQ25980_FLAG5, 0x0},
  173. {BQ25980_MASK1, 0x0},
  174. {BQ25980_MASK2, 0x0},
  175. {BQ25980_MASK3, 0x0},
  176. {BQ25980_MASK4, 0x0},
  177. {BQ25980_MASK5, 0x0},
  178. {BQ25980_DEVICE_INFO, 0x8},
  179. {BQ25980_ADC_CONTROL1, 0x0},
  180. {BQ25980_ADC_CONTROL2, 0x0},
  181. {BQ25980_IBUS_ADC_LSB, 0x0},
  182. {BQ25980_IBUS_ADC_MSB, 0x0},
  183. {BQ25980_VBUS_ADC_LSB, 0x0},
  184. {BQ25980_VBUS_ADC_MSB, 0x0},
  185. {BQ25980_VAC1_ADC_LSB, 0x0},
  186. {BQ25980_VAC2_ADC_LSB, 0x0},
  187. {BQ25980_VOUT_ADC_LSB, 0x0},
  188. {BQ25980_VBAT_ADC_LSB, 0x0},
  189. {BQ25980_IBAT_ADC_MSB, 0x0},
  190. {BQ25980_IBAT_ADC_LSB, 0x0},
  191. {BQ25980_TSBUS_ADC_LSB, 0x0},
  192. {BQ25980_TSBAT_ADC_LSB, 0x0},
  193. {BQ25980_TDIE_ADC_LSB, 0x0},
  194. {BQ25980_DEGLITCH_TIME, 0x0},
  195. {BQ25980_CHRGR_CTRL_6, 0x0},
  196. };
  197. static struct reg_default bq25960_reg_defs[] = {
  198. {BQ25980_BATOVP, 0x5A},
  199. {BQ25980_BATOVP_ALM, 0x46},
  200. {BQ25980_BATOCP, 0x51},
  201. {BQ25980_BATOCP_ALM, 0x50},
  202. {BQ25980_BATUCP_ALM, 0x28},
  203. {BQ25980_CHRGR_CTRL_1, 0x0},
  204. {BQ25980_BUSOVP, 0x26},
  205. {BQ25980_BUSOVP_ALM, 0x22},
  206. {BQ25980_BUSOCP, 0xD},
  207. {BQ25980_BUSOCP_ALM, 0xC},
  208. {BQ25980_TEMP_CONTROL, 0x30},
  209. {BQ25980_TDIE_ALM, 0xC8},
  210. {BQ25980_TSBUS_FLT, 0x15},
  211. {BQ25980_TSBAT_FLG, 0x15},
  212. {BQ25980_VAC_CONTROL, 0x0},
  213. {BQ25980_CHRGR_CTRL_2, 0x0},
  214. {BQ25980_CHRGR_CTRL_3, 0x20},
  215. {BQ25980_CHRGR_CTRL_4, 0x1D},
  216. {BQ25980_CHRGR_CTRL_5, 0x18},
  217. {BQ25980_STAT1, 0x0},
  218. {BQ25980_STAT2, 0x0},
  219. {BQ25980_STAT3, 0x0},
  220. {BQ25980_STAT4, 0x0},
  221. {BQ25980_STAT5, 0x0},
  222. {BQ25980_FLAG1, 0x0},
  223. {BQ25980_FLAG2, 0x0},
  224. {BQ25980_FLAG3, 0x0},
  225. {BQ25980_FLAG4, 0x0},
  226. {BQ25980_FLAG5, 0x0},
  227. {BQ25980_MASK1, 0x0},
  228. {BQ25980_MASK2, 0x0},
  229. {BQ25980_MASK3, 0x0},
  230. {BQ25980_MASK4, 0x0},
  231. {BQ25980_MASK5, 0x0},
  232. {BQ25980_DEVICE_INFO, 0x8},
  233. {BQ25980_ADC_CONTROL1, 0x0},
  234. {BQ25980_ADC_CONTROL2, 0x0},
  235. {BQ25980_IBUS_ADC_LSB, 0x0},
  236. {BQ25980_IBUS_ADC_MSB, 0x0},
  237. {BQ25980_VBUS_ADC_LSB, 0x0},
  238. {BQ25980_VBUS_ADC_MSB, 0x0},
  239. {BQ25980_VAC1_ADC_LSB, 0x0},
  240. {BQ25980_VAC2_ADC_LSB, 0x0},
  241. {BQ25980_VOUT_ADC_LSB, 0x0},
  242. {BQ25980_VBAT_ADC_LSB, 0x0},
  243. {BQ25980_IBAT_ADC_MSB, 0x0},
  244. {BQ25980_IBAT_ADC_LSB, 0x0},
  245. {BQ25980_TSBUS_ADC_LSB, 0x0},
  246. {BQ25980_TSBAT_ADC_LSB, 0x0},
  247. {BQ25980_TDIE_ADC_LSB, 0x0},
  248. {BQ25980_DEGLITCH_TIME, 0x0},
  249. {BQ25980_CHRGR_CTRL_6, 0x0},
  250. };
  251. static int bq25980_watchdog_time[BQ25980_NUM_WD_VAL] = {5000, 10000, 50000,
  252. 300000};
  253. static int bq25980_get_input_curr_lim(struct bq25980_device *bq)
  254. {
  255. unsigned int busocp_reg_code;
  256. int ret;
  257. ret = regmap_read(bq->regmap, BQ25980_BUSOCP, &busocp_reg_code);
  258. if (ret)
  259. return ret;
  260. return (busocp_reg_code * BQ25980_BUSOCP_STEP_uA) + BQ25980_BUSOCP_OFFSET_uA;
  261. }
  262. static int bq25980_set_hiz(struct bq25980_device *bq, int setting)
  263. {
  264. return regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2,
  265. BQ25980_EN_HIZ, setting);
  266. }
  267. static int bq25980_set_input_curr_lim(struct bq25980_device *bq, int busocp)
  268. {
  269. unsigned int busocp_reg_code;
  270. int ret;
  271. if (!busocp)
  272. return bq25980_set_hiz(bq, BQ25980_ENABLE_HIZ);
  273. bq25980_set_hiz(bq, BQ25980_DISABLE_HIZ);
  274. if (busocp < BQ25980_BUSOCP_MIN_uA)
  275. busocp = BQ25980_BUSOCP_MIN_uA;
  276. if (bq->state.bypass)
  277. busocp = min(busocp, bq->chip_info->busocp_sc_max);
  278. else
  279. busocp = min(busocp, bq->chip_info->busocp_byp_max);
  280. busocp_reg_code = (busocp - BQ25980_BUSOCP_OFFSET_uA)
  281. / BQ25980_BUSOCP_STEP_uA;
  282. ret = regmap_write(bq->regmap, BQ25980_BUSOCP, busocp_reg_code);
  283. if (ret)
  284. return ret;
  285. return regmap_write(bq->regmap, BQ25980_BUSOCP_ALM, busocp_reg_code);
  286. }
  287. static int bq25980_get_input_volt_lim(struct bq25980_device *bq)
  288. {
  289. unsigned int busovp_reg_code;
  290. unsigned int busovp_offset;
  291. unsigned int busovp_step;
  292. int ret;
  293. if (bq->state.bypass) {
  294. busovp_step = bq->chip_info->busovp_byp_step;
  295. busovp_offset = bq->chip_info->busovp_byp_offset;
  296. } else {
  297. busovp_step = bq->chip_info->busovp_sc_step;
  298. busovp_offset = bq->chip_info->busovp_sc_offset;
  299. }
  300. ret = regmap_read(bq->regmap, BQ25980_BUSOVP, &busovp_reg_code);
  301. if (ret)
  302. return ret;
  303. return (busovp_reg_code * busovp_step) + busovp_offset;
  304. }
  305. static int bq25980_set_input_volt_lim(struct bq25980_device *bq, int busovp)
  306. {
  307. unsigned int busovp_reg_code;
  308. unsigned int busovp_step;
  309. unsigned int busovp_offset;
  310. int ret;
  311. if (bq->state.bypass) {
  312. busovp_step = bq->chip_info->busovp_byp_step;
  313. busovp_offset = bq->chip_info->busovp_byp_offset;
  314. if (busovp > bq->chip_info->busovp_byp_max)
  315. busovp = bq->chip_info->busovp_byp_max;
  316. else if (busovp < bq->chip_info->busovp_byp_min)
  317. busovp = bq->chip_info->busovp_byp_min;
  318. } else {
  319. busovp_step = bq->chip_info->busovp_sc_step;
  320. busovp_offset = bq->chip_info->busovp_sc_offset;
  321. if (busovp > bq->chip_info->busovp_sc_max)
  322. busovp = bq->chip_info->busovp_sc_max;
  323. else if (busovp < bq->chip_info->busovp_sc_min)
  324. busovp = bq->chip_info->busovp_sc_min;
  325. }
  326. busovp_reg_code = (busovp - busovp_offset) / busovp_step;
  327. ret = regmap_write(bq->regmap, BQ25980_BUSOVP, busovp_reg_code);
  328. if (ret)
  329. return ret;
  330. return regmap_write(bq->regmap, BQ25980_BUSOVP_ALM, busovp_reg_code);
  331. }
  332. static int bq25980_get_const_charge_curr(struct bq25980_device *bq)
  333. {
  334. unsigned int batocp_reg_code;
  335. int ret;
  336. ret = regmap_read(bq->regmap, BQ25980_BATOCP, &batocp_reg_code);
  337. if (ret)
  338. return ret;
  339. return (batocp_reg_code & BQ25980_BATOCP_MASK) *
  340. BQ25980_BATOCP_STEP_uA;
  341. }
  342. static int bq25980_set_const_charge_curr(struct bq25980_device *bq, int batocp)
  343. {
  344. unsigned int batocp_reg_code;
  345. int ret;
  346. batocp = max(batocp, BQ25980_BATOCP_MIN_uA);
  347. batocp = min(batocp, bq->chip_info->batocp_max);
  348. batocp_reg_code = batocp / BQ25980_BATOCP_STEP_uA;
  349. ret = regmap_update_bits(bq->regmap, BQ25980_BATOCP,
  350. BQ25980_BATOCP_MASK, batocp_reg_code);
  351. if (ret)
  352. return ret;
  353. return regmap_update_bits(bq->regmap, BQ25980_BATOCP_ALM,
  354. BQ25980_BATOCP_MASK, batocp_reg_code);
  355. }
  356. static int bq25980_get_const_charge_volt(struct bq25980_device *bq)
  357. {
  358. unsigned int batovp_reg_code;
  359. int ret;
  360. ret = regmap_read(bq->regmap, BQ25980_BATOVP, &batovp_reg_code);
  361. if (ret)
  362. return ret;
  363. return ((batovp_reg_code * bq->chip_info->batovp_step) +
  364. bq->chip_info->batovp_offset);
  365. }
  366. static int bq25980_set_const_charge_volt(struct bq25980_device *bq, int batovp)
  367. {
  368. unsigned int batovp_reg_code;
  369. int ret;
  370. if (batovp < bq->chip_info->batovp_min)
  371. batovp = bq->chip_info->batovp_min;
  372. if (batovp > bq->chip_info->batovp_max)
  373. batovp = bq->chip_info->batovp_max;
  374. batovp_reg_code = (batovp - bq->chip_info->batovp_offset) /
  375. bq->chip_info->batovp_step;
  376. ret = regmap_write(bq->regmap, BQ25980_BATOVP, batovp_reg_code);
  377. if (ret)
  378. return ret;
  379. return regmap_write(bq->regmap, BQ25980_BATOVP_ALM, batovp_reg_code);
  380. }
  381. static int bq25980_set_bypass(struct bq25980_device *bq, bool en_bypass)
  382. {
  383. int ret;
  384. if (en_bypass)
  385. ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2,
  386. BQ25980_EN_BYPASS, BQ25980_EN_BYPASS);
  387. else
  388. ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2,
  389. BQ25980_EN_BYPASS, en_bypass);
  390. if (ret)
  391. return ret;
  392. bq->state.bypass = en_bypass;
  393. return bq->state.bypass;
  394. }
  395. static int bq25980_set_chg_en(struct bq25980_device *bq, bool en_chg)
  396. {
  397. int ret;
  398. if (en_chg)
  399. ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2,
  400. BQ25980_CHG_EN, BQ25980_CHG_EN);
  401. else
  402. ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2,
  403. BQ25980_CHG_EN, en_chg);
  404. if (ret)
  405. return ret;
  406. bq->state.ce = en_chg;
  407. return 0;
  408. }
  409. static int bq25980_get_adc_ibus(struct bq25980_device *bq)
  410. {
  411. int ibus_adc_lsb, ibus_adc_msb;
  412. u16 ibus_adc;
  413. int ret;
  414. ret = regmap_read(bq->regmap, BQ25980_IBUS_ADC_MSB, &ibus_adc_msb);
  415. if (ret)
  416. return ret;
  417. ret = regmap_read(bq->regmap, BQ25980_IBUS_ADC_LSB, &ibus_adc_lsb);
  418. if (ret)
  419. return ret;
  420. ibus_adc = (ibus_adc_msb << 8) | ibus_adc_lsb;
  421. if (ibus_adc_msb & BQ25980_ADC_POLARITY_BIT)
  422. return ((ibus_adc ^ 0xffff) + 1) * BQ25980_ADC_CURR_STEP_uA;
  423. return ibus_adc * BQ25980_ADC_CURR_STEP_uA;
  424. }
  425. static int bq25980_get_adc_vbus(struct bq25980_device *bq)
  426. {
  427. int vbus_adc_lsb, vbus_adc_msb;
  428. u16 vbus_adc;
  429. int ret;
  430. ret = regmap_read(bq->regmap, BQ25980_VBUS_ADC_MSB, &vbus_adc_msb);
  431. if (ret)
  432. return ret;
  433. ret = regmap_read(bq->regmap, BQ25980_VBUS_ADC_LSB, &vbus_adc_lsb);
  434. if (ret)
  435. return ret;
  436. vbus_adc = (vbus_adc_msb << 8) | vbus_adc_lsb;
  437. return vbus_adc * BQ25980_ADC_VOLT_STEP_uV;
  438. }
  439. static int bq25980_get_ibat_adc(struct bq25980_device *bq)
  440. {
  441. int ret;
  442. int ibat_adc_lsb, ibat_adc_msb;
  443. int ibat_adc;
  444. ret = regmap_read(bq->regmap, BQ25980_IBAT_ADC_MSB, &ibat_adc_msb);
  445. if (ret)
  446. return ret;
  447. ret = regmap_read(bq->regmap, BQ25980_IBAT_ADC_LSB, &ibat_adc_lsb);
  448. if (ret)
  449. return ret;
  450. ibat_adc = (ibat_adc_msb << 8) | ibat_adc_lsb;
  451. if (ibat_adc_msb & BQ25980_ADC_POLARITY_BIT)
  452. return ((ibat_adc ^ 0xffff) + 1) * BQ25980_ADC_CURR_STEP_uA;
  453. return ibat_adc * BQ25980_ADC_CURR_STEP_uA;
  454. }
  455. static int bq25980_get_adc_vbat(struct bq25980_device *bq)
  456. {
  457. int vsys_adc_lsb, vsys_adc_msb;
  458. u16 vsys_adc;
  459. int ret;
  460. ret = regmap_read(bq->regmap, BQ25980_VBAT_ADC_MSB, &vsys_adc_msb);
  461. if (ret)
  462. return ret;
  463. ret = regmap_read(bq->regmap, BQ25980_VBAT_ADC_LSB, &vsys_adc_lsb);
  464. if (ret)
  465. return ret;
  466. vsys_adc = (vsys_adc_msb << 8) | vsys_adc_lsb;
  467. return vsys_adc * BQ25980_ADC_VOLT_STEP_uV;
  468. }
  469. static int bq25980_get_state(struct bq25980_device *bq,
  470. struct bq25980_state *state)
  471. {
  472. unsigned int chg_ctrl_2;
  473. unsigned int stat1;
  474. unsigned int stat2;
  475. unsigned int stat3;
  476. unsigned int stat4;
  477. unsigned int ibat_adc_msb;
  478. int ret;
  479. ret = regmap_read(bq->regmap, BQ25980_STAT1, &stat1);
  480. if (ret)
  481. return ret;
  482. ret = regmap_read(bq->regmap, BQ25980_STAT2, &stat2);
  483. if (ret)
  484. return ret;
  485. ret = regmap_read(bq->regmap, BQ25980_STAT3, &stat3);
  486. if (ret)
  487. return ret;
  488. ret = regmap_read(bq->regmap, BQ25980_STAT4, &stat4);
  489. if (ret)
  490. return ret;
  491. ret = regmap_read(bq->regmap, BQ25980_CHRGR_CTRL_2, &chg_ctrl_2);
  492. if (ret)
  493. return ret;
  494. ret = regmap_read(bq->regmap, BQ25980_IBAT_ADC_MSB, &ibat_adc_msb);
  495. if (ret)
  496. return ret;
  497. state->dischg = ibat_adc_msb & BQ25980_ADC_POLARITY_BIT;
  498. state->ovp = (stat1 & BQ25980_STAT1_OVP_MASK) |
  499. (stat3 & BQ25980_STAT3_OVP_MASK);
  500. state->ocp = (stat1 & BQ25980_STAT1_OCP_MASK) |
  501. (stat2 & BQ25980_STAT2_OCP_MASK);
  502. state->tflt = stat4 & BQ25980_STAT4_TFLT_MASK;
  503. state->wdt = stat4 & BQ25980_WD_STAT;
  504. state->online = stat3 & BQ25980_PRESENT_MASK;
  505. state->ce = chg_ctrl_2 & BQ25980_CHG_EN;
  506. state->hiz = chg_ctrl_2 & BQ25980_EN_HIZ;
  507. state->bypass = chg_ctrl_2 & BQ25980_EN_BYPASS;
  508. return 0;
  509. }
  510. static int bq25980_get_battery_property(struct power_supply *psy,
  511. enum power_supply_property psp,
  512. union power_supply_propval *val)
  513. {
  514. struct bq25980_device *bq = power_supply_get_drvdata(psy);
  515. int ret = 0;
  516. switch (psp) {
  517. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX:
  518. val->intval = bq->init_data.ichg_max;
  519. break;
  520. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX:
  521. val->intval = bq->init_data.vreg_max;
  522. break;
  523. case POWER_SUPPLY_PROP_CURRENT_NOW:
  524. ret = bq25980_get_ibat_adc(bq);
  525. val->intval = ret;
  526. break;
  527. case POWER_SUPPLY_PROP_VOLTAGE_NOW:
  528. ret = bq25980_get_adc_vbat(bq);
  529. if (ret < 0)
  530. return ret;
  531. val->intval = ret;
  532. break;
  533. default:
  534. return -EINVAL;
  535. }
  536. return ret;
  537. }
  538. static int bq25980_set_charger_property(struct power_supply *psy,
  539. enum power_supply_property prop,
  540. const union power_supply_propval *val)
  541. {
  542. struct bq25980_device *bq = power_supply_get_drvdata(psy);
  543. int ret = -EINVAL;
  544. switch (prop) {
  545. case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
  546. ret = bq25980_set_input_curr_lim(bq, val->intval);
  547. if (ret)
  548. return ret;
  549. break;
  550. case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
  551. ret = bq25980_set_input_volt_lim(bq, val->intval);
  552. if (ret)
  553. return ret;
  554. break;
  555. case POWER_SUPPLY_PROP_CHARGE_TYPE:
  556. ret = bq25980_set_bypass(bq, val->intval);
  557. if (ret)
  558. return ret;
  559. break;
  560. case POWER_SUPPLY_PROP_STATUS:
  561. ret = bq25980_set_chg_en(bq, val->intval);
  562. if (ret)
  563. return ret;
  564. break;
  565. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
  566. ret = bq25980_set_const_charge_curr(bq, val->intval);
  567. if (ret)
  568. return ret;
  569. break;
  570. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
  571. ret = bq25980_set_const_charge_volt(bq, val->intval);
  572. if (ret)
  573. return ret;
  574. break;
  575. default:
  576. return -EINVAL;
  577. }
  578. return ret;
  579. }
  580. static int bq25980_get_charger_property(struct power_supply *psy,
  581. enum power_supply_property psp,
  582. union power_supply_propval *val)
  583. {
  584. struct bq25980_device *bq = power_supply_get_drvdata(psy);
  585. struct bq25980_state state;
  586. int ret = 0;
  587. mutex_lock(&bq->lock);
  588. ret = bq25980_get_state(bq, &state);
  589. mutex_unlock(&bq->lock);
  590. if (ret)
  591. return ret;
  592. switch (psp) {
  593. case POWER_SUPPLY_PROP_MANUFACTURER:
  594. val->strval = BQ25980_MANUFACTURER;
  595. break;
  596. case POWER_SUPPLY_PROP_MODEL_NAME:
  597. val->strval = bq->model_name;
  598. break;
  599. case POWER_SUPPLY_PROP_ONLINE:
  600. val->intval = state.online;
  601. break;
  602. case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
  603. ret = bq25980_get_input_volt_lim(bq);
  604. if (ret < 0)
  605. return ret;
  606. val->intval = ret;
  607. break;
  608. case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
  609. ret = bq25980_get_input_curr_lim(bq);
  610. if (ret < 0)
  611. return ret;
  612. val->intval = ret;
  613. break;
  614. case POWER_SUPPLY_PROP_HEALTH:
  615. val->intval = POWER_SUPPLY_HEALTH_GOOD;
  616. if (state.tflt)
  617. val->intval = POWER_SUPPLY_HEALTH_OVERHEAT;
  618. else if (state.ovp)
  619. val->intval = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
  620. else if (state.ocp)
  621. val->intval = POWER_SUPPLY_HEALTH_OVERCURRENT;
  622. else if (state.wdt)
  623. val->intval =
  624. POWER_SUPPLY_HEALTH_WATCHDOG_TIMER_EXPIRE;
  625. break;
  626. case POWER_SUPPLY_PROP_STATUS:
  627. val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
  628. if ((state.ce) && (!state.hiz))
  629. val->intval = POWER_SUPPLY_STATUS_CHARGING;
  630. else if (state.dischg)
  631. val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
  632. else if (!state.ce)
  633. val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
  634. break;
  635. case POWER_SUPPLY_PROP_CHARGE_TYPE:
  636. val->intval = POWER_SUPPLY_CHARGE_TYPE_UNKNOWN;
  637. if (!state.ce)
  638. val->intval = POWER_SUPPLY_CHARGE_TYPE_NONE;
  639. else if (state.bypass)
  640. val->intval = POWER_SUPPLY_CHARGE_TYPE_FAST;
  641. else if (!state.bypass)
  642. val->intval = POWER_SUPPLY_CHARGE_TYPE_STANDARD;
  643. break;
  644. case POWER_SUPPLY_PROP_CURRENT_NOW:
  645. ret = bq25980_get_adc_ibus(bq);
  646. if (ret < 0)
  647. return ret;
  648. val->intval = ret;
  649. break;
  650. case POWER_SUPPLY_PROP_VOLTAGE_NOW:
  651. ret = bq25980_get_adc_vbus(bq);
  652. if (ret < 0)
  653. return ret;
  654. val->intval = ret;
  655. break;
  656. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
  657. ret = bq25980_get_const_charge_curr(bq);
  658. if (ret < 0)
  659. return ret;
  660. val->intval = ret;
  661. break;
  662. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
  663. ret = bq25980_get_const_charge_volt(bq);
  664. if (ret < 0)
  665. return ret;
  666. val->intval = ret;
  667. break;
  668. default:
  669. return -EINVAL;
  670. }
  671. return ret;
  672. }
  673. static bool bq25980_state_changed(struct bq25980_device *bq,
  674. struct bq25980_state *new_state)
  675. {
  676. struct bq25980_state old_state;
  677. mutex_lock(&bq->lock);
  678. old_state = bq->state;
  679. mutex_unlock(&bq->lock);
  680. return (old_state.dischg != new_state->dischg ||
  681. old_state.ovp != new_state->ovp ||
  682. old_state.ocp != new_state->ocp ||
  683. old_state.online != new_state->online ||
  684. old_state.wdt != new_state->wdt ||
  685. old_state.tflt != new_state->tflt ||
  686. old_state.ce != new_state->ce ||
  687. old_state.hiz != new_state->hiz ||
  688. old_state.bypass != new_state->bypass);
  689. }
  690. static irqreturn_t bq25980_irq_handler_thread(int irq, void *private)
  691. {
  692. struct bq25980_device *bq = private;
  693. struct bq25980_state state;
  694. int ret;
  695. ret = bq25980_get_state(bq, &state);
  696. if (ret < 0)
  697. goto irq_out;
  698. if (!bq25980_state_changed(bq, &state))
  699. goto irq_out;
  700. mutex_lock(&bq->lock);
  701. bq->state = state;
  702. mutex_unlock(&bq->lock);
  703. power_supply_changed(bq->charger);
  704. irq_out:
  705. return IRQ_HANDLED;
  706. }
  707. static enum power_supply_property bq25980_power_supply_props[] = {
  708. POWER_SUPPLY_PROP_MANUFACTURER,
  709. POWER_SUPPLY_PROP_MODEL_NAME,
  710. POWER_SUPPLY_PROP_STATUS,
  711. POWER_SUPPLY_PROP_ONLINE,
  712. POWER_SUPPLY_PROP_HEALTH,
  713. POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT,
  714. POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT,
  715. POWER_SUPPLY_PROP_CHARGE_TYPE,
  716. POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT,
  717. POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE,
  718. POWER_SUPPLY_PROP_CURRENT_NOW,
  719. POWER_SUPPLY_PROP_VOLTAGE_NOW,
  720. };
  721. static enum power_supply_property bq25980_battery_props[] = {
  722. POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX,
  723. POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX,
  724. POWER_SUPPLY_PROP_CURRENT_NOW,
  725. POWER_SUPPLY_PROP_VOLTAGE_NOW,
  726. };
  727. static char *bq25980_charger_supplied_to[] = {
  728. "main-battery",
  729. };
  730. static int bq25980_property_is_writeable(struct power_supply *psy,
  731. enum power_supply_property prop)
  732. {
  733. switch (prop) {
  734. case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
  735. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
  736. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
  737. case POWER_SUPPLY_PROP_CHARGE_TYPE:
  738. case POWER_SUPPLY_PROP_STATUS:
  739. case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
  740. return true;
  741. default:
  742. return false;
  743. }
  744. }
  745. static const struct power_supply_desc bq25980_power_supply_desc = {
  746. .name = "bq25980-charger",
  747. .type = POWER_SUPPLY_TYPE_MAINS,
  748. .properties = bq25980_power_supply_props,
  749. .num_properties = ARRAY_SIZE(bq25980_power_supply_props),
  750. .get_property = bq25980_get_charger_property,
  751. .set_property = bq25980_set_charger_property,
  752. .property_is_writeable = bq25980_property_is_writeable,
  753. };
  754. static struct power_supply_desc bq25980_battery_desc = {
  755. .name = "bq25980-battery",
  756. .type = POWER_SUPPLY_TYPE_BATTERY,
  757. .get_property = bq25980_get_battery_property,
  758. .properties = bq25980_battery_props,
  759. .num_properties = ARRAY_SIZE(bq25980_battery_props),
  760. .property_is_writeable = bq25980_property_is_writeable,
  761. };
  762. static bool bq25980_is_volatile_reg(struct device *dev, unsigned int reg)
  763. {
  764. switch (reg) {
  765. case BQ25980_CHRGR_CTRL_2:
  766. case BQ25980_STAT1...BQ25980_FLAG5:
  767. case BQ25980_ADC_CONTROL1...BQ25980_TDIE_ADC_LSB:
  768. return true;
  769. default:
  770. return false;
  771. }
  772. }
  773. static const struct regmap_config bq25980_regmap_config = {
  774. .reg_bits = 8,
  775. .val_bits = 8,
  776. .max_register = BQ25980_CHRGR_CTRL_6,
  777. .reg_defaults = bq25980_reg_defs,
  778. .num_reg_defaults = ARRAY_SIZE(bq25980_reg_defs),
  779. .cache_type = REGCACHE_RBTREE,
  780. .volatile_reg = bq25980_is_volatile_reg,
  781. };
  782. static const struct regmap_config bq25975_regmap_config = {
  783. .reg_bits = 8,
  784. .val_bits = 8,
  785. .max_register = BQ25980_CHRGR_CTRL_6,
  786. .reg_defaults = bq25975_reg_defs,
  787. .num_reg_defaults = ARRAY_SIZE(bq25975_reg_defs),
  788. .cache_type = REGCACHE_RBTREE,
  789. .volatile_reg = bq25980_is_volatile_reg,
  790. };
  791. static const struct regmap_config bq25960_regmap_config = {
  792. .reg_bits = 8,
  793. .val_bits = 8,
  794. .max_register = BQ25980_CHRGR_CTRL_6,
  795. .reg_defaults = bq25960_reg_defs,
  796. .num_reg_defaults = ARRAY_SIZE(bq25960_reg_defs),
  797. .cache_type = REGCACHE_RBTREE,
  798. .volatile_reg = bq25980_is_volatile_reg,
  799. };
  800. static const struct bq25980_chip_info bq25980_chip_info_tbl[] = {
  801. [BQ25980] = {
  802. .model_id = BQ25980,
  803. .regmap_config = &bq25980_regmap_config,
  804. .busocp_def = BQ25980_BUSOCP_DFLT_uA,
  805. .busocp_sc_min = BQ25960_BUSOCP_SC_MAX_uA,
  806. .busocp_sc_max = BQ25980_BUSOCP_SC_MAX_uA,
  807. .busocp_byp_max = BQ25980_BUSOCP_BYP_MAX_uA,
  808. .busocp_byp_min = BQ25980_BUSOCP_MIN_uA,
  809. .busovp_sc_def = BQ25980_BUSOVP_DFLT_uV,
  810. .busovp_byp_def = BQ25980_BUSOVP_BYPASS_DFLT_uV,
  811. .busovp_sc_step = BQ25980_BUSOVP_SC_STEP_uV,
  812. .busovp_sc_offset = BQ25980_BUSOVP_SC_OFFSET_uV,
  813. .busovp_byp_step = BQ25980_BUSOVP_BYP_STEP_uV,
  814. .busovp_byp_offset = BQ25980_BUSOVP_BYP_OFFSET_uV,
  815. .busovp_sc_min = BQ25980_BUSOVP_SC_MIN_uV,
  816. .busovp_sc_max = BQ25980_BUSOVP_SC_MAX_uV,
  817. .busovp_byp_min = BQ25980_BUSOVP_BYP_MIN_uV,
  818. .busovp_byp_max = BQ25980_BUSOVP_BYP_MAX_uV,
  819. .batovp_def = BQ25980_BATOVP_DFLT_uV,
  820. .batovp_max = BQ25980_BATOVP_MAX_uV,
  821. .batovp_min = BQ25980_BATOVP_MIN_uV,
  822. .batovp_step = BQ25980_BATOVP_STEP_uV,
  823. .batovp_offset = BQ25980_BATOVP_OFFSET_uV,
  824. .batocp_def = BQ25980_BATOCP_DFLT_uA,
  825. .batocp_max = BQ25980_BATOCP_MAX_uA,
  826. },
  827. [BQ25975] = {
  828. .model_id = BQ25975,
  829. .regmap_config = &bq25975_regmap_config,
  830. .busocp_def = BQ25975_BUSOCP_DFLT_uA,
  831. .busocp_sc_min = BQ25975_BUSOCP_SC_MAX_uA,
  832. .busocp_sc_max = BQ25975_BUSOCP_SC_MAX_uA,
  833. .busocp_byp_min = BQ25980_BUSOCP_MIN_uA,
  834. .busocp_byp_max = BQ25975_BUSOCP_BYP_MAX_uA,
  835. .busovp_sc_def = BQ25975_BUSOVP_DFLT_uV,
  836. .busovp_byp_def = BQ25975_BUSOVP_BYPASS_DFLT_uV,
  837. .busovp_sc_step = BQ25975_BUSOVP_SC_STEP_uV,
  838. .busovp_sc_offset = BQ25975_BUSOVP_SC_OFFSET_uV,
  839. .busovp_byp_step = BQ25975_BUSOVP_BYP_STEP_uV,
  840. .busovp_byp_offset = BQ25975_BUSOVP_BYP_OFFSET_uV,
  841. .busovp_sc_min = BQ25975_BUSOVP_SC_MIN_uV,
  842. .busovp_sc_max = BQ25975_BUSOVP_SC_MAX_uV,
  843. .busovp_byp_min = BQ25975_BUSOVP_BYP_MIN_uV,
  844. .busovp_byp_max = BQ25975_BUSOVP_BYP_MAX_uV,
  845. .batovp_def = BQ25975_BATOVP_DFLT_uV,
  846. .batovp_max = BQ25975_BATOVP_MAX_uV,
  847. .batovp_min = BQ25975_BATOVP_MIN_uV,
  848. .batovp_step = BQ25975_BATOVP_STEP_uV,
  849. .batovp_offset = BQ25975_BATOVP_OFFSET_uV,
  850. .batocp_def = BQ25980_BATOCP_DFLT_uA,
  851. .batocp_max = BQ25980_BATOCP_MAX_uA,
  852. },
  853. [BQ25960] = {
  854. .model_id = BQ25960,
  855. .regmap_config = &bq25960_regmap_config,
  856. .busocp_def = BQ25960_BUSOCP_DFLT_uA,
  857. .busocp_sc_min = BQ25960_BUSOCP_SC_MAX_uA,
  858. .busocp_sc_max = BQ25960_BUSOCP_SC_MAX_uA,
  859. .busocp_byp_min = BQ25960_BUSOCP_SC_MAX_uA,
  860. .busocp_byp_max = BQ25960_BUSOCP_BYP_MAX_uA,
  861. .busovp_sc_def = BQ25975_BUSOVP_DFLT_uV,
  862. .busovp_byp_def = BQ25975_BUSOVP_BYPASS_DFLT_uV,
  863. .busovp_sc_step = BQ25960_BUSOVP_SC_STEP_uV,
  864. .busovp_sc_offset = BQ25960_BUSOVP_SC_OFFSET_uV,
  865. .busovp_byp_step = BQ25960_BUSOVP_BYP_STEP_uV,
  866. .busovp_byp_offset = BQ25960_BUSOVP_BYP_OFFSET_uV,
  867. .busovp_sc_min = BQ25960_BUSOVP_SC_MIN_uV,
  868. .busovp_sc_max = BQ25960_BUSOVP_SC_MAX_uV,
  869. .busovp_byp_min = BQ25960_BUSOVP_BYP_MIN_uV,
  870. .busovp_byp_max = BQ25960_BUSOVP_BYP_MAX_uV,
  871. .batovp_def = BQ25960_BATOVP_DFLT_uV,
  872. .batovp_max = BQ25960_BATOVP_MAX_uV,
  873. .batovp_min = BQ25960_BATOVP_MIN_uV,
  874. .batovp_step = BQ25960_BATOVP_STEP_uV,
  875. .batovp_offset = BQ25960_BATOVP_OFFSET_uV,
  876. .batocp_def = BQ25960_BATOCP_DFLT_uA,
  877. .batocp_max = BQ25960_BATOCP_MAX_uA,
  878. },
  879. };
  880. static int bq25980_power_supply_init(struct bq25980_device *bq,
  881. struct device *dev)
  882. {
  883. struct power_supply_config psy_cfg = { .drv_data = bq,
  884. .of_node = dev->of_node, };
  885. psy_cfg.supplied_to = bq25980_charger_supplied_to;
  886. psy_cfg.num_supplicants = ARRAY_SIZE(bq25980_charger_supplied_to);
  887. bq->charger = devm_power_supply_register(bq->dev,
  888. &bq25980_power_supply_desc,
  889. &psy_cfg);
  890. if (IS_ERR(bq->charger))
  891. return -EINVAL;
  892. bq->battery = devm_power_supply_register(bq->dev,
  893. &bq25980_battery_desc,
  894. &psy_cfg);
  895. if (IS_ERR(bq->battery))
  896. return -EINVAL;
  897. return 0;
  898. }
  899. static int bq25980_hw_init(struct bq25980_device *bq)
  900. {
  901. struct power_supply_battery_info bat_info = { };
  902. int wd_reg_val = BQ25980_WATCHDOG_DIS;
  903. int wd_max_val = BQ25980_NUM_WD_VAL - 1;
  904. int ret = 0;
  905. int curr_val;
  906. int volt_val;
  907. int i;
  908. if (bq->watchdog_timer) {
  909. if (bq->watchdog_timer >= bq25980_watchdog_time[wd_max_val])
  910. wd_reg_val = wd_max_val;
  911. else {
  912. for (i = 0; i < wd_max_val; i++) {
  913. if (bq->watchdog_timer > bq25980_watchdog_time[i] &&
  914. bq->watchdog_timer < bq25980_watchdog_time[i + 1]) {
  915. wd_reg_val = i;
  916. break;
  917. }
  918. }
  919. }
  920. }
  921. ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_3,
  922. BQ25980_WATCHDOG_MASK, wd_reg_val);
  923. if (ret)
  924. return ret;
  925. ret = power_supply_get_battery_info(bq->charger, &bat_info);
  926. if (ret) {
  927. dev_warn(bq->dev, "battery info missing\n");
  928. return -EINVAL;
  929. }
  930. bq->init_data.ichg_max = bat_info.constant_charge_current_max_ua;
  931. bq->init_data.vreg_max = bat_info.constant_charge_voltage_max_uv;
  932. if (bq->state.bypass) {
  933. ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2,
  934. BQ25980_EN_BYPASS, BQ25980_EN_BYPASS);
  935. if (ret)
  936. return ret;
  937. curr_val = bq->init_data.bypass_ilim;
  938. volt_val = bq->init_data.bypass_vlim;
  939. } else {
  940. curr_val = bq->init_data.sc_ilim;
  941. volt_val = bq->init_data.sc_vlim;
  942. }
  943. ret = bq25980_set_input_curr_lim(bq, curr_val);
  944. if (ret)
  945. return ret;
  946. ret = bq25980_set_input_volt_lim(bq, volt_val);
  947. if (ret)
  948. return ret;
  949. return regmap_update_bits(bq->regmap, BQ25980_ADC_CONTROL1,
  950. BQ25980_ADC_EN, BQ25980_ADC_EN);
  951. }
  952. static int bq25980_parse_dt(struct bq25980_device *bq)
  953. {
  954. int ret;
  955. ret = device_property_read_u32(bq->dev, "ti,watchdog-timeout-ms",
  956. &bq->watchdog_timer);
  957. if (ret)
  958. bq->watchdog_timer = BQ25980_WATCHDOG_MIN;
  959. if (bq->watchdog_timer > BQ25980_WATCHDOG_MAX ||
  960. bq->watchdog_timer < BQ25980_WATCHDOG_MIN)
  961. return -EINVAL;
  962. ret = device_property_read_u32(bq->dev,
  963. "ti,sc-ovp-limit-microvolt",
  964. &bq->init_data.sc_vlim);
  965. if (ret)
  966. bq->init_data.sc_vlim = bq->chip_info->busovp_sc_def;
  967. if (bq->init_data.sc_vlim > bq->chip_info->busovp_sc_max ||
  968. bq->init_data.sc_vlim < bq->chip_info->busovp_sc_min) {
  969. dev_err(bq->dev, "SC ovp limit is out of range\n");
  970. return -EINVAL;
  971. }
  972. ret = device_property_read_u32(bq->dev,
  973. "ti,sc-ocp-limit-microamp",
  974. &bq->init_data.sc_ilim);
  975. if (ret)
  976. bq->init_data.sc_ilim = bq->chip_info->busocp_def;
  977. if (bq->init_data.sc_ilim > bq->chip_info->busocp_sc_max ||
  978. bq->init_data.sc_ilim < bq->chip_info->busocp_sc_min) {
  979. dev_err(bq->dev, "SC ocp limit is out of range\n");
  980. return -EINVAL;
  981. }
  982. ret = device_property_read_u32(bq->dev,
  983. "ti,bypass-ovp-limit-microvolt",
  984. &bq->init_data.bypass_vlim);
  985. if (ret)
  986. bq->init_data.bypass_vlim = bq->chip_info->busovp_byp_def;
  987. if (bq->init_data.bypass_vlim > bq->chip_info->busovp_byp_max ||
  988. bq->init_data.bypass_vlim < bq->chip_info->busovp_byp_min) {
  989. dev_err(bq->dev, "Bypass ovp limit is out of range\n");
  990. return -EINVAL;
  991. }
  992. ret = device_property_read_u32(bq->dev,
  993. "ti,bypass-ocp-limit-microamp",
  994. &bq->init_data.bypass_ilim);
  995. if (ret)
  996. bq->init_data.bypass_ilim = bq->chip_info->busocp_def;
  997. if (bq->init_data.bypass_ilim > bq->chip_info->busocp_byp_max ||
  998. bq->init_data.bypass_ilim < bq->chip_info->busocp_byp_min) {
  999. dev_err(bq->dev, "Bypass ocp limit is out of range\n");
  1000. return -EINVAL;
  1001. }
  1002. bq->state.bypass = device_property_read_bool(bq->dev,
  1003. "ti,bypass-enable");
  1004. return 0;
  1005. }
  1006. static int bq25980_probe(struct i2c_client *client,
  1007. const struct i2c_device_id *id)
  1008. {
  1009. struct device *dev = &client->dev;
  1010. struct bq25980_device *bq;
  1011. int ret;
  1012. bq = devm_kzalloc(dev, sizeof(*bq), GFP_KERNEL);
  1013. if (!bq)
  1014. return -ENOMEM;
  1015. bq->client = client;
  1016. bq->dev = dev;
  1017. mutex_init(&bq->lock);
  1018. strncpy(bq->model_name, id->name, I2C_NAME_SIZE);
  1019. bq->chip_info = &bq25980_chip_info_tbl[id->driver_data];
  1020. bq->regmap = devm_regmap_init_i2c(client,
  1021. bq->chip_info->regmap_config);
  1022. if (IS_ERR(bq->regmap)) {
  1023. dev_err(dev, "Failed to allocate register map\n");
  1024. return PTR_ERR(bq->regmap);
  1025. }
  1026. i2c_set_clientdata(client, bq);
  1027. ret = bq25980_parse_dt(bq);
  1028. if (ret) {
  1029. dev_err(dev, "Failed to read device tree properties%d\n", ret);
  1030. return ret;
  1031. }
  1032. if (client->irq) {
  1033. ret = devm_request_threaded_irq(dev, client->irq, NULL,
  1034. bq25980_irq_handler_thread,
  1035. IRQF_TRIGGER_FALLING |
  1036. IRQF_ONESHOT,
  1037. dev_name(&client->dev), bq);
  1038. if (ret)
  1039. return ret;
  1040. }
  1041. ret = bq25980_power_supply_init(bq, dev);
  1042. if (ret) {
  1043. dev_err(dev, "Failed to register power supply\n");
  1044. return ret;
  1045. }
  1046. ret = bq25980_hw_init(bq);
  1047. if (ret) {
  1048. dev_err(dev, "Cannot initialize the chip.\n");
  1049. return ret;
  1050. }
  1051. return 0;
  1052. }
  1053. static const struct i2c_device_id bq25980_i2c_ids[] = {
  1054. { "bq25980", BQ25980 },
  1055. { "bq25975", BQ25975 },
  1056. { "bq25975", BQ25975 },
  1057. {},
  1058. };
  1059. MODULE_DEVICE_TABLE(i2c, bq25980_i2c_ids);
  1060. static const struct of_device_id bq25980_of_match[] = {
  1061. { .compatible = "ti,bq25980", .data = (void *)BQ25980 },
  1062. { .compatible = "ti,bq25975", .data = (void *)BQ25975 },
  1063. { .compatible = "ti,bq25960", .data = (void *)BQ25960 },
  1064. { },
  1065. };
  1066. MODULE_DEVICE_TABLE(of, bq25980_of_match);
  1067. static struct i2c_driver bq25980_driver = {
  1068. .driver = {
  1069. .name = "bq25980-charger",
  1070. .of_match_table = bq25980_of_match,
  1071. },
  1072. .probe = bq25980_probe,
  1073. .id_table = bq25980_i2c_ids,
  1074. };
  1075. module_i2c_driver(bq25980_driver);
  1076. MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
  1077. MODULE_AUTHOR("Ricardo Rivera-Matos <r-rivera-matos@ti.com>");
  1078. MODULE_DESCRIPTION("bq25980 charger driver");
  1079. MODULE_LICENSE("GPL v2");